Changeset 36e5eb3 in mainline for kernel/arch/arm32/src/fpu_context.c
- Timestamp:
- 2012-11-24T20:09:36Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 65871bb
- Parents:
- 435c33b
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/fpu_context.c
r435c33b r36e5eb3 143 143 void fpu_init(void) 144 144 { 145 } 146 147 void fpu_setup(void) 148 { 145 149 uint32_t fpsid = 0; 146 uint32_t mvfr0 = 0;147 150 asm volatile ( 148 151 "vmrs %0,fpsid\n" 149 "vmrs %1,mvfr0\n" 150 :"=r"(fpsid), "=r"(mvfr0):: 151 ); 152 //TODO: Identify FPU unit 153 //and set correct functions to save/restore ctx 152 :"=r"(fpsid):: 153 ); 154 154 switch (FPSID_SUBACHITECTURE(fpsid)) 155 155 { 156 156 case FPU_VFPv1: 157 printf("Detected VFPv1\n"); 157 158 save_context = fpu_context_save_s32; 158 159 restore_context = fpu_context_restore_s32; 159 160 break; 160 161 case FPU_VFPv2_COMMONv1: 162 printf("Detected VFPv2\n"); 161 163 save_context = fpu_context_save_d16; 162 164 restore_context = fpu_context_restore_d16; … … 164 166 case FPU_VFPv3_COMMONv2: 165 167 case FPU_VFPv3_NOTRAP: 166 case FPU_VFPv3: 168 case FPU_VFPv3: { 169 uint32_t mvfr0 = 0; 170 asm volatile ( 171 "vmrs %0,mvfr0\n" 172 :"=r"(mvfr0):: 173 ); 167 174 /* See page B4-1637 */ 168 175 if ((mvfr0 & 0xf) == 0x1) { 176 printf("Detected VFPv3+ with 32 regs\n"); 169 177 save_context = fpu_context_save_d32; 170 178 restore_context = fpu_context_restore_d32; 171 179 } else { 180 printf("Detected VFPv3+ with 16 regs\n"); 172 181 save_context = fpu_context_save_d16; 173 182 restore_context = fpu_context_restore_d16; 174 183 } 175 184 break; 185 } 176 186 177 187 }
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