Index: kernel/arch/sparc64/include/interrupt.h
===================================================================
--- kernel/arch/sparc64/include/interrupt.h	(revision a9ac978f3aba8259d5f8270ee59a08a41d15d94c)
+++ kernel/arch/sparc64/include/interrupt.h	(revision 36db5ac1d5864f5e63a519565d7d97f7fc18c184)
@@ -46,5 +46,6 @@
 #define IVT_FIRST	1
 
-#define VECTOR_TLB_SHOOTDOWN_IPI	0	/* TODO */
+#define VECTOR_TLB_SHOOTDOWN_IPI	0
+#define IPI_TLB_SHOOTDOWN		VECTOR_TLB_SHOOTDOWN_IPI
 
 struct istate {
Index: kernel/arch/sparc64/include/trap/interrupt.h
===================================================================
--- kernel/arch/sparc64/include/trap/interrupt.h	(revision a9ac978f3aba8259d5f8270ee59a08a41d15d94c)
+++ kernel/arch/sparc64/include/trap/interrupt.h	(revision 36db5ac1d5864f5e63a519565d7d97f7fc18c184)
@@ -51,4 +51,5 @@
 #define ASI_UDB_INTR_W_DATA_1	0x50
 #define ASI_UDB_INTR_W_DATA_2	0x60
+#define ASI_UDB_INTR_W_DISPATCH	0x70
 
 /* VA's used with ASI_UDB_INTR_R register. */
@@ -56,4 +57,11 @@
 #define ASI_UDB_INTR_R_DATA_1	0x50
 #define ASI_UDB_INTR_R_DATA_2	0x60
+
+/* Shifts in the Interrupt Vector Dispatch virtual address. */
+#define INTR_VEC_DISPATCH_MID_SHIFT	14
+
+/* Bits in the Interrupt Dispatch Status register. */
+#define INTR_DISPATCH_STATUS_NACK	0x2
+#define INTR_DISPATCH_STATUS_BUSY	0x1
 
 #define TT_INTERRUPT_LEVEL_1			0x41