Index: kernel/generic/src/console/cmd.c
===================================================================
--- kernel/generic/src/console/cmd.c	(revision df496c53916f2aa97e799467523c227b41d98c3b)
+++ kernel/generic/src/console/cmd.c	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -68,4 +68,8 @@
 #ifdef CONFIG_TEST
 #include <test.h>
+#endif
+
+#ifdef CONFIG_BENCH
+#include <arch/cycle.h>
 #endif
 
@@ -859,4 +863,25 @@
 }
 
+static bool run_test(const test_t * test)
+{
+	printf("%s\t\t%s\n", test->name, test->desc);
+#ifdef CONFIG_BENCH
+	uint64_t t0 = get_cycle();
+#endif
+	char * ret = test->entry();
+#ifdef CONFIG_BENCH
+	uint64_t dt = get_cycle() - t0;
+	printf("Time: %llu cycles\n", dt);
+#endif
+	
+	if (ret == NULL) {
+		printf("Test passed\n");
+		return true;
+	}
+
+	printf("%s\n", ret);
+	return false;
+}
+
 /** Command for returning kernel tests
  *
@@ -872,6 +897,7 @@
 		for (test = tests; test->name != NULL; test++) {
 			if (test->safe) {
-				printf("\n%s\t\t%s\n\n", test->name, test->desc);
-				test->entry();
+				printf("\n");
+				if (!run_test(test))
+					break;
 			}
 		}
@@ -882,5 +908,5 @@
 			if (strcmp(test->name, argv->buffer) == 0) {
 				fnd = true;
-				test->entry();
+				run_test(test);
 				break;
 			}
@@ -888,5 +914,5 @@
 		
 		if (!fnd)
-			printf("Unknown test.\n");
+			printf("Unknown test\n");
 	}
 	
Index: kernel/test/atomic/atomic1.c
===================================================================
--- kernel/test/atomic/atomic1.c	(revision df496c53916f2aa97e799467523c227b41d98c3b)
+++ kernel/test/atomic/atomic1.c	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -32,35 +32,32 @@
 #include <debug.h>
 
-#ifdef CONFIG_BENCH
-#include <arch/cycle.h>
-#endif
-
-void test_atomic1(void)
+char * test_atomic1(void)
 {
-#ifdef CONFIG_BENCH
-	uint64_t t0 = get_cycle();
-#endif
 	atomic_t a;
-
+	
 	atomic_set(&a, 10);
-	printf("Testing atomic_set() and atomic_get().\n");
-	ASSERT(atomic_get(&a) == 10);
-	printf("Testing atomic_postinc()\n");
-	ASSERT(atomic_postinc(&a) == 10);
-	ASSERT(atomic_get(&a) == 11);
-	printf("Testing atomic_postdec()\n");
-	ASSERT(atomic_postdec(&a) == 11);
-	ASSERT(atomic_get(&a) == 10);
-	printf("Testing atomic_preinc()\n");
-	ASSERT(atomic_preinc(&a) == 11);
-	ASSERT(atomic_get(&a) == 11);
-	printf("Testing atomic_predec()\n");
-	ASSERT(atomic_postdec(&a) == 11);
-	ASSERT(atomic_get(&a) == 10);
-
-	printf("Test passed.\n");
-#ifdef CONFIG_BENCH
-	uint64_t dt = get_cycle() - t0;
-	printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt);
-#endif
+	if (atomic_get(&a) != 10)
+		return "Failed atomic_set()/atomic_get()";
+	
+	if (atomic_postinc(&a) != 10)
+		return "Failed atomic_postinc()";
+	if (atomic_get(&a) != 11)
+		return "Failed atomic_get() after atomic_postinc()";
+	
+	if (atomic_postdec(&a) != 11)
+		return "Failed atomic_postdec()";
+	if (atomic_get(&a) != 10)
+		return "Failed atomic_get() after atomic_postdec()";
+	
+	if (atomic_preinc(&a) != 11)
+		return "Failed atomic_preinc()";
+	if (atomic_get(&a) != 11)
+		return "Failed atomic_get() after atomic_preinc()";
+	
+	if (atomic_predec(&a) != 10)
+		return "Failed atomic_predec()";
+	if (atomic_get(&a) != 10)
+		return "Failed atomic_get() after atomic_predec()";
+	
+	return NULL;
 }
Index: kernel/test/atomic/atomic1.def
===================================================================
--- kernel/test/atomic/atomic1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
+++ kernel/test/atomic/atomic1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -0,0 +1,6 @@
+{
+	"atomic1",
+	"Test atomic operations",
+	&test_atomic1,
+	true
+},
Index: kernel/test/btree/btree1.c
===================================================================
--- kernel/test/btree/btree1.c	(revision df496c53916f2aa97e799467523c227b41d98c3b)
+++ kernel/test/btree/btree1.c	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -32,15 +32,8 @@
 #include <debug.h>
 
-#ifdef CONFIG_BENCH
-#include <arch/cycle.h>
-#endif
-
 static void *data = (void *) 0xdeadbeef;
 
-void test_btree1(void)
+char * test_btree1(void)
 {
-#ifdef CONFIG_BENCH
-	uint64_t t0 = get_cycle();
-#endif
 	btree_t t;
 	int i;
@@ -164,7 +157,5 @@
 
 	btree_print(&t);
-#ifdef CONFIG_BENCH
-	uint64_t dt = get_cycle() - t0;
-	printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt);
-#endif
+	
+	return NULL;
 }
Index: kernel/test/btree/btree1.def
===================================================================
--- kernel/test/btree/btree1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
+++ kernel/test/btree/btree1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -0,0 +1,6 @@
+{
+	"btree1",
+	"Test B-tree operations",
+	&test_btree1,
+	true
+},
Index: kernel/test/debug/mips1.c
===================================================================
--- kernel/test/debug/mips1.c	(revision df496c53916f2aa97e799467523c227b41d98c3b)
+++ kernel/test/debug/mips1.c	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -26,4 +26,6 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
+ 
+#ifdef mips32
 
 #include <print.h>
@@ -38,17 +40,14 @@
 #include <arch.h>
 
+char * test_mips1(void)
+{
+	printf("You should enter kconsole debug mode now.\n");
+	
+	asm volatile (
+		"break\n"
+	);
+	
+	return "Back from debug mode";
+}
 
-void test_mips1(void)
-{
-#ifdef mips32
-	printf("MIPS debug test #1\n");
-
-	printf("You should enter kconsole debug mode now.\n");
-
-	asm __volatile__ ("break");
-
-	printf("Test passed.\n");
-#else
-	printf("This test is availaible only on MIPS32 platform.\n");
 #endif
-}
Index: kernel/test/debug/mips1.def
===================================================================
--- kernel/test/debug/mips1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
+++ kernel/test/debug/mips1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -0,0 +1,8 @@
+#ifdef mips32
+{
+	"mips1",
+	"MIPS debug test",
+	&test_mips1,
+	false
+},
+#endif
Index: kernel/test/fault/fault1.c
===================================================================
--- kernel/test/fault/fault1.c	(revision df496c53916f2aa97e799467523c227b41d98c3b)
+++ kernel/test/fault/fault1.c	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -39,8 +39,8 @@
 
 
-void test_fault1(void)
+char * test_fault1(void)
 {
-
-	((int *)(0))[1]=0;  
-
+	((int *)(0))[1] = 0;
+	
+	return "Written to NULL";
 }
Index: kernel/test/fault/fault1.def
===================================================================
--- kernel/test/fault/fault1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
+++ kernel/test/fault/fault1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -0,0 +1,6 @@
+{
+	"fault1",
+	"Write to NULL (maybe page fault)",
+	&test_fault1,
+	false
+},
Index: kernel/test/fpu/fpu1.c
===================================================================
--- kernel/test/fpu/fpu1.c	(revision df496c53916f2aa97e799467523c227b41d98c3b)
+++ kernel/test/fpu/fpu1.c	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -28,4 +28,6 @@
  */
 
+#if (defined(ia32) || defined(amd64) || defined(ia64) || defined(ia32xen))
+
 #include <print.h>
 #include <debug.h>
@@ -39,11 +41,6 @@
 #include <arch/arch.h>
 
-#ifdef CONFIG_BENCH
-#include <arch/cycle.h>
-#endif
-
-#if (defined(ia32) || defined(amd64) || defined(ia64) || defined(ia32xen))
-
-#define THREADS		150*2
+
+#define THREADS		150
 #define ATTEMPTS	100
 
@@ -53,12 +50,38 @@
 
 #ifdef KERN_ia32_ARCH_H_
-static inline double sqrt(double x) { double v; __asm__ ("fsqrt\n" : "=t" (v) : "0" (x)); return v; }
+static inline double sqrt(double x)
+{
+	double v;
+	
+	asm (
+		"fsqrt\n"
+		: "=t" (v)
+		: "0" (x)
+	);
+	
+	return v; 
+}
 #endif
 
 #ifdef KERN_amd64_ARCH_H_
-static inline double sqrt(double x) { double v; __asm__ ("fsqrt\n" : "=t" (v) : "0" (x)); return v; }
+static inline double sqrt(double x)
+{
+	double v;
+	
+	asm (
+		"fsqrt\n"
+		: "=t" (v)
+		: "0" (x)
+	);
+	
+	return v;
+}
 #endif
 
 #ifdef KERN_ia64_ARCH_H_
+
+#undef PI_10e8	
+#define PI_10e8	3141592
+
 static inline long double sqrt(long double a) 
 {   
@@ -66,11 +89,12 @@
 	long double lx = 0;
 
-	if(a<0.00000000000000001) return 0;
+	if (a < 0.00000000000000001)
+		return 0;
 		
-	while(x!=lx)
-	{
-		lx=x;
-		x=(x+(a/x))/2;
-	}
+	while(x != lx) {
+		lx = x;
+		x = (x + (a / x)) / 2;
+	}
+	
 	return x; 
 }
@@ -78,6 +102,6 @@
 
 
-
 static atomic_t threads_ok;
+static atomic_t threads_fault;
 static waitq_t can_start;
 
@@ -92,18 +116,19 @@
 
 	for (i = 0; i<ATTEMPTS; i++) {
-		le=-1;
-		e=0;
-		f=1;
-
-		for(d=1;e!=le;d*=f,f+=1) {
-			le=e;
-			e=e+1/d;
-		}
-
-		if((int)(100000000*e)!=E_10e8)
-			panic("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*e),(unative_t) E_10e8);
-	}
-
-	printf("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*e),(unative_t) E_10e8);
+		le = -1;
+		e = 0;
+		f = 1;
+
+		for (d = 1; e != le; d *= f, f += 1) {
+			le = e;
+			e = e + 1 / d;
+		}
+
+		if ((int) (100000000 * e) != E_10e8) {
+			printf("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000 * e), (unative_t) E_10e8);
+			atomic_inc(&threads_fault);
+			break;
+		}
+	}
 	atomic_inc(&threads_ok);
 }
@@ -111,11 +136,4 @@
 static void pi(void *data)
 {
-
-#ifdef KERN_ia64_ARCH_H_
-#undef PI_10e8	
-#define PI_10e8	3141592
-#endif
-
-
 	int i;
 	double lpi, pi;
@@ -126,15 +144,14 @@
 	waitq_sleep(&can_start);
 
-
-	for (i = 0; i<ATTEMPTS; i++) {
+	for (i = 0; i < ATTEMPTS; i++) {
 		lpi = -1;
 		pi = 0;
 
-		for (n=2, ab = sqrt(2); lpi != pi; n *= 2, ab = ad) {
+		for (n = 2, ab = sqrt(2); lpi != pi; n *= 2, ab = ad) {
 			double sc, cd;
 
-			sc = sqrt(1 - (ab*ab/4));
+			sc = sqrt(1 - (ab * ab / 4));
 			cd = 1 - sc;
-			ad = sqrt(ab*ab/4 + cd*cd);
+			ad = sqrt(ab * ab / 4 + cd * cd);
 			lpi = pi;
 			pi = 2 * n * ad;
@@ -142,37 +159,45 @@
 
 #ifdef KERN_ia64_ARCH_H_
-		if((int)(1000000*pi)!=PI_10e8)
-			panic("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (1000000*pi),(unative_t) (PI_10e8/100));
+		if ((int) (1000000 * pi) != PI_10e8) {
+			printf("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (1000000 * pi), (unative_t) (PI_10e8 / 100));
+			atomic_inc(&threads_fault);
+			break;
+		}
 #else
-		if((int)(100000000*pi)!=PI_10e8)
-			panic("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*pi),(unative_t) PI_10e8);
-#endif
-
-	}
-
-	printf("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*pi),(unative_t) PI_10e8);
+		if ((int) (100000000 * pi) != PI_10e8) {
+			printf("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000 * pi), (unative_t) PI_10e8);
+			atomic_inc(&threads_fault);
+			break;
+		}
+#endif
+	}
 	atomic_inc(&threads_ok);
 }
 
-void test_fpu1(void)
-{
-#ifdef CONFIG_BENCH
-	uint64_t t0 = get_cycle();
-#endif
-	thread_t *t;
-	int i;
+char * test_fpu1(void)
+{
+	unsigned int i, total = 0;
 
 	waitq_initialize(&can_start);
-
-	printf("FPU test #1\n");
-	printf("Creating %d threads... ", THREADS);
-
-	for (i=0; i<THREADS/2; i++) {  
-		if (!(t = thread_create(e, NULL, TASK, 0, "e")))
-			panic("could not create thread\n");
+	atomic_set(&threads_ok, 0);
+	atomic_set(&threads_fault, 0);
+	printf("Creating %d threads... ", 2 * THREADS);
+
+	for (i = 0; i < THREADS; i++) {  
+		thread_t *t;
+		
+		if (!(t = thread_create(e, NULL, TASK, 0, "e"))) {
+			printf("could not create thread %d\n", 2 * i);
+			break;
+		}
 		thread_ready(t);
-		if (!(t = thread_create(pi, NULL, TASK, 0, "pi")))
-			panic("could not create thread\n");
+		total++;
+		
+		if (!(t = thread_create(pi, NULL, TASK, 0, "pi"))) {
+			printf("could not create thread %d\n", 2 * i + 1);
+			break;
+		}
 		thread_ready(t);
+		total++;
 	}
 	printf("ok\n");
@@ -180,21 +205,15 @@
 	thread_sleep(1);
 	waitq_wakeup(&can_start, WAKEUP_ALL);
-
-	while (atomic_get(&threads_ok) != THREADS)
-		;
-		
-	printf("Test passed.\n");
-#ifdef CONFIG_BENCH
-	uint64_t dt = get_cycle() - t0;
-	printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt);
-#endif
-}
-
-#else
-
-void test_fpu1(void)
-{
-	printf("This test is available only on Intel/AMD platforms.");
-}
-
-#endif
+	
+	while (atomic_get(&threads_ok) != total) {
+		printf("Threads left: %d\n", total - atomic_get(&threads_ok));
+		thread_sleep(1);
+	}
+	
+	if (atomic_get(&threads_fault) == 0)
+		return NULL;
+	
+	return "Test failed";
+}
+
+#endif
Index: kernel/test/fpu/fpu1.def
===================================================================
--- kernel/test/fpu/fpu1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
+++ kernel/test/fpu/fpu1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -0,0 +1,8 @@
+#if (defined(ia32) || defined(amd64) || defined(ia64) || defined(ia32xen))
+{
+	"fpu1",
+	"Intel FPU test",
+	&test_fpu1,
+	true
+},
+#endif
Index: kernel/test/fpu/mips2.c
===================================================================
--- kernel/test/fpu/mips2.c	(revision df496c53916f2aa97e799467523c227b41d98c3b)
+++ kernel/test/fpu/mips2.c	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -27,4 +27,6 @@
  */
 
+#ifdef mips32
+
 #include <print.h>
 #include <debug.h>
@@ -38,6 +40,4 @@
 #include <arch.h>
 
-#ifdef mips32
-
 #define THREADS		50
 #define DELAY   	10000L
@@ -45,4 +45,5 @@
 
 static atomic_t threads_ok;
+static atomic_t threads_fault;
 static waitq_t can_start;
 
@@ -50,28 +51,30 @@
 {
 	int i;
-	int arg __attribute__((aligned(16))) = (int)((unative_t) data);
+	int arg __attribute__((aligned(16))) = (int) ((unative_t) data);
 	int after_arg __attribute__((aligned(16)));
-
+	
 	thread_detach(THREAD);
 	
 	waitq_sleep(&can_start);
 
-	for (i = 0; i<ATTEMPTS; i++) {
-		__asm__ volatile (
+	for (i = 0; i < ATTEMPTS; i++) {
+		asm volatile (
 			"mtc1 %0,$1"
-			:"=r"(arg)
-			);
-
+			: "=r" (arg)
+		);
+		
 		delay(DELAY);
-		__asm__ volatile (
+		
+		asm volatile (
 			"mfc1 %0, $1"
-			:"=r"(after_arg)
-			);
+			: "=r" (after_arg)
+		);
 		
-		if(arg != after_arg)
-			panic("General reg tid%d: arg(%d) != %d\n", 
-			      THREAD->tid, arg, after_arg);
+		if (arg != after_arg) {
+			printf("General reg tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg);
+			atomic_inc(&threads_fault);
+			break;
+		}
 	}
-
 	atomic_inc(&threads_ok);
 }
@@ -80,67 +83,73 @@
 {
 	int i;
-	int arg __attribute__((aligned(16))) = (int)((unative_t) data);
+	int arg __attribute__((aligned(16))) = (int) ((unative_t) data);
 	int after_arg __attribute__((aligned(16)));
-
+	
 	thread_detach(THREAD);
-
+	
 	waitq_sleep(&can_start);
 
-	for (i = 0; i<ATTEMPTS; i++) {
-		__asm__ volatile (
+	for (i = 0; i < ATTEMPTS; i++) {
+		asm volatile (
 			"mtc1 %0,$1"
-			:"=r"(arg)
-			);
+			: "=r" (arg)
+		);
 
 		scheduler();
-		__asm__ volatile (
+		asm volatile (
 			"mfc1 %0,$1"
-			:"=r"(after_arg)
-			);
+			: "=r" (after_arg)
+		);
 		
-		if(arg != after_arg)
-			panic("General reg tid%d: arg(%d) != %d\n", 
-			      THREAD->tid, arg, after_arg);
+		if (arg != after_arg) {
+			panic("General reg tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg);
+			atomic_inc(&threads_fault);
+			break;
+		}
 	}
-
 	atomic_inc(&threads_ok);
 }
 
 
-void test_mips2(void)
+char * test_mips2(void)
 {
-	thread_t *t;
-	int i;
+	unsigned int i, total = 0;
+	
+	waitq_initialize(&can_start);
+	atomic_set(&threads_ok, 0);
+	atomic_set(&threads_fault, 0);
+	printf("Creating %d threads... ", 2 * THREADS);
 
-	waitq_initialize(&can_start);
-
-	printf("MIPS test #1\n");
-	printf("Creating %d threads... ", THREADS);
-
-	for (i=0; i<THREADS/2; i++) {  
-		if (!(t = thread_create(testit1, (void *)((unative_t)i*2), TASK, 0, "testit1")))
-			panic("could not create thread\n");
+	for (i = 0; i < THREADS; i++) {
+		thread_t *t;
+		
+		if (!(t = thread_create(testit1, (void *) ((unative_t) 2 * i), TASK, 0, "testit1"))) {
+			printf("could not create thread %d\n", 2 * i);
+			break;
+		}
 		thread_ready(t);
-		if (!(t = thread_create(testit2, (void *)((unative_t)i*2+1), TASK, 0, "testit2")))
-			panic("could not create thread\n");
+		total++;
+		
+		if (!(t = thread_create(testit2, (void *) ((unative_t) 2 * i + 1), TASK, 0, "testit2"))) {
+			printf("could not create thread %d\n", 2 * i + 1);
+			break;
+		}
 		thread_ready(t);
+		total++;
 	}
-
 	printf("ok\n");
-	
+		
 	thread_sleep(1);
 	waitq_wakeup(&can_start, WAKEUP_ALL);
-
-	while (atomic_get(&threads_ok) != THREADS)
-		;
-		
-	printf("Test passed.\n");
-}
-
-#else
-
-void test_mips2(void)
-{
-	printf("This test is availaible only on MIPS32 platform.\n");
+	
+	while (atomic_get(&threads_ok) != total) {
+		printf("Threads left: %d\n", total - atomic_get(&threads_ok));
+		thread_sleep(1);
+	}
+	
+	if (atomic_get(&threads_fault) == 0)
+		return NULL;
+	
+	return "Test failed";
 }
 
Index: kernel/test/fpu/mips2.def
===================================================================
--- kernel/test/fpu/mips2.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
+++ kernel/test/fpu/mips2.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -0,0 +1,8 @@
+#ifdef mips32
+{
+	"mips2",
+	"MIPS FPU test",
+	&test_mips2,
+	true
+},
+#endif
Index: kernel/test/fpu/sse1.c
===================================================================
--- kernel/test/fpu/sse1.c	(revision df496c53916f2aa97e799467523c227b41d98c3b)
+++ kernel/test/fpu/sse1.c	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -27,4 +27,6 @@
  */
 
+#if (defined(ia32) || defined(amd64) || defined(ia32xen))
+
 #include <print.h>
 #include <debug.h>
@@ -38,15 +40,10 @@
 #include <arch.h>
 
-#ifdef CONFIG_BENCH
-#include <arch/cycle.h>
-#endif
-
-#if (defined(ia32) || defined(amd64) || defined(ia32xen))
-
-#define THREADS		50
+#define THREADS		25
 #define DELAY   	10000L
 #define ATTEMPTS        5
 
 static atomic_t threads_ok;
+static atomic_t threads_fault;
 static waitq_t can_start;
 
@@ -54,5 +51,5 @@
 {
 	int i;
-	int arg __attribute__((aligned(16))) = (int)((unative_t) data);
+	int arg __attribute__((aligned(16))) = (int) ((unative_t) data);
 	int after_arg __attribute__((aligned(16)));
 
@@ -61,21 +58,22 @@
 	waitq_sleep(&can_start);
 
-	for (i = 0; i<ATTEMPTS; i++) {
-		__asm__ volatile (
-			"movlpd	%0, %%xmm2"
-			:"=m"(arg)
-			);
+	for (i = 0; i < ATTEMPTS; i++) {
+		asm volatile (
+			"movlpd	%0, %%xmm2\n"
+			: "=m" (arg)
+		);
 
 		delay(DELAY);
-		__asm__ volatile (
-			"movlpd %%xmm2, %0"
-			:"=m"(after_arg)
-			);
+		asm volatile (
+			"movlpd %%xmm2, %0\n"
+			: "=m" (after_arg)
+		);
 		
-		if(arg != after_arg)
-			panic("tid%d: arg(%d) != %d\n", 
-			      THREAD->tid, arg, after_arg);
+		if (arg != after_arg) {
+			printf("tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg);
+			atomic_inc(&threads_fault);
+			break;
+		}
 	}
-
 	atomic_inc(&threads_ok);
 }
@@ -84,74 +82,73 @@
 {
 	int i;
-	int arg __attribute__((aligned(16))) = (int)((unative_t) data);
+	int arg __attribute__((aligned(16))) = (int) ((unative_t) data);
 	int after_arg __attribute__((aligned(16)));
-
+	
 	thread_detach(THREAD);
 	
 	waitq_sleep(&can_start);
 
-	for (i = 0; i<ATTEMPTS; i++) {
-		__asm__ volatile (
-			"movlpd	%0, %%xmm2"
-			:"=m"(arg)
-			);
+	for (i = 0; i < ATTEMPTS; i++) {
+		asm volatile (
+			"movlpd	%0, %%xmm2\n"
+			: "=m" (arg)
+		);
 
 		scheduler();
-		__asm__ volatile (
-			"movlpd %%xmm2, %0"
-			:"=m"(after_arg)
-			);
+		asm volatile (
+			"movlpd %%xmm2, %0\n"
+			: "=m" (after_arg)
+		);
 		
-		if(arg != after_arg)
-			panic("tid%d: arg(%d) != %d\n", 
-			      THREAD->tid, arg, after_arg);
+		if (arg != after_arg) {
+			printf("tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg);
+			atomic_inc(&threads_fault);
+			break;
+		}
 	}
-
 	atomic_inc(&threads_ok);
 }
 
 
-void test_sse1(void)
+char * test_sse1(void)
 {
-#ifdef CONFIG_BENCH
-	uint64_t t0 = get_cycle();
-#endif
-	thread_t *t;
-	int i;
+	unsigned int i, total = 0;
 
 	waitq_initialize(&can_start);
+	atomic_set(&threads_ok, 0);
+	atomic_set(&threads_fault, 0);
+	printf("Creating %d threads... ", 2 * THREADS);
 
-	printf("SSE test #1\n");
-	printf("Creating %d threads... ", THREADS);
-
-	for (i=0; i<THREADS/2; i++) {  
-		if (!(t = thread_create(testit1, (void *)((unative_t)i*2), TASK, 0, "testit1")))
-			panic("could not create thread\n");
+	for (i = 0; i < THREADS; i++) {
+		thread_t *t;
+		
+		if (!(t = thread_create(testit1, (void *) ((unative_t) 2 * i), TASK, 0, "testit1"))) {
+			printf("could not create thread %d\n", 2 * i);
+			break;
+		}
 		thread_ready(t);
-		if (!(t = thread_create(testit2, (void *)((unative_t)i*2+1), TASK, 0, "testit2")))
-			panic("could not create thread\n");
+		total++;
+		
+		if (!(t = thread_create(testit2, (void *) ((unative_t) 2 * i + 1), TASK, 0, "testit2"))) {
+			printf("could not create thread %d\n", 2 * i + 1);
+			break;
+		}
 		thread_ready(t);
+		total++;
 	}
-
 	printf("ok\n");
-	
+		
 	thread_sleep(1);
 	waitq_wakeup(&can_start, WAKEUP_ALL);
-
-	while (atomic_get(&threads_ok) != THREADS)
-		;
-		
-	printf("Test passed.\n");
-#ifdef CONFIG_BENCH
-	uint64_t dt = get_cycle() - t0;
-	printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt);
-#endif
-}
-
-#else
-
-void test_sse1(void)
-{
-	printf("This test is available only on SSE enabled platforms.");
+	
+	while (atomic_get(&threads_ok) != total) {
+		printf("Threads left: %d\n", total - atomic_get(&threads_ok));
+		thread_sleep(1);
+	}
+	
+	if (atomic_get(&threads_fault) == 0)
+		return NULL;
+	
+	return "Test failed";
 }
 
Index: kernel/test/fpu/sse1.def
===================================================================
--- kernel/test/fpu/sse1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
+++ kernel/test/fpu/sse1.def	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -0,0 +1,8 @@
+#if (defined(ia32) || defined(amd64) || defined(ia32xen))
+{
+	"sse1",
+	"Intel SEE test",
+	&test_sse1,
+	true
+},
+#endif
Index: kernel/test/test.c
===================================================================
--- kernel/test/test.c	(revision df496c53916f2aa97e799467523c227b41d98c3b)
+++ kernel/test/test.c	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -36,46 +36,12 @@
 
 test_t tests[] = {
-	{
-		"atomic1",
-		"Test atomic operations",
-		&test_atomic1,
-		true
-	},
-	{
-		"btree1",
-		"Test B-tree operations",
-		&test_btree1,
-		true
-	},
-	{
-		"mips1",
-		"MIPS debug test",
-		&test_mips1,
-		true
-	},
-	{
-		"fault1",
-		"Write to NULL (maybe page fault)",
-		&test_fault1,
-		false
-	},
-	{
-		"fpu1",
-		"Intel FPU test",
-		&test_fpu1,
-		true
-	},
-	{
-		"sse1",
-		"Intel SEE test",
-		&test_sse1,
-		true
-	},
-	{
-		"mips2",
-		"MIPS FPU test",
-		&test_mips2,
-		true
-	},
+#include <atomic/atomic1.def>
+#include <btree/btree1.def>
+#include <debug/mips1.def>
+#include <fault/fault1.def>
+#include <fpu/fpu1.def>
+#include <fpu/sse1.def>
+#include <fpu/mips2.def>
+	/*
 	{
 		"falloc1",
@@ -173,5 +139,5 @@
 		&test_sysinfo1,
 		true
-	},
+	},*/
 	{NULL, NULL, NULL}
 };
Index: kernel/test/test.h
===================================================================
--- kernel/test/test.h	(revision df496c53916f2aa97e799467523c227b41d98c3b)
+++ kernel/test/test.h	(revision 34db7fa828e4d10ee2a902fb4143704b3feda184)
@@ -39,18 +39,20 @@
 #include <typedefs.h>
 
+typedef char * (* test_entry_t)();
+
 typedef struct {
 	char * name;
 	char * desc;
-	function entry;
+	test_entry_t entry;
 	bool safe;
 } test_t;
 
-extern void test_atomic1(void);
-extern void test_btree1(void);
-extern void test_mips1(void);
-extern void test_fault1(void);
-extern void test_fpu1(void);
-extern void test_sse1(void);
-extern void test_mips2(void);
+extern char * test_atomic1(void);
+extern char * test_btree1(void);
+extern char * test_mips1(void);
+extern char * test_fault1(void);
+extern char * test_fpu1(void);
+extern char * test_sse1(void);
+extern char * test_mips2(void);
 extern void test_falloc1(void);
 extern void test_falloc2(void);
