Changeset 344925c in mainline

Timestamp:

2011-04-08T20:29:38Z (13 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

06c552c

Parents:

6b6e3ed3

Message:

Initialize OHCI hc memory structures

Location:

uspace/drv/ohci

Files:

• hc.c (modified) (5 diffs)
• hc.h (modified) (1 diff)
• ohci_regs.h (modified) (2 diffs)

uspace/drv/ohci/hc.c

@@ -48 +48 @@
 static void hc_init_hw(hc_t *instance);
 static int hc_init_transfer_lists(hc_t *instance);
+static int hc_init_memory(hc_t *instance);
 /*----------------------------------------------------------------------------*/
 int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
@@ -117 +118 @@
         rh_init(&instance->rh, dev, instance->registers);
 
+        hc_init_memory(instance);
         hc_init_hw(instance);
 
@@ -207 +209 @@
         assert(instance);
         const uint32_t fm_interval = instance->registers->fm_interval;
+
+        /* reset hc */
         instance->registers->command_status = CS_HCR;
         async_usleep(10);
+
+        /* restore fm_interval */
         instance->registers->fm_interval = fm_interval;
         assert((instance->registers->command_status & CS_HCR) == 0);
+
         /* hc is now in suspend state */
-        /* init queues */
-        hc_init_transfer_lists(instance);
-        /* TODO: init HCCA block */
-        /* TODO: enable queues */
+
+        /* enable queues */
+        instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
         /* TODO: enable interrupts */
-        /* TODO: set periodic start to 90% */
+        /* set periodic start to 90% */
+        instance->registers->periodic_start = (fm_interval / 10) * 9;
 
         instance->registers->control &= (C_HCFS_OPERATIONAL << C_HCFS_SHIFT);
@@ -226 +233 @@
 {
         assert(instance);
-#define CHECK_RET_CLEAR_RETURN(ret, message...) \
+
+#define SETUP_TRANSFER_LIST(type, name) \
+do { \
+        int ret = transfer_list_init(&instance->type, name); \
         if (ret != EOK) { \
-                usb_log_error(message); \
+                usb_log_error("Failed(%d) to setup %s transfer list.\n", \
+                    ret, name); \
                 transfer_list_fini(&instance->transfers_isochronous); \
                 transfer_list_fini(&instance->transfers_interrupt); \
                 transfer_list_fini(&instance->transfers_control); \
                 transfer_list_fini(&instance->transfers_bulk); \
-                return ret; \
-        } else (void) 0
-
-        int ret;
-        ret = transfer_list_init(&instance->transfers_bulk, "BULK");
-        CHECK_RET_CLEAR_RETURN(ret, "Failed to init BULK list.");
-
-        ret = transfer_list_init(&instance->transfers_control, "CONTROL");
-        CHECK_RET_CLEAR_RETURN(ret, "Failed to init CONTROL list.");
-
-        ret = transfer_list_init(&instance->transfers_interrupt, "INTERRUPT");
-        CHECK_RET_CLEAR_RETURN(ret, "Failed to init INTERRUPT list.");
+        } \
+} while (0)
+
+        SETUP_TRANSFER_LIST(transfers_isochronous, "ISOCHRONOUS");
+        SETUP_TRANSFER_LIST(transfers_interrupt, "INTERRUPT");
+        SETUP_TRANSFER_LIST(transfers_control, "CONTROL");
+        SETUP_TRANSFER_LIST(transfers_bulk, "BULK");
 
         transfer_list_set_next(&instance->transfers_interrupt,
-                &instance->transfers_isochronous);
+            &instance->transfers_isochronous);
 
         /* Assign pointers to be used during scheduling */
@@ -262 +268 @@
 #undef CHECK_RET_CLEAR_RETURN
 }
+/*----------------------------------------------------------------------------*/
+int hc_init_memory(hc_t *instance)
+{
+        assert(instance);
+        /* init queues */
+        hc_init_transfer_lists(instance);
+
+        /* init HCCA */
+        instance->hcca = malloc32(sizeof(hcca_t));
+        if (instance->hcca == NULL)
+                return ENOMEM;
+        bzero(instance->hcca, sizeof(hcca_t));
+        instance->registers->hcca = addr_to_phys(instance->hcca);
+
+        /* use queues */
+        instance->registers->bulk_head = instance->transfers_bulk.list_head_pa;
+        instance->registers->control_head =
+            instance->transfers_control.list_head_pa;
+
+        unsigned i = 0;
+        for (; i < 32; ++i) {
+                instance->hcca->int_ep[i] =
+                    instance->transfers_interrupt.list_head_pa;
+        }
+
+        return EOK;
+}
 /**
  * @}

uspace/drv/ohci/hc.h

@@ -56 +56 @@
         rh_t rh;
 
+        hcca_t *hcca;
+
         transfer_list_t transfers_isochronous;
         transfer_list_t transfers_interrupt;

uspace/drv/ohci/ohci_regs.h

@@ -43 +43 @@
 #define C_CSBR_MASK (0x3)
 #define C_CSBR_SHIFT (0)
+#define C_CSBR_1_1 (0x0)
+#define C_CSBR_1_2 (0x1)
+#define C_CSBR_1_3 (0x2)
+#define C_CSBR_1_4 (0x3)
+
 #define C_PLE (1 << 2)
 #define C_IE (1 << 3)
@@ -90 +95 @@
         volatile uint32_t interrupt_disable;
         volatile uint32_t hcca;
-        volatile uint32_t period_corrent;
+        volatile uint32_t period_current;
         volatile uint32_t control_head;
         volatile uint32_t control_current;