Changeset 3396f59 in mainline for arch/amd64/include/asm.h

Timestamp:

2005-09-04T08:28:55Z (20 years ago)

Author:

Ondrej Palkovsky <ondrap@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

8ff2f3f

Parents:

005384ad

Message:

Fixed gdtr naming issues after ia32 changes.
Fixed stack alignment on new thread to by multiple of 16,
we are now ABI-correct and we do not #GP on va_arg to boot.
Fixed bad exception register names reporting.
Fixed bad _hardcoded_load_addr, which caused allocation of kernel text
frames.

File:

• arch/amd64/include/asm.h (modified) (4 diffs)

arch/amd64/include/asm.h

@@ -141 +141 @@
 }
 
+/** Read CR0
+ *
+ * Return value in CR0
+ *
+ * @return Value read.
+ */
+static inline __u64 read_cr0(void) 
+{ 
+        __u64 v; 
+        __asm__ volatile ("movq %%cr0,%0" : "=r" (v)); 
+        return v; 
+}
+
 /** Read CR2
  *
@@ -147 +160 @@
  * @return Value read.
  */
-static inline __u64 read_cr2(void) { __u64 v; __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); return v; }
+static inline __u64 read_cr2(void) 
+{ 
+        __u64 v; 
+        __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); 
+        return v; 
+}
 
 /** Write CR3
@@ -155 +173 @@
  * @param v Value to be written.
  */
-static inline void write_cr3(__u64 v) { __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); }
+static inline void write_cr3(__u64 v) 
+{ 
+        __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); 
+}
 
 /** Read CR3
@@ -163 +184 @@
  * @return Value read.
  */
-static inline __u64 read_cr3(void) { __u64 v; __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); return v; }
+static inline __u64 read_cr3(void) 
+{ 
+        __u64 v;
+        __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); 
+        return v; 
+}