Index: kernel/arch/sparc32/Makefile.inc =================================================================== --- kernel/arch/sparc32/Makefile.inc (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/Makefile.inc (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -29,14 +29,4 @@ BFD = binary -ifeq ($(COMPILER),gcc_cross) - ifeq ($(CROSS_TARGET),arm32) - ATSIGN = % - endif - - ifeq ($(CROSS_TARGET),mips32) - GCC_CFLAGS += -mno-abicalls - endif -endif - BITS = 32 ENDIANESS = BE @@ -45,8 +35,7 @@ arch/$(KARCH)/src/start.S \ arch/$(KARCH)/src/trap_table.S \ - arch/$(KARCH)/src/regwin_test.S \ arch/$(KARCH)/src/context.S \ arch/$(KARCH)/src/debug/stacktrace.c \ - arch/$(KARCH)/src/debug/stacktrace_asm.S \ + arch/$(KARCH)/src/debug/stacktrace_asm.S \ arch/$(KARCH)/src/proc/scheduler.c \ arch/$(KARCH)/src/proc/task.c \ @@ -64,8 +53,9 @@ arch/$(KARCH)/src/mm/frame.c \ arch/$(KARCH)/src/mm/page.c \ - arch/$(KARCH)/src/mm/tlb.c \ + arch/$(KARCH)/src/mm/tlb.c ifeq ($(MACHINE),leon3) - ARCH_SOURCES += arch/$(KARCH)/src/machine/leon3/leon3.c + ARCH_SOURCES += \ + arch/$(KARCH)/src/machine/leon3/leon3.c endif Index: kernel/arch/sparc32/_link.ld.in =================================================================== --- kernel/arch/sparc32/_link.ld.in (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/_link.ld.in (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -1,3 +1,3 @@ -#define KERNEL_LOAD_ADDRESS 0x80a00000 +#define KERNEL_LOAD_ADDRESS 0x80a00000 ENTRY(kernel_image_start) @@ -5,4 +5,5 @@ SECTIONS { . = KERNEL_LOAD_ADDRESS; + .text : { ktext_start = .; @@ -10,4 +11,5 @@ ktext_end = .; } + .data : { kdata_start = .; @@ -30,4 +32,5 @@ *(symtab.*); } + .sbss : { *(.sbss); Index: kernel/arch/sparc32/include/arch/ambapp.h =================================================================== --- kernel/arch/sparc32/include/arch/ambapp.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/ambapp.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -36,6 +36,5 @@ #define KERN_sparc32_AMBAPP_H_ -typedef struct -{ +typedef struct { /* Primary serial port location */ uintptr_t uart_base; Index: kernel/arch/sparc32/include/arch/arch.h =================================================================== --- kernel/arch/sparc32/include/arch/arch.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/arch.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -42,18 +42,18 @@ #include -#define NWINDOWS 8 +#define NWINDOWS 8 /* ASI assignments: */ -#define ASI_CACHEMISS 0x01 -#define ASI_CACHECTRL 0x02 -#define ASI_MMUCACHE 0x10 -#define ASI_MMUREGS 0x19 -#define ASI_MMUBYPASS 0x1c -#define ASI_MMUFLUSH 0x18 +#define ASI_CACHEMISS 0x01 +#define ASI_CACHECTRL 0x02 +#define ASI_MMUCACHE 0x10 +#define ASI_MMUREGS 0x19 +#define ASI_MMUBYPASS 0x1c +#define ASI_MMUFLUSH 0x18 #define TASKMAP_MAX_RECORDS 32 #define CPUMAP_MAX_RECORDS 32 -#define BOOTINFO_TASK_NAME_BUFLEN 32 +#define BOOTINFO_TASK_NAME_BUFLEN 32 typedef struct { @@ -75,9 +75,9 @@ } bootinfo_t; -extern void arch_pre_main(void *unused, bootinfo_t *bootinfo); -extern void write_to_invalid(uint32_t l0, uint32_t l1, uint32_t l2); -extern void read_from_invalid(uint32_t *l0, uint32_t *l1, uint32_t *l2); -extern void preemptible_save_uspace(uintptr_t sp, istate_t *istate); -extern void preemptible_restore_uspace(uintptr_t sp, istate_t *istate); +extern void arch_pre_main(void *, bootinfo_t *); +extern void write_to_invalid(uint32_t, uint32_t, uint32_t); +extern void read_from_invalid(uint32_t *, uint32_t *, uint32_t *); +extern void preemptible_save_uspace(uintptr_t, istate_t *); +extern void preemptible_restore_uspace(uintptr_t, istate_t *); extern void flush_windows(void); Index: kernel/arch/sparc32/include/arch/asm.h =================================================================== --- kernel/arch/sparc32/include/arch/asm.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/asm.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -43,13 +43,10 @@ NO_TRACE static inline void asm_delay_loop(uint32_t usec) { + // FIXME TODO } NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void) { - /* On real hardware this should stop processing further - instructions on the CPU (and possibly putting it into - low-power mode) without any possibility of exitting - this function. */ - + // FIXME TODO while (true); } @@ -57,8 +54,5 @@ NO_TRACE static inline void cpu_sleep(void) { - /* On real hardware this should put the CPU into low-power - mode. However, the CPU is free to continue processing - futher instructions any time. The CPU also wakes up - upon an interrupt. */ + // FIXME TODO } @@ -68,12 +62,4 @@ } -/** Word to port - * - * Output word to port - * - * @param port Port to write to - * @param val Value to write - * - */ NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) { @@ -81,12 +67,4 @@ } -/** Double word to port - * - * Output double word to port - * - * @param port Port to write to - * @param val Value to write - * - */ NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) { @@ -94,12 +72,4 @@ } -/** Byte from port - * - * Get byte from port - * - * @param port Port to read from - * @return Value read - * - */ NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) { @@ -107,12 +77,4 @@ } -/** Word from port - * - * Get word from port - * - * @param port Port to read from - * @return Value read - * - */ NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) { @@ -120,12 +82,4 @@ } -/** Double word from port - * - * Get double word from port - * - * @param port Port to read from - * @return Value read - * - */ NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) { @@ -133,43 +87,44 @@ } -NO_TRACE static inline uint32_t psr_read() +NO_TRACE static inline uint32_t psr_read(void) { uint32_t v; - + asm volatile ( "mov %%psr, %[v]\n" : [v] "=r" (v) ); - - return v; -} - -NO_TRACE static inline uint32_t wim_read() + + return v; +} + +NO_TRACE static inline uint32_t wim_read(void) { uint32_t v; - + asm volatile ( "mov %%wim, %[v]\n" : [v] "=r" (v) ); - - return v; -} - -NO_TRACE static inline uint32_t asi_u32_read(int asi, uintptr_t va) + + return v; +} + +NO_TRACE static inline uint32_t asi_u32_read(unsigned int asi, uintptr_t va) { uint32_t v; - + asm volatile ( "lda [%[va]] %[asi], %[v]\n" : [v] "=r" (v) : [va] "r" (va), - [asi] "i" ((unsigned int) asi) - ); - - return v; -} - -NO_TRACE static inline void asi_u32_write(int asi, uintptr_t va, uint32_t v) + [asi] "i" (asi) + ); + + return v; +} + +NO_TRACE static inline void asi_u32_write(unsigned int asi, uintptr_t va, + uint32_t v) { asm volatile ( @@ -177,5 +132,5 @@ :: [v] "r" (v), [va] "r" (va), - [asi] "i" ((unsigned int) asi) + [asi] "i" (asi) : "memory" ); @@ -200,12 +155,13 @@ NO_TRACE static inline ipl_t interrupts_enable(void) { + psr_reg_t psr; + psr.value = psr_read(); + ipl_t pil; - - psr_reg_t psr; - psr.value = psr_read(); pil = psr.pil; - psr.pil = 0xf; + + psr.pil = 0x0f; psr_write(psr.value); - + return pil; } @@ -213,12 +169,13 @@ NO_TRACE static inline ipl_t interrupts_disable(void) { + psr_reg_t psr; + psr.value = psr_read(); + ipl_t pil; - - psr_reg_t psr; - psr.value = psr_read(); pil = psr.pil; + psr.pil = 0; psr_write(psr.value); - + return pil; } Index: kernel/arch/sparc32/include/arch/atomic.h =================================================================== --- kernel/arch/sparc32/include/arch/atomic.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/atomic.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -33,6 +33,6 @@ */ -#ifndef KERN_abs32le_ATOMIC_H_ -#define KERN_abs32le_ATOMIC_H_ +#ifndef KERN_sparc32_ATOMIC_H_ +#define KERN_sparc32_ATOMIC_H_ #include @@ -47,7 +47,5 @@ REQUIRES(val->count < ATOMIC_COUNT_MAX) { - /* On real hardware the increment has to be done - as an atomic action. */ - + // FIXME TODO val->count++; } @@ -58,7 +56,5 @@ REQUIRES(val->count > ATOMIC_COUNT_MIN) { - /* On real hardware the decrement has to be done - as an atomic action. */ - + // FIXME TODO val->count--; } @@ -69,7 +65,5 @@ REQUIRES(val->count < ATOMIC_COUNT_MAX) { - /* On real hardware both the storing of the previous - value and the increment have to be done as a single - atomic action. */ + // FIXME TODO atomic_count_t prev = val->count; @@ -84,7 +78,5 @@ REQUIRES(val->count > ATOMIC_COUNT_MIN) { - /* On real hardware both the storing of the previous - value and the decrement have to be done as a single - atomic action. */ + // FIXME TODO atomic_count_t prev = val->count; @@ -101,7 +93,5 @@ REQUIRES_EXTENT_MUTABLE(val) { - /* On real hardware the retrieving of the original - value and storing 1 have to be done as a single - atomic action. */ + // FIXME TODO atomic_count_t prev = val->count; @@ -114,4 +104,6 @@ REQUIRES_EXTENT_MUTABLE(val) { + // FIXME TODO + do { while (val->count); Index: kernel/arch/sparc32/include/arch/barrier.h =================================================================== --- kernel/arch/sparc32/include/arch/barrier.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/barrier.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -33,10 +33,8 @@ */ -#ifndef KERN_abs32le_BARRIER_H_ -#define KERN_abs32le_BARRIER_H_ +#ifndef KERN_sparc32_BARRIER_H_ +#define KERN_sparc32_BARRIER_H_ -/* - * Provisions are made to prevent compiler from reordering instructions itself. - */ +// FIXME TODO #define CS_ENTER_BARRIER() Index: kernel/arch/sparc32/include/arch/context.h =================================================================== --- kernel/arch/sparc32/include/arch/context.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/context.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -56,6 +56,6 @@ */ typedef struct { - uintptr_t sp; /* %o6 */ - uintptr_t pc; /* %o7 */ + uintptr_t sp; /* %o6 */ + uintptr_t pc; /* %o7 */ uint32_t i0; uint32_t i1; @@ -64,5 +64,5 @@ uint32_t i4; uint32_t i5; - uintptr_t fp; /* %i6 */ + uintptr_t fp; /* %i6 */ uintptr_t i7; uint32_t l0; Index: kernel/arch/sparc32/include/arch/context_offset.h =================================================================== --- kernel/arch/sparc32/include/arch/context_offset.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/context_offset.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -31,26 +31,29 @@ #define KERN_sparc32_CONTEXT_OFFSET_H_ -#define OFFSET_SP 0 -#define OFFSET_PC 4 -#define OFFSET_I0 8 -#define OFFSET_I1 12 -#define OFFSET_I2 16 -#define OFFSET_I3 20 -#define OFFSET_I4 24 -#define OFFSET_I5 28 -#define OFFSET_FP 32 -#define OFFSET_I7 36 -#define OFFSET_L0 40 -#define OFFSET_L1 44 -#define OFFSET_L2 48 -#define OFFSET_L3 52 -#define OFFSET_L4 56 -#define OFFSET_L5 60 -#define OFFSET_L6 64 -#define OFFSET_L7 68 +#define OFFSET_SP 0 +#define OFFSET_PC 4 +#define OFFSET_I0 8 +#define OFFSET_I1 12 +#define OFFSET_I2 16 +#define OFFSET_I3 20 +#define OFFSET_I4 24 +#define OFFSET_I5 28 +#define OFFSET_FP 32 +#define OFFSET_I7 36 +#define OFFSET_L0 40 +#define OFFSET_L1 44 +#define OFFSET_L2 48 +#define OFFSET_L3 52 +#define OFFSET_L4 56 +#define OFFSET_L5 60 +#define OFFSET_L6 64 +#define OFFSET_L7 68 #ifndef KERNEL -# define OFFSET_TP 72 + +#define OFFSET_TP 72 + #endif + #ifdef __ASM__ Index: kernel/arch/sparc32/include/arch/cpu.h =================================================================== --- kernel/arch/sparc32/include/arch/cpu.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/cpu.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -33,12 +33,7 @@ */ -#ifndef KERN_abs32le_CPU_H_ -#define KERN_abs32le_CPU_H_ +#ifndef KERN_sparc32_CPU_H_ +#define KERN_sparc32_CPU_H_ -/* - * On real hardware this structure stores - * information specific to the current - * CPU model. - */ typedef struct { } cpu_arch_t; Index: kernel/arch/sparc32/include/arch/cycle.h =================================================================== --- kernel/arch/sparc32/include/arch/cycle.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/cycle.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -33,6 +33,6 @@ */ -#ifndef KERN_abs32le_CYCLE_H_ -#define KERN_abs32le_CYCLE_H_ +#ifndef KERN_sparc32_CYCLE_H_ +#define KERN_sparc32_CYCLE_H_ #include @@ -40,4 +40,5 @@ NO_TRACE static inline uint64_t get_cycle(void) { + // FIXME TODO return 0; } Index: kernel/arch/sparc32/include/arch/exception.h =================================================================== --- kernel/arch/sparc32/include/arch/exception.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/exception.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -38,35 +38,35 @@ #define KERN_sparc32_EXCEPTION_H_ -#define TT_INSTRUCTION_ACCESS_EXCEPTION 0x01 -#define TT_INSTRUCTION_ACCESS_MMU_MISS 0x3c -#define TT_INSTRUCTION_ACCESS_ERROR 0x21 -#define TT_ILLEGAL_INSTRUCTION 0x02 -#define TT_PRIVILEGED_INSTRUCTION 0x03 -#define TT_FP_DISABLED 0x08 -#define TT_DIVISION_BY_ZERO 0x2a -#define TT_DATA_ACCESS_EXCEPTION 0x09 -#define TT_DATA_ACCESS_MMU_MISS 0x2c -#define TT_DATA_ACCESS_ERROR 0x29 -#define TT_MEM_ADDRESS_NOT_ALIGNED 0x07 +#define TT_INSTRUCTION_ACCESS_EXCEPTION 0x01 +#define TT_ILLEGAL_INSTRUCTION 0x02 +#define TT_PRIVILEGED_INSTRUCTION 0x03 +#define TT_MEM_ADDRESS_NOT_ALIGNED 0x07 +#define TT_FP_DISABLED 0x08 +#define TT_DATA_ACCESS_EXCEPTION 0x09 +#define TT_INSTRUCTION_ACCESS_ERROR 0x21 +#define TT_DATA_ACCESS_ERROR 0x29 +#define TT_DIVISION_BY_ZERO 0x2a +#define TT_DATA_ACCESS_MMU_MISS 0x2c +#define TT_INSTRUCTION_ACCESS_MMU_MISS 0x3c #ifndef __ASM__ -/*#include */ +extern void instruction_access_exception(int, istate_t *); +extern void instruction_access_error(int, istate_t *); +extern void illegal_instruction(int, istate_t *); +extern void privileged_instruction(int, istate_t *); +extern void fp_disabled(int, istate_t *); +extern void fp_exception(int, istate_t *); +extern void tag_overflow(int, istate_t *); +extern void division_by_zero(int, istate_t *); +extern void data_access_exception(int, istate_t *); +extern void data_access_error(int, istate_t *); +extern void data_access_mmu_miss(int, istate_t *); +extern void data_store_error(int, istate_t *); +extern void mem_address_not_aligned(int, istate_t *); -extern void instruction_access_exception(int n, istate_t *istate); -extern void instruction_access_error(int n, istate_t *istate); -extern void illegal_instruction(int n, istate_t *istate); -extern void privileged_instruction(int n, istate_t *istate); -extern void fp_disabled(int n, istate_t *istate); -extern void fp_exception(int n, istate_t *istate); -extern void tag_overflow(int n, istate_t *istate); -extern void division_by_zero(int n, istate_t *istate); -extern void data_access_exception(int n, istate_t *istate); -extern void data_access_error(int n, istate_t *istate); -extern void data_access_mmu_miss(int n, istate_t *istate); -extern void data_store_error(int n, istate_t *istate); -extern void mem_address_not_aligned(int n, istate_t *istate); -extern sysarg_t syscall(sysarg_t a1, sysarg_t a2, sysarg_t a3, sysarg_t a4, sysarg_t a5, sysarg_t a6, sysarg_t id); -extern void irq_exception(unsigned int nr, istate_t *istate); +extern sysarg_t syscall(sysarg_t, sysarg_t, sysarg_t, sysarg_t, sysarg_t, + sysarg_t, sysarg_t); +extern void irq_exception(unsigned int, istate_t *); #endif /* !__ASM__ */ Index: kernel/arch/sparc32/include/arch/faddr.h =================================================================== --- kernel/arch/sparc32/include/arch/faddr.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/faddr.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ Index: kernel/arch/sparc32/include/arch/fpu_context.h =================================================================== --- kernel/arch/sparc32/include/arch/fpu_context.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/fpu_context.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -33,6 +33,6 @@ */ -#ifndef KERN_abs32le_FPU_CONTEXT_H_ -#define KERN_abs32le_FPU_CONTEXT_H_ +#ifndef KERN_sparc32_FPU_CONTEXT_H_ +#define KERN_sparc32_FPU_CONTEXT_H_ #include @@ -40,8 +40,4 @@ #define FPU_CONTEXT_ALIGN 16 -/* - * On real hardware this stores the FPU registers - * which are part of the CPU context. - */ typedef struct { } fpu_context_t; Index: kernel/arch/sparc32/include/arch/interrupt.h =================================================================== --- kernel/arch/sparc32/include/arch/interrupt.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/interrupt.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32leinterrupt +/** @addtogroup sparc32interrupt * @{ */ @@ -33,6 +33,6 @@ */ -#ifndef KERN_abs32le_INTERRUPT_H_ -#define KERN_abs32le_INTERRUPT_H_ +#ifndef KERN_sparc32_INTERRUPT_H_ +#define KERN_sparc32_INTERRUPT_H_ #include Index: kernel/arch/sparc32/include/arch/istate.h =================================================================== --- kernel/arch/sparc32/include/arch/istate.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/istate.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -49,8 +49,4 @@ #endif /* KERNEL */ -/* - * On real hardware this stores the registers which - * need to be preserved during interupts. - */ typedef struct istate { uintptr_t pstate; @@ -63,7 +59,4 @@ REQUIRES_EXTENT_MUTABLE(istate) { - /* On real hardware this checks whether the interrupted - context originated from user space. */ - return !(istate->pc & UINT32_C(0x80000000)); } @@ -73,6 +66,4 @@ WRITES(&istate->ip) { - /* On real hardware this sets the instruction pointer. */ - istate->pc = retaddr; } @@ -81,6 +72,4 @@ REQUIRES_EXTENT_MUTABLE(istate) { - /* On real hardware this returns the instruction pointer. */ - return istate->pc; } @@ -89,7 +78,5 @@ REQUIRES_EXTENT_MUTABLE(istate) { - /* On real hardware this returns the frame pointer. */ - - return 0;//istate->fp; + return 0; } Index: kernel/arch/sparc32/include/arch/machine/leon3/leon3.h =================================================================== --- kernel/arch/sparc32/include/arch/machine/leon3/leon3.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/machine/leon3/leon3.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,19 +27,19 @@ */ -/** @addtogroup sparc32leon3 LEON3 - * @brief LEON3 System-on-chip. - * @ingroup arm32 +/** @addtogroup sparc32leon3 + * @brief LEON3 System-on-chip. + * @ingroup sparc32 * @{ */ -#ifndef KERN_sparc32_leon3_H_ -#define KERN_sparc32_leon3_H_ +#ifndef KERN_sparc32_LEON3_H_ +#define KERN_sparc32_LEON3_H_ #include +#define LEON3_SDRAM_START 0x40000000 +#define LEON3_IRQ_COUNT 15 + extern struct sparc_machine_ops leon3_machine_ops; - -#define LEON3_SDRAM_START 0x40000000 -#define LEON3_IRQ_COUNT 15 #endif Index: kernel/arch/sparc32/include/arch/machine_func.h =================================================================== --- kernel/arch/sparc32/include/arch/machine_func.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/machine_func.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -32,9 +32,9 @@ */ /** @file - * @brief Declarations of machine specific functions. + * @brief Declarations of machine specific functions. * - * These functions enable to differentiate more kinds of ARM emulators - * or CPUs. It's the same concept as "arch" functions on the architecture - * level. + * These functions enable to differentiate more kinds of SPARC emulators + * or CPUs. It is the same concept as "arch" functions on the architecture + * level. */ @@ -66,19 +66,17 @@ extern void machine_ops_init(void); -/** Maps HW devices to the kernel address space using #hw_map. */ +/** Map HW devices to the kernel address space using #hw_map. */ extern void machine_init(bootinfo_t *); - -/** Starts timer. */ +/** Start timer. */ extern void machine_timer_irq_start(void); - -/** Halts CPU. */ +/** Halt CPU. */ extern void machine_cpu_halt(void); /** Get extents of available memory. * - * @param start Place to store memory start address. - * @param size Place to store memory size. + * @param start Place to store memory start address. + * @param size Place to store memory size. */ extern void machine_get_memory_extents(uintptr_t *start, size_t *size); @@ -91,23 +89,16 @@ extern void machine_irq_exception(unsigned int exc_no, istate_t *istate); - -/* - * Machine specific frame initialization - */ +/** Machine specific frame initialization */ extern void machine_frame_init(void); -/* - * configure the serial line output device. - */ +/* Configure the serial line output device. */ extern void machine_output_init(void); -/* - * configure the serial line input device. - */ +/** Configure the serial line input device. */ extern void machine_input_init(void); extern size_t machine_get_irq_count(void); -extern const char * machine_get_platform_name(void); +extern const char *machine_get_platform_name(void); #endif Index: kernel/arch/sparc32/include/arch/mm/as.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/as.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/mm/as.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -55,5 +55,5 @@ #define as_invalidate_translation_cache(as, page, cnt) -uintptr_t as_context_table; +extern uintptr_t as_context_table; extern void as_arch_init(void); Index: kernel/arch/sparc32/include/arch/mm/frame.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/frame.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/mm/frame.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -33,6 +33,6 @@ */ -#ifndef KERN_abs32le_FRAME_H_ -#define KERN_abs32le_FRAME_H_ +#ifndef KERN_sparc32_FRAME_H_ +#define KERN_sparc32_FRAME_H_ #define FRAME_WIDTH 12 /* 4K */ @@ -41,9 +41,9 @@ #include -#define PHYSMEM_START_ADDR 0x40000000 +#define PHYSMEM_START_ADDR 0x40000000 -#define BOOT_PT_ADDRESS 0x40008000 -#define BOOT_PT_START_FRAME (BOOT_PT_ADDRESS >> FRAME_WIDTH) -#define BOOT_PT_SIZE_FRAMES 1 +#define BOOT_PT_ADDRESS 0x40008000 +#define BOOT_PT_START_FRAME (BOOT_PT_ADDRESS >> FRAME_WIDTH) +#define BOOT_PT_SIZE_FRAMES 1 extern void frame_low_arch_init(void); Index: kernel/arch/sparc32/include/arch/mm/km.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/km.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/mm/km.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -38,9 +38,9 @@ #include -#define KM_SPARC32_IDENTITY_START UINT32_C(0x80000000) -#define KM_SPARC32_IDENTITY_SIZE UINT32_C(0x70000000) +#define KM_SPARC32_IDENTITY_START UINT32_C(0x80000000) +#define KM_SPARC32_IDENTITY_SIZE UINT32_C(0x70000000) -#define KM_SPARC32_NON_IDENTITY_START UINT32_C(0xf0000000) -#define KM_SPARC32_NON_IDENTITY_SIZE UINT32_C(0xff00000) +#define KM_SPARC32_NON_IDENTITY_START UINT32_C(0xf0000000) +#define KM_SPARC32_NON_IDENTITY_SIZE UINT32_C(0xff00000) extern void km_identity_arch_init(void); Index: kernel/arch/sparc32/include/arch/mm/page.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/page.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/mm/page.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -48,16 +48,16 @@ #define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x40000000)) -#define PTE_ET_INVALID 0 -#define PTE_ET_DESCRIPTOR 1 -#define PTE_ET_ENTRY 2 - -#define PTE_ACC_USER_RO_KERNEL_RO 0 -#define PTE_ACC_USER_RW_KERNEL_RW 1 -#define PTE_ACC_USER_RX_KERNEL_RX 2 -#define PTE_ACC_USER_RWX_KERNEL_RWX 3 -#define PTE_ACC_USER_XO_KERNEL_XO 4 -#define PTE_ACC_USER_RO_KERNEL_RW 5 -#define PTE_ACC_USER_NO_KERNEL_RX 6 -#define PTE_ACC_USER_NO_KERNEL_RWX 7 +#define PTE_ET_INVALID 0 +#define PTE_ET_DESCRIPTOR 1 +#define PTE_ET_ENTRY 2 + +#define PTE_ACC_USER_RO_KERNEL_RO 0 +#define PTE_ACC_USER_RW_KERNEL_RW 1 +#define PTE_ACC_USER_RX_KERNEL_RX 2 +#define PTE_ACC_USER_RWX_KERNEL_RWX 3 +#define PTE_ACC_USER_XO_KERNEL_XO 4 +#define PTE_ACC_USER_RO_KERNEL_RW 5 +#define PTE_ACC_USER_NO_KERNEL_RX 6 +#define PTE_ACC_USER_NO_KERNEL_RWX 7 /* Number of entries in each level. */ @@ -143,16 +143,16 @@ /** Page Table Descriptor. */ typedef struct { - unsigned int table_pointer: 30; - unsigned int et: 2; + unsigned int table_pointer : 30; + unsigned int et : 2; } __attribute__((packed)) ptd_t; /** Page Table Entry. */ typedef struct { - unsigned int frame_address: 24; - unsigned int cacheable: 1; - unsigned int modified: 1; - unsigned int referenced: 1; - unsigned int acc: 3; - unsigned int et: 2; + unsigned int frame_address : 24; + unsigned int cacheable : 1; + unsigned int modified : 1; + unsigned int referenced : 1; + unsigned int acc : 3; + unsigned int et : 2; } __attribute__((packed)) pte_t; @@ -163,19 +163,15 @@ NO_TRACE static inline bool pte_is_writeable(pte_t *pt) { - return ( - pt->acc == PTE_ACC_USER_RW_KERNEL_RW || - pt->acc == PTE_ACC_USER_RWX_KERNEL_RWX || - pt->acc == PTE_ACC_USER_RO_KERNEL_RW || - pt->acc == PTE_ACC_USER_NO_KERNEL_RWX - ); + return ((pt->acc == PTE_ACC_USER_RW_KERNEL_RW) || + (pt->acc == PTE_ACC_USER_RWX_KERNEL_RWX) || + (pt->acc == PTE_ACC_USER_RO_KERNEL_RW) || + (pt->acc == PTE_ACC_USER_NO_KERNEL_RWX)); } NO_TRACE static inline bool pte_is_executable(pte_t *pt) { - return ( - pt->acc != PTE_ACC_USER_RO_KERNEL_RO && - pt->acc != PTE_ACC_USER_RW_KERNEL_RW && - pt->acc != PTE_ACC_USER_RO_KERNEL_RW - ); + return ((pt->acc != PTE_ACC_USER_RO_KERNEL_RO) && + (pt->acc != PTE_ACC_USER_RW_KERNEL_RW) && + (pt->acc != PTE_ACC_USER_RO_KERNEL_RW)); } @@ -184,25 +180,20 @@ { pte_t *p = &pt[i]; - - bool notpresent = p->et == 0; - - return ( - (p->cacheable << PAGE_CACHEABLE_SHIFT) | - (notpresent << PAGE_PRESENT_SHIFT) | - ((p->acc != PTE_ACC_USER_NO_KERNEL_RX && p->acc != PTE_ACC_USER_NO_KERNEL_RWX) << PAGE_USER_SHIFT) | - (1 << PAGE_READ_SHIFT) | - (( - p->acc == PTE_ACC_USER_RW_KERNEL_RW || - p->acc == PTE_ACC_USER_RWX_KERNEL_RWX || - p->acc == PTE_ACC_USER_RO_KERNEL_RW || - p->acc == PTE_ACC_USER_NO_KERNEL_RWX - ) << PAGE_WRITE_SHIFT) | - (( - p->acc != PTE_ACC_USER_RO_KERNEL_RO && - p->acc != PTE_ACC_USER_RW_KERNEL_RW && - p->acc != PTE_ACC_USER_RO_KERNEL_RW - ) << PAGE_EXEC_SHIFT) | - (1 << PAGE_GLOBAL_SHIFT) - ); + + bool notpresent = (p->et == 0); + + return ((p->cacheable << PAGE_CACHEABLE_SHIFT) | + (notpresent << PAGE_PRESENT_SHIFT) | + (((p->acc != PTE_ACC_USER_NO_KERNEL_RX) && + (p->acc != PTE_ACC_USER_NO_KERNEL_RWX)) << PAGE_USER_SHIFT) | + (1 << PAGE_READ_SHIFT) | + (((p->acc == PTE_ACC_USER_RW_KERNEL_RW) || + (p->acc == PTE_ACC_USER_RWX_KERNEL_RWX) || + (p->acc == PTE_ACC_USER_RO_KERNEL_RW) || + (p->acc == PTE_ACC_USER_NO_KERNEL_RWX)) << PAGE_WRITE_SHIFT) | + (((p->acc != PTE_ACC_USER_RO_KERNEL_RO) && + (p->acc != PTE_ACC_USER_RW_KERNEL_RW) && + (p->acc != PTE_ACC_USER_RO_KERNEL_RW)) << PAGE_EXEC_SHIFT) | + (1 << PAGE_GLOBAL_SHIFT)); } @@ -213,7 +204,6 @@ pte_t *p = &pt[i]; - p->et = (flags & PAGE_NOT_PRESENT) - ? PTE_ET_INVALID - : PTE_ET_DESCRIPTOR; + p->et = (flags & PAGE_NOT_PRESENT) ? + PTE_ET_INVALID : PTE_ET_DESCRIPTOR; } @@ -223,5 +213,5 @@ { pte_t *p = &pt[i]; - + p->et = PTE_ET_ENTRY; p->acc = PTE_ACC_USER_NO_KERNEL_RWX; @@ -240,8 +230,8 @@ } } - + if (flags & PAGE_NOT_PRESENT) p->et = PTE_ET_INVALID; - + p->cacheable = (flags & PAGE_CACHEABLE) != 0; } @@ -252,5 +242,5 @@ { pte_t *p = &pt[i]; - + p->et = PTE_ET_DESCRIPTOR; } @@ -261,5 +251,5 @@ { pte_t *p = &pt[i]; - + p->et = PTE_ET_ENTRY; } Index: kernel/arch/sparc32/include/arch/mm/page_fault.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/page_fault.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/mm/page_fault.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -50,10 +50,10 @@ typedef struct { unsigned int : 14; - unsigned int ebe: 8; - unsigned int l: 2; - unsigned int at: 3; - unsigned int ft: 3; - unsigned int fav: 1; - unsigned int ow: 1; + unsigned int ebe : 8; + unsigned int l : 2; + unsigned int at : 3; + unsigned int ft : 3; + unsigned int fav : 1; + unsigned int ow : 1; } __attribute__((packed)) mmu_fault_status_t; Index: kernel/arch/sparc32/include/arch/mm/tlb.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/tlb.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/mm/tlb.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -36,9 +36,9 @@ #define KERN_sparc32_TLB_H_ -#define MMU_CONTROL 0x000 -#define MMU_CONTEXT_TABLE 0x100 -#define MMU_CONTEXT 0x200 -#define MMU_FAULT_STATUS 0x300 -#define MMU_FAULT_ADDRESS 0x400 +#define MMU_CONTROL 0x000 +#define MMU_CONTEXT_TABLE 0x100 +#define MMU_CONTEXT 0x200 +#define MMU_FAULT_STATUS 0x300 +#define MMU_FAULT_ADDRESS 0x400 #endif Index: kernel/arch/sparc32/include/arch/proc/task.h =================================================================== --- kernel/arch/sparc32/include/arch/proc/task.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/proc/task.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32leproc +/** @addtogroup sparc32proc * @{ */ @@ -33,14 +33,10 @@ */ -#ifndef KERN_abs32le_TASK_H_ -#define KERN_abs32le_TASK_H_ +#ifndef KERN_sparc32_TASK_H_ +#define KERN_sparc32_TASK_H_ #include #include -/* - * On real hardware this structure stores task information - * specific to the architecture. - */ typedef struct { } task_arch_t; Index: kernel/arch/sparc32/include/arch/register.h =================================================================== --- kernel/arch/sparc32/include/arch/register.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/register.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -42,16 +42,16 @@ uint32_t value; struct { - unsigned int impl: 4; - unsigned int ver: 4; - unsigned int icc: 4; + unsigned int impl : 4; + unsigned int ver : 4; + unsigned int icc : 4; unsigned int : 6; - unsigned int ec: 1; - unsigned int ef: 1; - unsigned int pil: 4; - unsigned int s: 1; - unsigned int ps: 1; - unsigned int et: 1; - unsigned int cwp: 5; - } __attribute__ ((packed)); + unsigned int ec : 1; + unsigned int ef : 1; + unsigned int pil : 4; + unsigned int s : 1; + unsigned int ps : 1; + unsigned int et : 1; + unsigned int cwp : 5; + } __attribute__((packed)); } psr_reg_t; Index: kernel/arch/sparc32/include/arch/regwin.h =================================================================== --- kernel/arch/sparc32/include/arch/regwin.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/regwin.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -42,28 +42,26 @@ #include -#define UWB_ALIGNMENT 1024 +/* Window Save Area offsets. */ +#define L0_OFFSET 0 +#define L1_OFFSET 4 +#define L2_OFFSET 8 +#define L3_OFFSET 12 +#define L4_OFFSET 16 +#define L5_OFFSET 20 +#define L6_OFFSET 24 +#define L7_OFFSET 28 +#define I0_OFFSET 32 +#define I1_OFFSET 36 +#define I2_OFFSET 40 +#define I3_OFFSET 44 +#define I4_OFFSET 48 +#define I5_OFFSET 52 +#define I6_OFFSET 56 +#define I7_OFFSET 60 -/* Window Save Area offsets. */ -#define L0_OFFSET 0 -#define L1_OFFSET 4 -#define L2_OFFSET 8 -#define L3_OFFSET 12 -#define L4_OFFSET 16 -#define L5_OFFSET 20 -#define L6_OFFSET 24 -#define L7_OFFSET 28 -#define I0_OFFSET 32 -#define I1_OFFSET 36 -#define I2_OFFSET 40 -#define I3_OFFSET 44 -#define I4_OFFSET 48 -#define I5_OFFSET 52 -#define I6_OFFSET 56 -#define I7_OFFSET 60 - -/* Uspace Window Buffer constants. */ -#define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE) -#define UWB_ALIGNMENT 1024 -#define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT) +/* User space Window Buffer constants. */ +#define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE) +#define UWB_ALIGNMENT 1024 +#define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT) #endif Index: kernel/arch/sparc32/include/arch/stack.h =================================================================== --- kernel/arch/sparc32/include/arch/stack.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/stack.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -39,31 +39,29 @@ #include -#define MEM_STACK_SIZE STACK_SIZE +#define MEM_STACK_SIZE STACK_SIZE -#define STACK_ITEM_SIZE 4 - -/** According to SPARC Compliance Definition, every stack frame is 16-byte aligned. */ -#define STACK_ALIGNMENT 8 +#define STACK_ITEM_SIZE 4 +#define STACK_ALIGNMENT 8 /** * 16-extended-word save area for %i[0-7] and %l[0-7] registers. */ -#define STACK_WINDOW_SAVE_AREA_SIZE (16 * STACK_ITEM_SIZE) +#define STACK_WINDOW_SAVE_AREA_SIZE (16 * STACK_ITEM_SIZE) /** * Six extended words for first six arguments. */ -#define STACK_ARG_SAVE_AREA_SIZE (6 * STACK_ITEM_SIZE) +#define STACK_ARG_SAVE_AREA_SIZE (6 * STACK_ITEM_SIZE) -/* +/** * Offsets of arguments on stack. */ -#define STACK_ARG0 0 -#define STACK_ARG1 4 -#define STACK_ARG2 8 -#define STACK_ARG3 12 -#define STACK_ARG4 16 -#define STACK_ARG5 20 -#define STACK_ARG6 24 +#define STACK_ARG0 0 +#define STACK_ARG1 4 +#define STACK_ARG2 8 +#define STACK_ARG3 12 +#define STACK_ARG4 16 +#define STACK_ARG5 20 +#define STACK_ARG6 24 #endif Index: kernel/arch/sparc32/include/arch/trap.h =================================================================== --- kernel/arch/sparc32/include/arch/trap.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/trap.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -36,10 +36,12 @@ #define KERN_sparc32_TRAP_H_ -#define TRAP_ENTRY_SIZE 16 -#define TRAP_TABLE_COUNT 256 -#define TRAP_TABLE_SIZE (TRAP_ENTRY_SIZE * TRAP_TABLE_COUNT) +#define TRAP_ENTRY_SIZE 16 +#define TRAP_TABLE_COUNT 256 +#define TRAP_TABLE_SIZE (TRAP_ENTRY_SIZE * TRAP_TABLE_COUNT) #ifndef __ASM__ + extern void *trap_table; + #endif Index: kernel/arch/sparc32/include/arch/types.h =================================================================== --- kernel/arch/sparc32/include/arch/types.h (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/include/arch/types.h (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -33,6 +33,6 @@ */ -#ifndef KERN_sparc32le_TYPES_H_ -#define KERN_sparc32le_TYPES_H_ +#ifndef KERN_sparc32_TYPES_H_ +#define KERN_sparc32_TYPES_H_ #define ATOMIC_COUNT_MIN UINT32_MIN Index: kernel/arch/sparc32/src/context.S =================================================================== --- kernel/arch/sparc32/src/context.S (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/context.S (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -45,15 +45,20 @@ # them there even if e.g. the thread is migrated to another processor. # - #flushw - mov 7, %g1 -1: subcc %g1, 1, %g1 - bg 1b - save %sp, -64, %sp - + + ## flushw mov 7, %g1 -1: subcc %g1, 1, %g1 - bg 1b - restore - + 1: + subcc %g1, 1, %g1 + bg 1b + + save %sp, -64, %sp + + mov 7, %g1 + 1: + subcc %g1, 1, %g1 + bg 1b + + restore + CONTEXT_SAVE_ARCH_CORE %o0 retl @@ -70,21 +75,27 @@ # spills. # - #rdpr %pstate, %l0 - #andn %l0, PSTATE_IE_BIT, %l1 - #wrpr %l1, %pstate - #wrpr %g0, 0, %canrestore - #wrpr %g0, 0, %otherwin - #wrpr %g0, NWINDOWS - 2, %cansave - #wrpr %l0, %pstate + + ## rdpr %pstate, %l0 + ## andn %l0, PSTATE_IE_BIT, %l1 + ## wrpr %l1, %pstate + ## wrpr %g0, 0, %canrestore + ## wrpr %g0, 0, %otherwin + ## wrpr %g0, NWINDOWS - 2, %cansave + ## wrpr %l0, %pstate + mov 7, %g1 -1: subcc %g1, 1, %g1 - bg 1b - save %sp, -64, %sp - + 1: + subcc %g1, 1, %g1 + bg 1b + + save %sp, -64, %sp + mov 7, %g1 -1: subcc %g1, 1, %g1 - bg 1b - restore - + 1: + subcc %g1, 1, %g1 + bg 1b + + restore + CONTEXT_RESTORE_ARCH_CORE %o0 retl Index: kernel/arch/sparc32/src/cpu/cpu.c =================================================================== --- kernel/arch/sparc32/src/cpu/cpu.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/cpu/cpu.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -38,5 +38,4 @@ #include #include - void fpu_disable(void) @@ -56,5 +55,5 @@ } -void cpu_print_report(cpu_t* cpu) +void cpu_print_report(cpu_t *cpu) { } Index: kernel/arch/sparc32/src/ddi/ddi.c =================================================================== --- kernel/arch/sparc32/src/ddi/ddi.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/ddi/ddi.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32leddi +/** @addtogroup sparc32ddi * @{ */ Index: kernel/arch/sparc32/src/debug/stacktrace.c =================================================================== --- kernel/arch/sparc32/src/debug/stacktrace.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/debug/stacktrace.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -37,24 +37,28 @@ #include #include - #include #include -#define FRAME_OFFSET_FP_PREV 14 -#define FRAME_OFFSET_RA 15 +#define FRAME_OFFSET_FP_PREV 14 +#define FRAME_OFFSET_RA 15 -extern void alloc_window_and_flush(void); +static void alloc_window_and_flush(void) +{ + // FIXME TODO +} bool kernel_stack_trace_context_validate(stack_trace_context_t *ctx) { uintptr_t kstack; - uint32_t l1, l2; + uint32_t l1 + uint32_t l2; - read_from_invalid(&kstack, &l1, &l2); + read_from_invalid(&kstack, &l1, &l2); kstack -= 128; - - if (THREAD && (ctx->fp == kstack)) + + if ((THREAD) && (ctx->fp == kstack)) return false; - return ctx->fp != 0; + + return (ctx->fp != 0); } Index: kernel/arch/sparc32/src/exception.c =================================================================== --- kernel/arch/sparc32/src/exception.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/exception.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -56,6 +56,4 @@ { page_fault(n, istate); -// fault_if_from_uspace(istate, "%s.", __func__); -// panic_badtrap(istate, n, "%s.", __func__); } @@ -113,6 +111,4 @@ { page_fault(n, istate); -// fault_if_from_uspace(istate, "%s.", __func__); -// panic_badtrap(istate, n, "%s.", __func__); } @@ -121,6 +117,4 @@ { page_fault(n, istate); -// fault_if_from_uspace(istate, "%s.", __func__); -// panic_badtrap(istate, n, "%s.", __func__); } @@ -129,7 +123,6 @@ { page_fault(n, istate); -// fault_if_from_uspace(istate, "%s.", __func__); -// panic_badtrap(istate, n, "%s.", __func__); } + /** Handle data_access_error. (0x2c) */ void data_access_mmu_miss(int n, istate_t *istate) @@ -146,13 +139,7 @@ } -sysarg_t syscall(sysarg_t a1, sysarg_t a2, sysarg_t a3, sysarg_t a4, sysarg_t a5, sysarg_t a6, sysarg_t id) +sysarg_t syscall(sysarg_t a1, sysarg_t a2, sysarg_t a3, sysarg_t a4, + sysarg_t a5, sysarg_t a6, sysarg_t id) { -// printf("syscall %d\n", id); -// printf("args: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", a1, a2, a3, a4, a5, a6); -// if (id == 0x4f) { - // flush_windows(); - // return 0; - // } - return syscall_handler(a1, a2, a3, a4, a5, a6, id); } Index: kernel/arch/sparc32/src/machine/leon3/leon3.c =================================================================== --- kernel/arch/sparc32/src/machine/leon3/leon3.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/machine/leon3/leon3.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -38,11 +38,8 @@ #include #include - #include - #include #include #include - #include #include @@ -70,22 +67,20 @@ static const char *leon3_get_platform_name(void); -struct leon3_machine_t -{ +struct leon3_machine_t { bootinfo_t *bootinfo; outdev_t *scons_dev; grlib_irqmp_t irqmp; - //grlib_timer_t timer; }; struct sparc_machine_ops leon3_machine_ops = { - leon3_init, - leon3_cpu_halt, - leon3_get_memory_extents, - leon3_timer_start, - leon3_irq_exception, - leon3_output_init, - leon3_input_init, - leon3_get_irq_count, - leon3_get_platform_name + .machine_init = leon3_init, + .machine_cpu_halt = leon3_cpu_halt, + .machine_get_memory_extents = leon3_get_memory_extents, + .machine_timer_irq_start = leon3_timer_start, + .machine_irq_exception = leon3_irq_exception, + .machine_output_init = leon3_output_init, + .machine_input_init = leon3_input_init, + .machine_get_irq_count = leon3_get_irq_count, + .machine_get_platform_name = leon3_get_platform_name }; @@ -95,5 +90,4 @@ { machine.bootinfo = bootinfo; - grlib_irqmp_init(&machine.irqmp, bootinfo); } @@ -101,5 +95,6 @@ static void leon3_cpu_halt(void) { - for (;;); + // FIXME TODO + while (1); } @@ -107,18 +102,22 @@ { *start = LEON3_SDRAM_START; - *size = 64 * 1024 * 1024;//machine.bootinfo->memsize; + *size = 64 * 1024 * 1024; + // FIXME: *size = machine.bootinfo->memsize; } static void leon3_timer_start(void) { - //machine.timer = grlib_timer_init(machine.bootinfo->timer_base, machine.bootinfo->timer_irq); + // FIXME: + // machine.timer = + // grlib_timer_init(machine.bootinfo->timer_base, + // machine.bootinfo->timer_irq); } -static void leon3_irq_exception(unsigned int exc_no, istate_t *istate) +static void leon3_irq_exception(unsigned int exc, istate_t *istate) { int irqnum = grlib_irqmp_inum_get(&machine.irqmp); - + grlib_irqmp_clear(&machine.irqmp, irqnum); - + irq_t *irq = irq_dispatch_and_lock(irqnum); if (irq) { @@ -131,9 +130,8 @@ static void leon3_output_init(void) { - printf("leon3_output_init\n"); - printf("machine.bootinfo=%p, machine.bootinfo->uart_base=0x%08x\n", machine.bootinfo, machine.bootinfo->uart_base); - - machine.scons_dev = grlib_uart_init(machine.bootinfo->uart_base, machine.bootinfo->uart_irq); - + machine.scons_dev = + grlib_uart_init(machine.bootinfo->uart_base, + machine.bootinfo->uart_irq); + if (machine.scons_dev) stdout_wire(machine.scons_dev); @@ -148,5 +146,5 @@ /* Create input device. */ scons_inst = (void *)machine.scons_dev->data; - + srln_instance_t *srln_instance = srln_init(); if (srln_instance) { @@ -154,7 +152,8 @@ indev_t *srln = srln_wire(srln_instance, sink); grlib_uart_input_wire(scons_inst, srln); - + /* Enable interrupts from UART */ - grlib_irqmp_unmask(&machine.irqmp, machine.bootinfo->uart_irq); + grlib_irqmp_unmask(&machine.irqmp, + machine.bootinfo->uart_irq); } } @@ -171,4 +170,2 @@ return "LEON3"; } - - Index: kernel/arch/sparc32/src/machine_func.c =================================================================== --- kernel/arch/sparc32/src/machine_func.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/machine_func.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -31,9 +31,9 @@ */ /** @file - * @brief Definitions of machine specific functions. + * @brief Definitions of machine specific functions. * - * These functions enable to differentiate more kinds of sparc emulators - * or CPUs. It's the same concept as "arch" functions on the architecture - * level. + * These functions enable to differentiate more kinds of SPARC emulators + * or CPUs. It's the same concept as "arch" functions on the architecture + * level. */ @@ -54,58 +54,54 @@ } -/** Maps HW devices to the kernel address space using #hw_map. */ +/** Map HW devices to the kernel address space using #hw_map. */ void machine_init(bootinfo_t *bootinfo) { - (machine_ops->machine_init)(bootinfo); + machine_ops->machine_init(bootinfo); } - -/** Starts timer. */ +/** Start timer. */ void machine_timer_irq_start(void) { - (machine_ops->machine_timer_irq_start)(); + machine_ops->machine_timer_irq_start(); } - -/** Halts CPU. */ +/** Halt CPU. */ void machine_cpu_halt(void) { - (machine_ops->machine_cpu_halt)(); + machine_ops->machine_cpu_halt(); } /** Get extents of available memory. * - * @param start Place to store memory start address. - * @param size Place to store memory size. + * @param start Place to store memory start address. + * @param size Place to store memory size. + * */ void machine_get_memory_extents(uintptr_t *start, size_t *size) { - (machine_ops->machine_get_memory_extents)(start, size); + machine_ops->machine_get_memory_extents(start, size); } /** Interrupt exception handler. * - * @param exc_no Interrupt exception number. + * @param exc Interrupt exception number. * @param istate Saved processor state. + * */ -void machine_irq_exception(unsigned int exc_no, istate_t *istate) +void machine_irq_exception(unsigned int exc, istate_t *istate) { - (machine_ops->machine_irq_exception)(exc_no, istate); + machine_ops->machine_irq_exception(exc, istate); } -/* - * configure the output device. - */ +/** Configure the output device. */ void machine_output_init(void) { - (machine_ops->machine_output_init)(); + machine_ops->machine_output_init(); } -/* - * configure the input device. - */ +/** Configure the input device. */ void machine_input_init(void) { - (machine_ops->machine_input_init)(); + machine_ops->machine_input_init(); } @@ -113,13 +109,15 @@ size_t machine_get_irq_count(void) { - return (machine_ops->machine_get_irq_count)(); + return machine_ops->machine_get_irq_count(); } -const char * machine_get_platform_name(void) +const char *machine_get_platform_name(void) { if (machine_ops->machine_get_platform_name) return machine_ops->machine_get_platform_name(); + return NULL; } + /** @} */ Index: kernel/arch/sparc32/src/mm/as.c =================================================================== --- kernel/arch/sparc32/src/mm/as.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/mm/as.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -38,18 +38,16 @@ #include -static ptd_t context_table[ASID_MAX_ARCH] __attribute__((aligned (1024))); +static ptd_t context_table[ASID_MAX_ARCH] __attribute__((aligned(1024))); void as_arch_init(void) { as_operations = &as_pt_operations; - as_context_table = (uintptr_t)&context_table; + as_context_table = (uintptr_t) &context_table; } void as_install_arch(as_t *as) { - printf("as_install_arch(asid=%d)\n", as->asid); - printf("genarch.page_table=%p\n", as->genarch.page_table); - - context_table[as->asid].table_pointer = (uintptr_t)as->genarch.page_table >> 6; + context_table[as->asid].table_pointer = + (uintptr_t) as->genarch.page_table >> 6; context_table[as->asid].et = PTE_ET_DESCRIPTOR; asi_u32_write(ASI_MMUREGS, 0x200, as->asid); Index: kernel/arch/sparc32/src/mm/frame.c =================================================================== --- kernel/arch/sparc32/src/mm/frame.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/mm/frame.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -46,7 +46,6 @@ uintptr_t base; size_t size; - machine_get_memory_extents(&base, &size); - + base = ALIGN_UP(base, FRAME_SIZE); size = ALIGN_DOWN(size, FRAME_SIZE); @@ -54,11 +53,9 @@ if (!frame_adjust_zone_bounds(low, &base, &size)) return; - + if (low) { zone_create(ADDR2PFN(base), SIZE2FRAMES(size), BOOT_PT_START_FRAME + BOOT_PT_SIZE_FRAMES, ZONE_AVAILABLE | ZONE_LOWMEM); - - printf("low_zone: %d frames\n", SIZE2FRAMES(size)); } else { pfn_t conf = zone_external_conf_alloc(SIZE2FRAMES(size)); @@ -66,14 +63,10 @@ zone_create(ADDR2PFN(base), SIZE2FRAMES(size), conf, ZONE_AVAILABLE | ZONE_HIGHMEM); - - printf("high zone: %d frames\n", SIZE2FRAMES(size)); } - - printf("free: %d\n", frame_total_free_get()); } void physmem_print(void) { - + // FIXME TODO } @@ -82,9 +75,7 @@ { frame_common_arch_init(true); - - /* blacklist boot page table */ + + /* Blacklist boot page table */ frame_mark_unavailable(BOOT_PT_START_FRAME, BOOT_PT_SIZE_FRAMES); - printf("free: %d\n", frame_total_free_get()); - //machine_frame_init(); } @@ -95,12 +86,4 @@ } -/** Frees the boot page table. */ -/*void boot_page_table_free(void) -{ - unsigned int i; - for (i = 0; i < BOOT_PT_SIZE_FRAMES; i++) - frame_free(i * FRAME_SIZE + BOOT_PT_ADDRESS); -}*/ - /** @} */ Index: kernel/arch/sparc32/src/mm/page.c =================================================================== --- kernel/arch/sparc32/src/mm/page.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/mm/page.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32lemm +/** @addtogroup sparc32mm * @{ */ @@ -57,27 +57,23 @@ int flags = PAGE_CACHEABLE | PAGE_EXEC; page_mapping_operations = &pt_mapping_operations; - + page_table_lock(AS_KERNEL, true); /* Kernel identity mapping */ - //FIXME: We need to consider the possibility that - //identity_base > identity_size and physmem_end. - //This might lead to overflow if identity_size is too big. + // FIXME: + // We need to consider the possibility that + // identity_base > identity_size and physmem_end. + // This might lead to overflow if identity_size is too big. for (uintptr_t cur = PHYSMEM_START_ADDR; cur < min(KA2PA(config.identity_base) + - config.identity_size, config.physmem_end); + config.identity_size, config.physmem_end); cur += FRAME_SIZE) page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); - page_table_unlock(AS_KERNEL, true); as_switch(NULL, AS_KERNEL); - -// printf("as_context_table=0x%08x\n", as_context_table); - + /* Switch MMU to new context table */ asi_u32_write(ASI_MMUREGS, MMU_CONTEXT_TABLE, KA2PA(as_context_table) >> 4); - - //boot_page_table_free(); } @@ -86,21 +82,19 @@ uint32_t fault_status = asi_u32_read(ASI_MMUREGS, MMU_FAULT_STATUS); uintptr_t fault_address = asi_u32_read(ASI_MMUREGS, MMU_FAULT_ADDRESS); - mmu_fault_status_t *fault = (mmu_fault_status_t *)&fault_status; - mmu_fault_type_t type = (mmu_fault_type_t)fault->at; - -// printf("page fault on address 0x%08x, status 0x%08x, type %d\n", fault_address, fault_status, type); - - if (type == FAULT_TYPE_LOAD_USER_DATA || - type == FAULT_TYPE_LOAD_SUPERVISOR_DATA) + mmu_fault_status_t *fault = (mmu_fault_status_t *) &fault_status; + mmu_fault_type_t type = (mmu_fault_type_t) fault->at; + + if ((type == FAULT_TYPE_LOAD_USER_DATA) || + (type == FAULT_TYPE_LOAD_SUPERVISOR_DATA)) as_page_fault(fault_address, PF_ACCESS_READ, istate); - if (type == FAULT_TYPE_EXECUTE_USER || - type == FAULT_TYPE_EXECUTE_SUPERVISOR) + if ((type == FAULT_TYPE_EXECUTE_USER) || + (type == FAULT_TYPE_EXECUTE_SUPERVISOR)) as_page_fault(fault_address, PF_ACCESS_EXEC, istate); - if (type == FAULT_TYPE_STORE_USER_DATA || - type == FAULT_TYPE_STORE_USER_INSTRUCTION || - type == FAULT_TYPE_STORE_SUPERVISOR_INSTRUCTION || - type == FAULT_TYPE_STORE_SUPERVISOR_DATA) + if ((type == FAULT_TYPE_STORE_USER_DATA) || + (type == FAULT_TYPE_STORE_USER_INSTRUCTION) || + (type == FAULT_TYPE_STORE_SUPERVISOR_INSTRUCTION) || + (type == FAULT_TYPE_STORE_SUPERVISOR_DATA)) as_page_fault(fault_address, PF_ACCESS_WRITE, istate); } Index: kernel/arch/sparc32/src/mm/tlb.c =================================================================== --- kernel/arch/sparc32/src/mm/tlb.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/mm/tlb.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32lemm +/** @addtogroup sparc32mm * @{ */ @@ -45,5 +45,6 @@ } -void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, size_t cnt) +void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, + size_t cnt) { tlb_invalidate_all(); Index: kernel/arch/sparc32/src/proc/scheduler.c =================================================================== --- kernel/arch/sparc32/src/proc/scheduler.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/proc/scheduler.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32leproc +/** @addtogroup sparc32proc * @{ */ @@ -58,5 +58,5 @@ uint32_t l7; read_from_invalid(&kernel_sp, &uspace_wbuf, &l7); - THREAD->arch.uspace_window_buffer = (uint8_t *)uspace_wbuf; + THREAD->arch.uspace_window_buffer = (uint8_t *) uspace_wbuf; } } Index: kernel/arch/sparc32/src/proc/task.c =================================================================== --- kernel/arch/sparc32/src/proc/task.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/proc/task.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32leproc +/** @addtogroup sparc32proc * @{ */ Index: kernel/arch/sparc32/src/proc/thread.c =================================================================== --- kernel/arch/sparc32/src/proc/thread.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/proc/thread.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32leproc +/** @addtogroup sparc32proc * @{ */ @@ -64,5 +64,5 @@ } else { uintptr_t uw_buf = (uintptr_t) t->arch.uspace_window_buffer; - + /* * Mind the possible alignment of the userspace window buffer Index: kernel/arch/sparc32/src/regwin_test.S =================================================================== --- kernel/arch/sparc32/src/regwin_test.S (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ (revision ) @@ -1,106 +1,0 @@ -.global func1 -.global func2 -.global func3 -.global func4 -.global func5 -.global func6 -.global func7 -.global func8 -.global func9 -.global func10 -.global func11 -.global func12 - -func1: - save %sp, -96, %sp - set 1, %l7 - call func2 - nop - ret - restore - -func2: - save %sp, -96, %sp - set 2, %l7 - call func3 - nop - ret - restore - -func3: - save %sp, -96, %sp - set 3, %l7 - call func4 - nop - ret - restore - -func4: - save %sp, -96, %sp - set 4, %l7 - call func5 - nop - ret - restore - -func5: - save %sp, -96, %sp - set 5, %l7 - call func6 - nop - ret - restore - -func6: - save %sp, -96, %sp - set 6, %l7 - call func7 - nop - ret - restore - -func7: - save %sp, -96, %sp - set 7, %l7 - call func8 - nop - ret - restore - -func8: - save %sp, -96, %sp - set 8, %l7 - call func9 - nop - ret - restore - -func9: - save %sp, -96, %sp - set 9, %l7 - call func10 - nop - ret - restore - -func10: - save %sp, -96, %sp - set 10, %l7 - call func11 - nop - ret - restore - -func11: - save %sp, -96, %sp - set 11, %l7 - call func12 - nop - ret - restore - -func12: - save %sp, -96, %sp - set 12, %l7 - ret - restore Index: kernel/arch/sparc32/src/smp/ipi.c =================================================================== --- kernel/arch/sparc32/src/smp/ipi.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/smp/ipi.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ Index: kernel/arch/sparc32/src/smp/smp.c =================================================================== --- kernel/arch/sparc32/src/smp/smp.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/smp/smp.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ Index: kernel/arch/sparc32/src/sparc32.c =================================================================== --- kernel/arch/sparc32/src/sparc32.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/sparc32.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -38,5 +38,4 @@ #include #include - #include #include @@ -54,7 +53,7 @@ #include -char memcpy_from_uspace_failover_address; -char memcpy_to_uspace_failover_address; -bootinfo_t machine_bootinfo; +static char memcpy_from_uspace_failover_address; +static char memcpy_to_uspace_failover_address; +static bootinfo_t machine_bootinfo; void arch_pre_main(void *unused, bootinfo_t *bootinfo) @@ -62,7 +61,6 @@ init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); memcpy(&machine_bootinfo, bootinfo, sizeof(machine_bootinfo)); - - size_t i; - for (i = 0; i < init.cnt; i++) { + + for (size_t i = 0; i < init.cnt; i++) { init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr); init.tasks[i].size = bootinfo->tasks[i].size; @@ -70,5 +68,5 @@ bootinfo->tasks[i].name); } - + machine_ops_init(); } @@ -82,10 +80,6 @@ void arch_post_mm_init(void) { - /* Test register windows */ - write_to_invalid(0xdeadbeef, 0xcafebabe, 0); - func1(); - machine_init(&machine_bootinfo); - + if (config.cpu_active == 1) { /* Initialize IRQ routing */ @@ -95,5 +89,5 @@ zone_merge_all(); } - + machine_output_init(); } @@ -110,5 +104,4 @@ void arch_post_smp_init(void) { -// machine_input_init(); } Index: kernel/arch/sparc32/src/start.S =================================================================== --- kernel/arch/sparc32/src/start.S (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/start.S (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -38,31 +38,31 @@ set trap_table, %g1 mov %g1, %tbr - - mov %psr, %g1 ! Initialize WIM - add %g1, 1, %g2 - and %g2, 0x7, %g2 - set 1, %g3 - sll %g3, %g2, %g3 - mov %g3, %wim - - or %g1, 0x20, %g1 - or %g1, 0xf00, %g1 ! PIL - wr %g1, %psr - - set boot_stack, %sp - mov %sp, %fp - sub %sp, 96, %sp - - mov %o1, %l1 - set 0xdeadbeef, %o0 - set 0xdeadbeef, %o1 - set 0, %o2 + + mov %psr, %g1 ! Initialize WIM + add %g1, 1, %g2 + and %g2, 0x7, %g2 + set 1, %g3 + sll %g3, %g2, %g3 + mov %g3, %wim + + or %g1, 0x20, %g1 + or %g1, 0xf00, %g1 ! PIL + wr %g1, %psr + + set boot_stack, %sp + mov %sp, %fp + sub %sp, 96, %sp + + mov %o1, %l1 + set 0xdeadbeef, %o0 + set 0xdeadbeef, %o1 + set 0, %o2 call write_to_invalid nop - - mov %l1, %o1 + + mov %l1, %o1 call arch_pre_main nop - + call main_bsp nop @@ -72,9 +72,12 @@ cmp %o0, '\n' bne skip + set '\r', %l1 sta %l1, [%l0] 0x1c -skip: sta %o0, [%l0] 0x1c - retl - nop + + skip: + sta %o0, [%l0] 0x1c + retl + nop kernel_sp: Index: kernel/arch/sparc32/src/trap_table.S =================================================================== --- kernel/arch/sparc32/src/trap_table.S (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/trap_table.S (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -46,12 +46,15 @@ clr \reg mov %wim, %g5 -1: andcc %g5, 1, %g0 - bne 2f - nop - srl %g5, 1, %g5 - inc \reg - b 1b -2: nop - + + 1: + andcc %g5, 1, %g0 + bne 2f + nop + srl %g5, 1, %g5 + inc \reg + b 1b + + 2: + nop .endm @@ -63,19 +66,19 @@ .macro switch_to_invalid saved_wim, saved_psr get_wim_number %l3 - mov %wim, \saved_wim ! save WIM - mov %g0, %wim ! clear WIM - mov %psr, \saved_psr ! read PSR + mov %wim, \saved_wim ! save WIM + mov %g0, %wim ! clear WIM + mov %psr, \saved_psr ! read PSR and \saved_psr, 0xfffffff0, %l4 - or %l4, %l3, %l3 ! set CWP - mov %l3, %psr ! write PSR - nop - nop - nop - nop ! wait for PSR to be effective -.endm + or %l4, %l3, %l3 ! set CWP + mov %l3, %psr ! write PSR + nop + nop + nop + nop ! wait for PSR to be effective +.endm .macro switch_back wim, psr - mov \wim, %wim ! saved WIM - mov \psr, %psr ! saved PSR + mov \wim, %wim ! saved WIM + mov \psr, %psr ! saved PSR nop nop @@ -89,15 +92,15 @@ sll %l3, 7, %l4 srl %l3, 1, %l3 - or %l3, %l4, %l3 + or %l3, %l4, %l3 and %l3, 0xff, %l3 mov %g0, %wim - + mov %l5, %g5 mov %l6, %g6 mov %l7, %g7 - + save - std %l0, [%sp + 0] - std %l2, [%sp + 8] + std %l0, [%sp + 0] + std %l2, [%sp + 8] std %l4, [%sp + 16] std %l6, [%sp + 24] @@ -117,16 +120,16 @@ sll %l3, 7, %l4 srl %l3, 1, %l3 - or %l3, %l4, %l3 + or %l3, %l4, %l3 and %l3, 0xff, %l3 mov %g0, %wim mov \uwb, %g3 - + mov %l5, %g5 mov %l6, %g6 mov %l7, %g7 - + save - std %l0, [%g3 + 0] - std %l2, [%g3 + 8] + std %l0, [%g3 + 0] + std %l2, [%g3 + 8] std %l4, [%g3 + 16] std %l6, [%g3 + 24] @@ -148,5 +151,5 @@ srl %l3, 7, %l4 sll %l3, 1, %l3 - or %l3, %l4, %l3 + or %l3, %l4, %l3 and %l3, 0xff, %l3 @@ -160,14 +163,14 @@ mov %g6, %l6 mov %g7, %l7 - save - - ldd [%sp + 0], %l0 - ldd [%sp + 8], %l2 - ldd [%sp + 16], %l4 - ldd [%sp + 24], %l6 - ldd [%sp + 32], %i0 - ldd [%sp + 40], %i2 - ldd [%sp + 48], %i4 - ldd [%sp + 56], %i6 + save + + ldd [%sp + 0], %l0 + ldd [%sp + 8], %l2 + ldd [%sp + 16], %l4 + ldd [%sp + 24], %l6 + ldd [%sp + 32], %i0 + ldd [%sp + 40], %i2 + ldd [%sp + 48], %i4 + ldd [%sp + 56], %i6 save @@ -179,7 +182,7 @@ srl %l3, 7, %l4 sll %l3, 1, %l3 - or %l3, %l4, %l3 + or %l3, %l4, %l3 and %l3, 0xff, %l3 - + mov %g0, %wim restore @@ -191,9 +194,9 @@ mov %g6, %l6 mov %g7, %l7 - save - + save + sub \uwb, 64, \uwb - ldd [\uwb + 0], %l0 - ldd [\uwb + 8], %l2 + ldd [\uwb + 0], %l0 + ldd [\uwb + 8], %l2 ldd [\uwb + 16], %l4 ldd [\uwb + 24], %l6 @@ -203,5 +206,5 @@ ldd [\uwb + 56], %i6 save - + mov %l3, %wim .endm @@ -261,5 +264,5 @@ window_overflow_trap: mov %g7, %l0 - + /* Check whether previous mode was usermode */ mov %psr, %l4 @@ -268,9 +271,12 @@ bne 1f nop - - /* userspace: */ - /* time to check whether desired stack page is mapped - * on the MMU. if so, process with saving window directly. - * if not, go to preemptible trap handler */ + + /* User space: */ + + /* + * Time to check whether desired stack page is mapped + * on the MMU. If so, process with saving window directly. + * If not, go to preemptible trap handler. + */ mov %wim, %g5 mov %g0, %wim @@ -279,5 +285,5 @@ restore mov %g5, %wim - + /* Check beginning of %sp */ and %g4, 0xfffff000, %l4 @@ -286,11 +292,11 @@ bne 1f nop - - /* prepare args for preemptible handler */ + + /* Prepare args for preemptible handler */ mov %g4, %o0 set preemptible_save_uspace, %o2 b preemptible_trap nop - + /* Check end of %sp */ add %g4, 56, %g4 @@ -300,40 +306,42 @@ bne 1f nop - - /* prepare args for preemptible handler */ + + /* Prepare args for preemptible handler */ mov %g4, %o0 set preemptible_save_uspace, %o2 b preemptible_trap nop - - /* kernel: */ -1: /* rotate WIM on bit right, we have 8 windows */ - mov %wim, %l3 - sll %l3, 7, %l4 - srl %l3, 1, %l3 - or %l3, %l4, %l3 - and %l3, 0xff, %l3 - - /* disable WIM traps */ - mov %g0,%wim - nop; nop; nop - - /* Save invalid window data */ - mov %l5, %g5 ! kernel stack pointer - mov %l6, %g6 ! kernel wbuf - mov %l7, %g7 - - - /* we should check whether window needs to be saved - * to kernel stack or uwb - */ - cmp %g7, 0 - bne 2f - nop - - /* dump registers to stack */ + + /* Kernel: */ + + 1: + /* Rotate WIM on bit right, we have 8 windows */ + mov %wim, %l3 + sll %l3, 7, %l4 + srl %l3, 1, %l3 + or %l3, %l4, %l3 + and %l3, 0xff, %l3 + + /* Disable WIM traps */ + mov %g0,%wim + nop; nop; nop + + /* Save invalid window data */ + mov %l5, %g5 ! kernel stack pointer + mov %l6, %g6 ! kernel wbuf + mov %l7, %g7 + + /* + * We should check whether window needs to be saved + * to kernel stack or uwb. + */ + cmp %g7, 0 + bne 2f + nop + + /* Dump registers to stack */ save - std %l0, [%sp + 0] - std %l2, [%sp + 8] + std %l0, [%sp + 0] + std %l2, [%sp + 8] std %l4, [%sp + 16] std %l6, [%sp + 24] @@ -344,46 +352,48 @@ b 3f nop - - /* dump registers to uwb */ -2: save - std %l0, [%g6 + 0] - std %l2, [%g6 + 8] - std %l4, [%g6 + 16] - std %l6, [%g6 + 24] - std %i0, [%g6 + 32] - std %i2, [%g6 + 40] - std %i4, [%g6 + 48] - std %i6, [%g6 + 56] - add %g6, 64, %g6 - - /* check whether it's the last user window to be saved */ - and %g7, 0x7, %l5 - mov %psr, %l4 - and %l4, 0x7, %l4 - cmp %l5, %l4 - bne 3f - nop - - /* clear uspace window mark */ + + /* Dump registers to uwb */ + 2: + save + std %l0, [%g6 + 0] + std %l2, [%g6 + 8] + std %l4, [%g6 + 16] + std %l6, [%g6 + 24] + std %i0, [%g6 + 32] + std %i2, [%g6 + 40] + std %i4, [%g6 + 48] + std %i6, [%g6 + 56] + add %g6, 64, %g6 + + /* Check whether it's the last user window to be saved */ + and %g7, 0x7, %l5 + mov %psr, %l4 + and %l4, 0x7, %l4 + cmp %l5, %l4 + bne 3f + nop + + /* Clear uspace window mark */ clr %g7 - -3: /* back to where we should be */ - mov %g5, %l5 - mov %g6, %l6 - mov %g7, %l7 - restore - - /* set new value of window */ - mov %l3,%wim - nop; nop; nop - - /* go home */ - mov %l0, %g7 - jmp %l1 - rett %l2 + + 3: + /* Back to where we should be */ + mov %g5, %l5 + mov %g6, %l6 + mov %g7, %l7 + restore + + /* Set new value of window */ + mov %l3,%wim + nop; nop; nop + + /* Go home */ + mov %l0, %g7 + jmp %l1 + rett %l2 window_underflow_trap: mov %g7, %l0 - + /* Check whether previous mode was usermode */ mov %psr, %l4 @@ -392,9 +402,12 @@ bne 1f nop - - /* userspace: */ - /* time to check whether desired stack page is mapped - * on the MMU. if so, process with saving window directly. - * if not, go to preemptible trap handler */ + + /* User space: */ + + /* + * Time to check whether desired stack page is mapped + * on the MMU. If so, process with saving window directly. + * If not, go to preemptible trap handler. + */ mov %wim, %g5 mov %g0, %wim @@ -410,76 +423,81 @@ bne 1f nop - - /* prepare args for preemptible handler */ + + /* Prepare args for preemptible handler */ mov %g4, %o0 set preemptible_restore_uspace, %o2 b preemptible_trap nop - - /* rotate WIM on bit LEFT, we have 8 windows */ -1: mov %wim,%l3 - srl %l3,7,%l4 - sll %l3,1,%l3 - or %l3,%l4,%l3 - and %l3, 0xff,%l3 - - /* disable WIM traps */ - mov %g0,%wim - nop; nop; nop - - /* kernel: */ + + + 1: + /* Rotate WIM on bit LEFT, we have 8 windows */ + mov %wim, %l3 + srl %l3, 7, %l4 + sll %l3, 1, %l3 + or %l3, %l4, %l3 + and %l3, 0xff, %l3 + + /* Disable WIM traps */ + mov %g0, %wim + nop; nop; nop + + /* Kernel: */ restore restore - mov %l5, %g5 ! kernel stack pointer - mov %l6, %g6 ! kernel wbuf + mov %l5, %g5 ! kernel stack pointer + mov %l6, %g6 ! kernel wbuf mov %l7, %g7 - - ldd [%sp + 0], %l0 - ldd [%sp + 8], %l2 - ldd [%sp + 16], %l4 - ldd [%sp + 24], %l6 - ldd [%sp + 32], %i0 - ldd [%sp + 40], %i2 - ldd [%sp + 48], %i4 - ldd [%sp + 56], %i6 + + ldd [%sp + 0], %l0 + ldd [%sp + 8], %l2 + ldd [%sp + 16], %l4 + ldd [%sp + 24], %l6 + ldd [%sp + 32], %i0 + ldd [%sp + 40], %i2 + ldd [%sp + 48], %i4 + ldd [%sp + 56], %i6 b 2f nop - -2: /* Restore invalid window data */ - restore - mov %g5, %l5 - mov %g6, %l6 - mov %g7, %l7 - save - save - save - - /* Set new value of window */ - mov %l3,%wim - nop; nop; nop - - /* go home */ - mov %l0, %g7 - jmp %l1 - rett %l2 + + 2: + /* Restore invalid window data */ + restore + mov %g5, %l5 + mov %g6, %l6 + mov %g7, %l7 + save + save + save + + /* Set new value of window */ + mov %l3, %wim + nop; nop; nop + + /* Go home */ + mov %l0, %g7 + jmp %l1 + rett %l2 flush_windows: - mov 7, %g1 -1: subcc %g1, 1, %g1 - bg 1b - save %sp, -64, %sp - mov 7, %g1 -1: subcc %g1, 1, %g1 - bg 1b - restore - - retl - nop + 1: + subcc %g1, 1, %g1 + bg 1b + save %sp, -64, %sp + + mov 7, %g1 + 1: + subcc %g1, 1, %g1 + bg 1b + restore + + retl + nop preemptible_trap: /* Save %g7 */ mov %g7, %l0 - + /* Check whether we landed in invalid window */ get_wim_number %g6 @@ -488,13 +506,13 @@ bne 4f nop - - /* We are in invalid window. Check whether previous mode was usermode */ + + /* We are in invalid window. Check whether previous mode was usermode. */ if_from_kernel 3f - - /* Trap originated from uspace */ + + /* Trap originated from user space */ /* Kernel stack pointer is at %l5, uwb is at %l6 */ inline_save_uspace %l6 - - /* set uspace window mark */ + + /* Set uspace window mark */ mov %psr, %l7 inc %l7 @@ -503,14 +521,16 @@ b 4f nop - -3: /* Trap originated from kernel */ - inline_save_kernel - -4: /* Check whether previous mode was usermode */ - if_from_kernel 5f - + + 3: + /* Trap originated from kernel */ + inline_save_kernel + + 4: + /* Check whether previous mode was user mode */ + if_from_kernel 5f + /* Load kernel stack pointer from invalid window */ switch_to_invalid %g5, %g6 - + /* set uspace window mark */ mov %g6, %l7 @@ -518,118 +538,84 @@ and %l7, 0x7, %l7 or %l7, 0x10, %l7 - + /* Save stack pointer */ mov %l5, %g7 switch_back %g5, %g6 mov %g7, %sp -// mov %sp, %fp - -5: /* Set up stack frame */ - sub %sp, 128, %sp - - /* Save trap data on stack */ - mov %psr, %l5 - st %l1, [%sp + 92] - st %l2, [%sp + 96] - st %l5, [%sp + 100] - st %g1, [%sp + 104] - st %g2, [%sp + 108] - st %g3, [%sp + 112] - st %g4, [%sp + 116] - st %l0, [%sp + 120] - - /* Enable traps */ - mov %psr, %l0 - or %l0, (1 << 5), %l0 - mov %l0, %psr - nop - nop - nop - nop - - /* Get UWB address */ -// switch_to_invalid %g5, %g6 -// mov %l6, %g1 -// switch_back %g5, %g6 - -# /* Flush windows to stack */ - call flush_windows - nop -/* - get_wim_number %g2 - get_cwp %g5 - mov %psr, %g6 - - sub %g2, 1, %g4 - and %g4, 0x7, %g4 -0: mov %g0, %wim - cmp %g5, %g4 - be 0f - nop - - restore - add %g1, 64, %g1 - std %l0, [%g1 + 0] - std %l2, [%g1 + 8] - std %l4, [%g1 + 16] - std %l6, [%g1 + 24] - std %i0, [%g1 + 32] - std %l2, [%g1 + 40] - std %l4, [%g1 + 48] - std %l6, [%g1 + 56] - inc %g5 - and %g5, 0x7, %g5 - ba 0b - nop - -0: inc %g4 - and %g4, 0x7, %g4 - clr %g5 - inc %g5 - sll %g5, %g4, %g5 - - * Write values to invalid window and switch back * - mov %g7, %l5 - mov %g1, %l6 - clr %l7 - switch_back %g5, %g6 -*/ - - /* Jump to actual subroutine */ - call %o2 - add %sp, 128, %o1 - - /* Return from handler */ - ld [%sp + 92], %l1 - ld [%sp + 96], %l2 - ld [%sp + 100], %l0 - mov %l0, %psr - nop - nop - nop - nop - nop - - /* If trap originated from uspace, clear uspace window mark and save uwb address for future use */ - if_from_kernel 9f - switch_to_invalid %g5, %g6 - clr %l7 - mov %l5, %g2 - mov %l6, %g7 - switch_back %g5, %g6 - mov %g7, %g1 - - /* If trap originated from uspace, restore all windows from UWB */ - /* UWB pointer is at %g1 */ -0: mov %g0, %wim - clr %g5 - andcc %g1, UWB_ALIGNMENT - 1, %g0 - bz 0f - nop - + ## mov %sp, %fp + + 5: + /* Set up stack frame */ + sub %sp, 128, %sp + + /* Save trap data on stack */ + mov %psr, %l5 + st %l1, [%sp + 92] + st %l2, [%sp + 96] + st %l5, [%sp + 100] + st %g1, [%sp + 104] + st %g2, [%sp + 108] + st %g3, [%sp + 112] + st %g4, [%sp + 116] + st %l0, [%sp + 120] + + /* Enable traps */ + mov %psr, %l0 + or %l0, (1 << 5), %l0 + mov %l0, %psr + nop + nop + nop + nop + + /* Get UWB address */ + ## switch_to_invalid %g5, %g6 + ## mov %l6, %g1 + ## switch_back %g5, %g6 + + /* Flush windows to stack */ + call flush_windows + nop + + /* Jump to actual subroutine */ + call %o2 + add %sp, 128, %o1 + + /* Return from handler */ + ld [%sp + 92], %l1 + ld [%sp + 96], %l2 + ld [%sp + 100], %l0 + mov %l0, %psr + nop + nop + nop + nop + nop + + /* + * If trap originated from user space, clear user space window mark + * and save uwb address for future use. + */ + if_from_kernel 9f + switch_to_invalid %g5, %g6 + clr %l7 + mov %l5, %g2 + mov %l6, %g7 + switch_back %g5, %g6 + mov %g7, %g1 + + /* If trap originated from user space, restore all windows from UWB */ + /* UWB pointer is at %g1 */ + 0: + mov %g0, %wim + clr %g5 + andcc %g1, UWB_ALIGNMENT - 1, %g0 + bz 0f + nop + restore sub %g1, 64, %g1 - ldd [%g1 + 0], %l0 - ldd [%g1 + 8], %l2 + ldd [%g1 + 0], %l0 + ldd [%g1 + 8], %l2 ldd [%g1 + 16], %l4 ldd [%g1 + 24], %l6 @@ -642,46 +628,49 @@ ba 0b nop - - /* We've restored all uspace windows. Now time to - * fix CWP and WIM + + /* + * We've restored all uspace windows. Now time to + * fix CWP and WIM. */ -0: restore - get_cwp %g7 - clr %g5 - inc %g5 - sll %g5, %g7, %g5 - - /* Write values to invalid window and switch back */ - mov %g2, %l5 - mov %g1, %l6 - clr %l7 - switch_back %g5, %g6 - - mov %sp, %l3 - sub %g2, 128, %sp - ld [%sp + 104], %g1 - ld [%sp + 108], %g2 - ld [%sp + 112], %g3 - ld [%sp + 116], %g4 - ld [%sp + 120], %g7 - mov %l3, %sp - b 10f - nop - -9: inline_restore_kernel - - ld [%sp + 104], %g1 - ld [%sp + 108], %g2 - ld [%sp + 112], %g3 - ld [%sp + 116], %g4 - ld [%sp + 120], %g7 - -10: jmp %l1 - rett %l2 + 0: + restore + get_cwp %g7 + clr %g5 + inc %g5 + sll %g5, %g7, %g5 + + /* Write values to invalid window and switch back */ + mov %g2, %l5 + mov %g1, %l6 + clr %l7 + switch_back %g5, %g6 + + mov %sp, %l3 + sub %g2, 128, %sp + ld [%sp + 104], %g1 + ld [%sp + 108], %g2 + ld [%sp + 112], %g3 + ld [%sp + 116], %g4 + ld [%sp + 120], %g7 + mov %l3, %sp + b 10f + nop + + 9: + inline_restore_kernel + ld [%sp + 104], %g1 + ld [%sp + 108], %g2 + ld [%sp + 112], %g3 + ld [%sp + 116], %g4 + ld [%sp + 120], %g7 + + 10: + jmp %l1 + rett %l2 interrupt_trap: /* Save %g7 */ mov %g7, %l0 - + /* Check whether we landed in invalid window */ get_wim_number %g6 @@ -690,13 +679,13 @@ bne 4f nop - - /* We are in invalid window. Check whether previous mode was usermode */ + + /* We are in invalid window. Check whether previous mode was user mode */ if_from_kernel 3f - - /* Trap originated from uspace */ + + /* Trap originated from user space */ /* Kernel stack pointer is at %l5, uwb is at %l6 */ inline_save_uspace %l6 - - /* set uspace window mark */ + + /* Set uspace window mark */ mov %psr, %l7 inc %l7 @@ -705,148 +694,159 @@ b 4f nop - -3: /* Trap originated from kernel */ - inline_save_kernel - -4: /* Check whether previous mode was usermode */ - if_from_kernel 5f - - /* Load kernel stack pointer from invalid window */ - switch_to_invalid %g5, %g6 - - /* set uspace window mark */ - mov %g6, %l7 - inc %l7 - and %l7, 0x7, %l7 - or %l7, 0x10, %l7 - - /* Save stack pointer */ - mov %l5, %g7 - switch_back %g5, %g6 - mov %g7, %sp -// mov %sp, %fp - -5: /* Set up stack frame */ - sub %sp, 128, %sp - - /* Save trap data on stack */ - mov %psr, %l5 - st %l1, [%sp + 92] - st %l2, [%sp + 96] - st %l5, [%sp + 100] - st %g1, [%sp + 104] - st %g2, [%sp + 108] - st %g3, [%sp + 112] - st %g4, [%sp + 116] - st %l0, [%sp + 120] - - /* Enable traps */ - mov %psr, %l0 - or %l0, (1 << 5), %l0 - mov %l0, %psr - nop - nop - nop - nop - - /* Flush windows to stack */ - call flush_windows - nop - - /* Jump to actual subroutine */ - mov %g2, %o0 - call irq_exception - add %sp, 128, %o1 - - /* Return from handler */ - ld [%sp + 92], %l1 - ld [%sp + 96], %l2 - ld [%sp + 100], %l0 - mov %l0, %psr - nop - nop - nop - nop - nop - - /* If trap originated from uspace, clear uspace window mark and save uwb address for future use */ - if_from_kernel 6f - switch_to_invalid %g5, %g6 - clr %l7 - mov %l5, %g2 - mov %l6, %g7 - switch_back %g5, %g6 - mov %g7, %g1 - - /* If trap originated from uspace, restore all windows from UWB */ - /* UWB pointer is at %g1 */ -0: mov %g0, %wim - clr %g5 - andcc %g1, UWB_ALIGNMENT - 1, %g0 - bz 0f - nop - - restore - sub %g1, 64, %g1 - ldd [%g1 + 0], %l0 - ldd [%g1 + 8], %l2 - ldd [%g1 + 16], %l4 - ldd [%g1 + 24], %l6 - ldd [%g1 + 32], %i0 - ldd [%g1 + 40], %i2 - ldd [%g1 + 48], %i4 - ldd [%g1 + 56], %i6 - inc %g5 - and %g5, 0x7, %g5 - ba 0b - nop - - /* We've restored all uspace windows. Now time to - * fix CWP and WIM + + 3: + /* Trap originated from kernel */ + inline_save_kernel + + 4: + /* Check whether previous mode was user mode */ + if_from_kernel 5f + + /* Load kernel stack pointer from invalid window */ + switch_to_invalid %g5, %g6 + + /* Set user space window mark */ + mov %g6, %l7 + inc %l7 + and %l7, 0x7, %l7 + or %l7, 0x10, %l7 + + /* Save stack pointer */ + mov %l5, %g7 + switch_back %g5, %g6 + mov %g7, %sp + ## mov %sp, %fp + + 5: + /* Set up stack frame */ + sub %sp, 128, %sp + + /* Save trap data on stack */ + mov %psr, %l5 + st %l1, [%sp + 92] + st %l2, [%sp + 96] + st %l5, [%sp + 100] + st %g1, [%sp + 104] + st %g2, [%sp + 108] + st %g3, [%sp + 112] + st %g4, [%sp + 116] + st %l0, [%sp + 120] + + /* Enable traps */ + mov %psr, %l0 + or %l0, (1 << 5), %l0 + mov %l0, %psr + nop + nop + nop + nop + + /* Flush windows to stack */ + call flush_windows + nop + + /* Jump to actual subroutine */ + mov %g2, %o0 + call irq_exception + add %sp, 128, %o1 + + /* Return from handler */ + ld [%sp + 92], %l1 + ld [%sp + 96], %l2 + ld [%sp + 100], %l0 + mov %l0, %psr + nop + nop + nop + nop + nop + + /* + * If trap originated from user space, clear user space window mark + * and save uwb address for future use. + */ + if_from_kernel 6f + switch_to_invalid %g5, %g6 + clr %l7 + mov %l5, %g2 + mov %l6, %g7 + switch_back %g5, %g6 + mov %g7, %g1 + + /* If trap originated from user space, restore all windows from UWB */ + /* UWB pointer is at %g1 */ + 0: + mov %g0, %wim + clr %g5 + andcc %g1, UWB_ALIGNMENT - 1, %g0 + bz 0f + nop + + restore + sub %g1, 64, %g1 + ldd [%g1 + 0], %l0 + ldd [%g1 + 8], %l2 + ldd [%g1 + 16], %l4 + ldd [%g1 + 24], %l6 + ldd [%g1 + 32], %i0 + ldd [%g1 + 40], %i2 + ldd [%g1 + 48], %i4 + ldd [%g1 + 56], %i6 + inc %g5 + and %g5, 0x7, %g5 + ba 0b + nop + + /* + * We've restored all user space windows. Now time to + * fix CWP and WIM. */ -0: restore - get_cwp %g7 - clr %g5 - inc %g5 - sll %g5, %g7, %g5 - - /* Write values to invalid window and switch back */ - mov %g2, %l5 - mov %g1, %l6 - clr %l7 - switch_back %g5, %g6 - - /* If next window is invalid, do inline restore */ -6: get_wim_number %g6 - get_cwp %g7 - inc %g7 - and %g7, 0x7, %g7 - cmp %g6, %g7 - bne 8f - - if_from_kernel 7f - - inline_restore_uspace %g1 - switch_to_invalid %g5, %g6 - mov %g1, %l6 - switch_back %g5, %g6 - b 8f - nop - -7: inline_restore_kernel - -8: ld [%sp + 104], %g1 - ld [%sp + 108], %g2 - ld [%sp + 112], %g3 - ld [%sp + 116], %g4 - ld [%sp + 120], %g7 - jmp %l1 - rett %l2 - + 0: + restore + get_cwp %g7 + clr %g5 + inc %g5 + sll %g5, %g7, %g5 + + /* Write values to invalid window and switch back */ + mov %g2, %l5 + mov %g1, %l6 + clr %l7 + switch_back %g5, %g6 + + /* If next window is invalid, do inline restore */ + 6: + get_wim_number %g6 + get_cwp %g7 + inc %g7 + and %g7, 0x7, %g7 + cmp %g6, %g7 + bne 8f + + if_from_kernel 7f + + inline_restore_uspace %g1 + switch_to_invalid %g5, %g6 + mov %g1, %l6 + switch_back %g5, %g6 + b 8f + nop + + 7: + inline_restore_kernel + + 8: + ld [%sp + 104], %g1 + ld [%sp + 108], %g2 + ld [%sp + 112], %g3 + ld [%sp + 116], %g4 + ld [%sp + 120], %g7 + jmp %l1 + rett %l2 syscall_trap: /* Save %g7 */ mov %g7, %l0 - + /* Check whether we landed in invalid window */ get_wim_number %g6 @@ -855,13 +855,13 @@ bne 4f nop - - /* We are in invalid window. Check whether previous mode was usermode */ + + /* We are in invalid window. Check whether previous mode was user mode */ if_from_kernel 3f - - /* Trap originated from uspace */ + + /* Trap originated from user space */ /* Kernel stack pointer is at %l5, uwb is at %l6 */ inline_save_uspace %l6 - - /* set uspace window mark */ + + /* Set user space window mark */ mov %psr, %l7 inc %l7 @@ -870,138 +870,148 @@ b 4f nop - -3: /* Trap originated from kernel */ - inline_save_kernel - -4: /* Check whether previous mode was usermode */ - if_from_kernel 5f - - /* Load kernel stack pointer from invalid window */ - switch_to_invalid %g5, %g6 - - /* set uspace window mark */ - mov %g6, %l7 - inc %l7 - and %l7, 0x7, %l7 - or %l7, 0x10, %l7 - - /* Save stack pointer */ - mov %l5, %g7 - switch_back %g5, %g6 - mov %g7, %sp -// mov %sp, %fp - -5: /* Set up stack frame */ - sub %sp, 128, %sp - - /* Save trap data on stack */ - mov %psr, %l5 - st %l1, [%sp + 92] - st %l2, [%sp + 96] - st %l5, [%sp + 100] - st %g1, [%sp + 104] - st %g2, [%sp + 108] - st %g3, [%sp + 112] - st %g4, [%sp + 116] - st %l0, [%sp + 120] - - /* Enable traps */ - mov %psr, %l0 - or %l0, (1 << 5), %l0 - mov %l0, %psr - nop - nop - nop - nop - - /* Flush windows */ - call flush_windows - nop - - /* Jump to actual subroutine */ - sub %o0, 0x80, %o0 - st %o0, [ %sp + 92 ] - mov %i0, %o0 - mov %i1, %o1 - mov %i2, %o2 - mov %i3, %o3 - mov %i4, %o4 - call syscall - mov %i5, %o5 - - /* Return from handler */ - ld [%sp + 92], %l1 - ld [%sp + 96], %l2 - ld [%sp + 100], %l0 - mov %o0, %i0 - mov %psr, %l1 - and %l1, 0xf, %l1 - and %l0, 0xfffffff0, %l0 - or %l0, %l1, %l0 - mov %l0, %psr - nop - nop - nop - nop - nop - - /* If trap originated from uspace, clear uspace window mark and save uwb address for future use */ - if_from_kernel 8f - switch_to_invalid %g5, %g6 - mov %l5, %g2 - mov %l6, %g1 - mov %l7, %g7 - switch_back %g5, %g6 - - /* If trap originated from uspace, restore all windows from UWB */ - /* UWB pointer is at %g1 */ -0: mov %g0, %wim - clr %g5 - andcc %g1, UWB_ALIGNMENT - 1, %g0 - bz 0f - nop - - restore - sub %g1, 64, %g1 - ldd [%g1 + 0], %l0 - ldd [%g1 + 8], %l2 - ldd [%g1 + 16], %l4 - ldd [%g1 + 24], %l6 - ldd [%g1 + 32], %i0 - ldd [%g1 + 40], %i2 - ldd [%g1 + 48], %i4 - ldd [%g1 + 56], %i6 - inc %g5 - and %g5, 0x7, %g5 - ba 0b - nop - - /* We've restored all uspace windows. Now time to - * fix CWP and WIM - */ -0: restore - get_cwp %g7 - clr %g5 - inc %g5 - sll %g5, %g7, %g5 - - /* Write values to invalid window and switch back */ - mov %g2, %l5 - mov %g1, %l6 - clr %l7 - switch_back %g5, %g6 - -8: mov %sp, %l1 - sub %g2, 128, %sp - ld [%sp + 104], %g1 - ld [%sp + 108], %g2 - ld [%sp + 112], %g3 - ld [%sp + 116], %g4 - ld [%sp + 120], %g7 - mov %l1, %sp - jmp %l2 - rett %l2 + 4 - -#define STRAP(_vector, _handler) \ + + 3: + /* Trap originated from kernel */ + inline_save_kernel + + 4: + /* Check whether previous mode was user mode */ + if_from_kernel 5f + + /* Load kernel stack pointer from invalid window */ + switch_to_invalid %g5, %g6 + + /* Set user space window mark */ + mov %g6, %l7 + inc %l7 + and %l7, 0x7, %l7 + or %l7, 0x10, %l7 + + /* Save stack pointer */ + mov %l5, %g7 + switch_back %g5, %g6 + mov %g7, %sp + ## mov %sp, %fp + + 5: + /* Set up stack frame */ + sub %sp, 128, %sp + + /* Save trap data on stack */ + mov %psr, %l5 + st %l1, [%sp + 92] + st %l2, [%sp + 96] + st %l5, [%sp + 100] + st %g1, [%sp + 104] + st %g2, [%sp + 108] + st %g3, [%sp + 112] + st %g4, [%sp + 116] + st %l0, [%sp + 120] + + /* Enable traps */ + mov %psr, %l0 + or %l0, (1 << 5), %l0 + mov %l0, %psr + nop + nop + nop + nop + + /* Flush windows */ + call flush_windows + nop + + /* Jump to actual subroutine */ + sub %o0, 0x80, %o0 + st %o0, [%sp + 92] + mov %i0, %o0 + mov %i1, %o1 + mov %i2, %o2 + mov %i3, %o3 + mov %i4, %o4 + call syscall + mov %i5, %o5 + + /* Return from handler */ + ld [%sp + 92], %l1 + ld [%sp + 96], %l2 + ld [%sp + 100], %l0 + mov %o0, %i0 + mov %psr, %l1 + and %l1, 0xf, %l1 + and %l0, 0xfffffff0, %l0 + or %l0, %l1, %l0 + mov %l0, %psr + nop + nop + nop + nop + nop + + /* + * If trap originated from user space, clear user space window mark + * and save uwb address for future use. + */ + if_from_kernel 8f + switch_to_invalid %g5, %g6 + mov %l5, %g2 + mov %l6, %g1 + mov %l7, %g7 + switch_back %g5, %g6 + + /* If trap originated from user space, restore all windows from UWB */ + /* UWB pointer is at %g1 */ + 0: + mov %g0, %wim + clr %g5 + andcc %g1, UWB_ALIGNMENT - 1, %g0 + bz 0f + nop + + restore + sub %g1, 64, %g1 + ldd [%g1 + 0], %l0 + ldd [%g1 + 8], %l2 + ldd [%g1 + 16], %l4 + ldd [%g1 + 24], %l6 + ldd [%g1 + 32], %i0 + ldd [%g1 + 40], %i2 + ldd [%g1 + 48], %i4 + ldd [%g1 + 56], %i6 + inc %g5 + and %g5, 0x7, %g5 + ba 0b + nop + + /* + * We've restored all user space windows. Now time to + * fix CWP and WIM. + */ + 0: + restore + get_cwp %g7 + clr %g5 + inc %g5 + sll %g5, %g7, %g5 + + /* Write values to invalid window and switch back */ + mov %g2, %l5 + mov %g1, %l6 + clr %l7 + switch_back %g5, %g6 + + 8: + mov %sp, %l1 + sub %g2, 128, %sp + ld [%sp + 104], %g1 + ld [%sp + 108], %g2 + ld [%sp + 112], %g3 + ld [%sp + 116], %g4 + ld [%sp + 120], %g7 + mov %l1, %sp + jmp %l2 + rett %l2 + 4 + +#define STRAP(_vector, _handler) \ .org trap_table + _vector * TRAP_ENTRY_SIZE; \ mov %psr, %l0 ; \ @@ -1010,5 +1020,5 @@ nop -#define TRAP(_vector, _handler) \ +#define TRAP(_vector, _handler) \ .org trap_table + _vector * TRAP_ENTRY_SIZE; \ set _vector, %o0 ; \ @@ -1017,5 +1027,5 @@ or %o2, %lo(_handler), %o2 ; -#define SYSCALL(_vector) \ +#define SYSCALL(_vector) \ .org trap_table + _vector * TRAP_ENTRY_SIZE; \ set _vector, %o0 ; \ @@ -1023,5 +1033,5 @@ nop ; -#define INTERRUPT(_vector, _priority) \ +#define INTERRUPT(_vector, _priority) \ .org trap_table + _vector * TRAP_ENTRY_SIZE; \ mov %psr, %l0 ; \ @@ -1030,5 +1040,5 @@ nop ; -#define BADTRAP(_vector) \ +#define BADTRAP(_vector) \ .org trap_table + _vector * TRAP_ENTRY_SIZE ; \ ta 0 ; @@ -1054,12 +1064,12 @@ BADTRAP(0x10) INTERRUPT(0x11, 1) - INTERRUPT(0x12, 2) - INTERRUPT(0x13, 3) - INTERRUPT(0x14, 4) - INTERRUPT(0x15, 5) - INTERRUPT(0x16, 6) - INTERRUPT(0x17, 7) - INTERRUPT(0x18, 8) - INTERRUPT(0x19, 9) + INTERRUPT(0x12, 2) + INTERRUPT(0x13, 3) + INTERRUPT(0x14, 4) + INTERRUPT(0x15, 5) + INTERRUPT(0x16, 6) + INTERRUPT(0x17, 7) + INTERRUPT(0x18, 8) + INTERRUPT(0x19, 9) INTERRUPT(0x1a, 10) INTERRUPT(0x1b, 11) @@ -1068,13 +1078,13 @@ INTERRUPT(0x1e, 14) INTERRUPT(0x1f, 15) - TRAP(0x21, instruction_access_error) - BADTRAP(0x22) - BADTRAP(0x23) - BADTRAP(0x24) - BADTRAP(0x25) - BADTRAP(0x26) - BADTRAP(0x27) - BADTRAP(0x28) - TRAP(0x29, data_access_error) + TRAP(0x21, instruction_access_error) + BADTRAP(0x22) + BADTRAP(0x23) + BADTRAP(0x24) + BADTRAP(0x25) + BADTRAP(0x26) + BADTRAP(0x27) + BADTRAP(0x28) + TRAP(0x29, data_access_error) TRAP(0x2a, division_by_zero) TRAP(0x2b, data_store_error) @@ -1211,34 +1221,34 @@ SYSCALL(0xae) SYSCALL(0xaf) - SYSCALL(0xb0) - SYSCALL(0xb1) - SYSCALL(0xb2) - SYSCALL(0xb3) - SYSCALL(0xb4) - SYSCALL(0xb5) - SYSCALL(0xb6) - SYSCALL(0xb7) - SYSCALL(0xb8) - SYSCALL(0xb9) - SYSCALL(0xba) - SYSCALL(0xbb) - SYSCALL(0xbc) - SYSCALL(0xbd) - SYSCALL(0xbe) - SYSCALL(0xbf) - SYSCALL(0xc0) - SYSCALL(0xc1) - SYSCALL(0xc2) - SYSCALL(0xc3) - SYSCALL(0xc4) - SYSCALL(0xc5) - SYSCALL(0xc6) - SYSCALL(0xc7) - SYSCALL(0xc8) - SYSCALL(0xc9) - SYSCALL(0xca) - SYSCALL(0xcb) - SYSCALL(0xcc) - SYSCALL(0xcd) - SYSCALL(0xce) - SYSCALL(0xcf) + SYSCALL(0xb0) + SYSCALL(0xb1) + SYSCALL(0xb2) + SYSCALL(0xb3) + SYSCALL(0xb4) + SYSCALL(0xb5) + SYSCALL(0xb6) + SYSCALL(0xb7) + SYSCALL(0xb8) + SYSCALL(0xb9) + SYSCALL(0xba) + SYSCALL(0xbb) + SYSCALL(0xbc) + SYSCALL(0xbd) + SYSCALL(0xbe) + SYSCALL(0xbf) + SYSCALL(0xc0) + SYSCALL(0xc1) + SYSCALL(0xc2) + SYSCALL(0xc3) + SYSCALL(0xc4) + SYSCALL(0xc5) + SYSCALL(0xc6) + SYSCALL(0xc7) + SYSCALL(0xc8) + SYSCALL(0xc9) + SYSCALL(0xca) + SYSCALL(0xcb) + SYSCALL(0xcc) + SYSCALL(0xcd) + SYSCALL(0xce) + SYSCALL(0xcf) Index: kernel/arch/sparc32/src/userspace.c =================================================================== --- kernel/arch/sparc32/src/userspace.c (revision e47ed059f2f1f9164ef7bfb956f1b38b5998b23d) +++ kernel/arch/sparc32/src/userspace.c (revision 32e8cd1b35fed5b4250d558f0d9cf886b3422481) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -42,22 +42,18 @@ void userspace(uspace_arg_t *kernel_uarg) { -// printf("userspace(): entry=%p, stack=%p, stacksize=%d\n", kernel_uarg->uspace_entry, kernel_uarg->uspace_stack, kernel_uarg->uspace_stack_size); - /* On real hardware this switches the CPU to user - space mode and jumps to kernel_uarg->uspace_entry. */ - - uint32_t l0, l1, l2; uint32_t psr = psr_read(); - uint8_t wim; - psr &= ~(1 << 7); psr &= ~(1 << 6); - + /* Read invalid window variables */ + uint32_t l0; + uint32_t l1; + uint32_t l2; read_from_invalid(&l0, &l1, &l2); - + /* Make current window invalid */ - wim = (psr & 0x7) + 1; + uint8_t wim = (psr & 0x7) + 1; wim = (1 << wim) | (1 >> (8 - wim)); - + asm volatile ( "flush\n" @@ -71,14 +67,18 @@ "ld %[arg], %%o1\n" "jmp %[entry]\n" - "mov %[psr], %%psr\n" :: [entry] "r" (kernel_uarg->uspace_entry), - [arg] "m" (kernel_uarg->uspace_uarg), - [psr] "r" (psr), - [wim] "r" ((uint32_t)wim), - [v0] "m" (l0), - [v1] "m" (l1), - [v2] "m" (l2), - [stack] "r" (kernel_uarg->uspace_stack + kernel_uarg->uspace_stack_size - 64) : "%g3", "%g4"); - - while (true); + "mov %[psr], %%psr\n" + :: [entry] "r" (kernel_uarg->uspace_entry), + [arg] "m" (kernel_uarg->uspace_uarg), + [psr] "r" (psr), + [wim] "r" ((uint32_t)wim), + [v0] "m" (l0), + [v1] "m" (l1), + [v2] "m" (l2), + [stack] "r" (kernel_uarg->uspace_stack + + kernel_uarg->uspace_stack_size - 64) + : "%g3", "%g4" + ); + + while (1); }