Index: kernel/arch/sparc64/include/mm/tlb.h
===================================================================
--- kernel/arch/sparc64/include/mm/tlb.h	(revision 687246b2606134c8fd20702358cad29743377b4f)
+++ kernel/arch/sparc64/include/mm/tlb.h	(revision 301ff30236f92bdd150603d5f6eb622239140696)
@@ -323,5 +323,5 @@
  * 			Register.
  */
-static inline uint64_t itlb_data_access_read(index_t entry)
+static inline uint64_t itlb_data_access_read(size_t entry)
 {
 	itlb_data_access_addr_t reg;
@@ -337,5 +337,5 @@
  * @param value		Value to be written.
  */
-static inline void itlb_data_access_write(index_t entry, uint64_t value)
+static inline void itlb_data_access_write(size_t entry, uint64_t value)
 {
 	itlb_data_access_addr_t reg;
@@ -354,5 +354,5 @@
  * 			Register.
  */
-static inline uint64_t dtlb_data_access_read(index_t entry)
+static inline uint64_t dtlb_data_access_read(size_t entry)
 {
 	dtlb_data_access_addr_t reg;
@@ -368,5 +368,5 @@
  * @param value		Value to be written.
  */
-static inline void dtlb_data_access_write(index_t entry, uint64_t value)
+static inline void dtlb_data_access_write(size_t entry, uint64_t value)
 {
 	dtlb_data_access_addr_t reg;
@@ -384,5 +384,5 @@
  * @return		Current value of specified IMMU TLB Tag Read Register.
  */
-static inline uint64_t itlb_tag_read_read(index_t entry)
+static inline uint64_t itlb_tag_read_read(size_t entry)
 {
 	itlb_tag_read_addr_t tag;
@@ -399,5 +399,5 @@
  * @return		Current value of specified DMMU TLB Tag Read Register.
  */
-static inline uint64_t dtlb_tag_read_read(index_t entry)
+static inline uint64_t dtlb_tag_read_read(size_t entry)
 {
 	dtlb_tag_read_addr_t tag;
@@ -419,5 +419,5 @@
  * 			Register.
  */
-static inline uint64_t itlb_data_access_read(int tlb, index_t entry)
+static inline uint64_t itlb_data_access_read(int tlb, size_t entry)
 {
 	itlb_data_access_addr_t reg;
@@ -434,5 +434,5 @@
  * @param value		Value to be written.
  */
-static inline void itlb_data_access_write(int tlb, index_t entry,
+static inline void itlb_data_access_write(int tlb, size_t entry,
 	uint64_t value)
 {
@@ -454,5 +454,5 @@
  * 			Register.
  */
-static inline uint64_t dtlb_data_access_read(int tlb, index_t entry)
+static inline uint64_t dtlb_data_access_read(int tlb, size_t entry)
 {
 	dtlb_data_access_addr_t reg;
@@ -470,5 +470,5 @@
  * @param value		Value to be written.
  */
-static inline void dtlb_data_access_write(int tlb, index_t entry,
+static inline void dtlb_data_access_write(int tlb, size_t entry,
 	uint64_t value)
 {
@@ -489,5 +489,5 @@
  * @return		Current value of specified IMMU TLB Tag Read Register.
  */
-static inline uint64_t itlb_tag_read_read(int tlb, index_t entry)
+static inline uint64_t itlb_tag_read_read(int tlb, size_t entry)
 {
 	itlb_tag_read_addr_t tag;
@@ -506,5 +506,5 @@
  * @return		Current value of specified DMMU TLB Tag Read Register.
  */
-static inline uint64_t dtlb_tag_read_read(int tlb, index_t entry)
+static inline uint64_t dtlb_tag_read_read(int tlb, size_t entry)
 {
 	dtlb_tag_read_addr_t tag;
Index: kernel/arch/sparc64/include/mm/tsb.h
===================================================================
--- kernel/arch/sparc64/include/mm/tsb.h	(revision 687246b2606134c8fd20702358cad29743377b4f)
+++ kernel/arch/sparc64/include/mm/tsb.h	(revision 301ff30236f92bdd150603d5f6eb622239140696)
@@ -161,7 +161,7 @@
 struct pte;
 
-extern void tsb_invalidate(struct as *as, uintptr_t page, count_t pages);
-extern void itsb_pte_copy(struct pte *t, index_t index);
-extern void dtsb_pte_copy(struct pte *t, index_t index, bool ro);
+extern void tsb_invalidate(struct as *as, uintptr_t page, size_t pages);
+extern void itsb_pte_copy(struct pte *t, size_t index);
+extern void dtsb_pte_copy(struct pte *t, size_t index, bool ro);
 
 #endif /* !def __ASM__ */
Index: kernel/arch/sparc64/include/types.h
===================================================================
--- kernel/arch/sparc64/include/types.h	(revision 687246b2606134c8fd20702358cad29743377b4f)
+++ kernel/arch/sparc64/include/types.h	(revision 301ff30236f92bdd150603d5f6eb622239140696)
@@ -47,6 +47,4 @@
 
 typedef uint64_t size_t;
-typedef uint64_t count_t;
-typedef uint64_t index_t;
 
 typedef uint64_t uintptr_t;
@@ -61,9 +59,7 @@
 } fncptr_t;
 
-/**< Formats for uintptr_t, size_t, count_t and index_t */
+/**< Formats for uintptr_t, size_t */
 #define PRIp "llx"
 #define PRIs "llu"
-#define PRIc "llu"
-#define PRIi "llu"
 
 /**< Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */
Index: kernel/arch/sparc64/src/drivers/fhc.c
===================================================================
--- kernel/arch/sparc64/src/drivers/fhc.c	(revision 687246b2606134c8fd20702358cad29743377b4f)
+++ kernel/arch/sparc64/src/drivers/fhc.c	(revision 301ff30236f92bdd150603d5f6eb622239140696)
@@ -72,5 +72,5 @@
 		return NULL;
 		
-	count_t regs = prop->size / sizeof(ofw_central_reg_t);
+	size_t regs = prop->size / sizeof(ofw_central_reg_t);
 	if (regs + 1 < UART_IMAP_REG)
 		return NULL;
Index: kernel/arch/sparc64/src/drivers/pci.c
===================================================================
--- kernel/arch/sparc64/src/drivers/pci.c	(revision 687246b2606134c8fd20702358cad29743377b4f)
+++ kernel/arch/sparc64/src/drivers/pci.c	(revision 301ff30236f92bdd150603d5f6eb622239140696)
@@ -92,5 +92,5 @@
 
 	ofw_upa_reg_t *reg = prop->value;
-	count_t regs = prop->size / sizeof(ofw_upa_reg_t);
+	size_t regs = prop->size / sizeof(ofw_upa_reg_t);
 
 	if (regs < SABRE_INTERNAL_REG + 1)
@@ -139,5 +139,5 @@
 
 	ofw_upa_reg_t *reg = prop->value;
-	count_t regs = prop->size / sizeof(ofw_upa_reg_t);
+	size_t regs = prop->size / sizeof(ofw_upa_reg_t);
 
 	if (regs < PSYCHO_INTERNAL_REG + 1)
Index: kernel/arch/sparc64/src/mm/as.c
===================================================================
--- kernel/arch/sparc64/src/mm/as.c	(revision 687246b2606134c8fd20702358cad29743377b4f)
+++ kernel/arch/sparc64/src/mm/as.c	(revision 301ff30236f92bdd150603d5f6eb622239140696)
@@ -90,5 +90,5 @@
 	 * size.
 	 */
-	count_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
+	size_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
 	    sizeof(tsb_entry_t)) >> FRAME_WIDTH;
 	frame_free(KA2PA((uintptr_t) as->arch.itsb));
@@ -102,5 +102,5 @@
 {
 #ifdef CONFIG_TSB
-	tsb_invalidate(as, 0, (count_t) -1);
+	tsb_invalidate(as, 0, (size_t) -1);
 #endif
 	return 0;
Index: kernel/arch/sparc64/src/mm/tlb.c
===================================================================
--- kernel/arch/sparc64/src/mm/tlb.c	(revision 687246b2606134c8fd20702358cad29743377b4f)
+++ kernel/arch/sparc64/src/mm/tlb.c	(revision 301ff30236f92bdd150603d5f6eb622239140696)
@@ -55,6 +55,6 @@
 #endif
 
-static void dtlb_pte_copy(pte_t *, index_t, bool);
-static void itlb_pte_copy(pte_t *, index_t);
+static void dtlb_pte_copy(pte_t *, size_t, bool);
+static void itlb_pte_copy(pte_t *, size_t);
 static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *);
 static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t,
@@ -131,5 +131,5 @@
  * 			of its w field.
  */
-void dtlb_pte_copy(pte_t *t, index_t index, bool ro)
+void dtlb_pte_copy(pte_t *t, size_t index, bool ro)
 {
 	tlb_tag_access_reg_t tag;
@@ -168,5 +168,5 @@
  * @param index		Zero if lower 8K-subpage, one if higher 8K-subpage.
  */
-void itlb_pte_copy(pte_t *t, index_t index)
+void itlb_pte_copy(pte_t *t, size_t index)
 {
 	tlb_tag_access_reg_t tag;
@@ -201,5 +201,5 @@
 {
 	uintptr_t page_16k = ALIGN_DOWN(istate->tpc, PAGE_SIZE);
-	index_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;
+	size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;
 	pte_t *t;
 
@@ -246,5 +246,5 @@
 	uintptr_t page_8k;
 	uintptr_t page_16k;
-	index_t index;
+	size_t index;
 	pte_t *t;
 
@@ -310,5 +310,5 @@
 {
 	uintptr_t page_16k;
-	index_t index;
+	size_t index;
 	pte_t *t;
 
@@ -580,5 +580,5 @@
  * @param cnt		Number of ITLB and DTLB entries to invalidate.
  */
-void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
+void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
 {
 	unsigned int i;
Index: kernel/arch/sparc64/src/mm/tsb.c
===================================================================
--- kernel/arch/sparc64/src/mm/tsb.c	(revision 687246b2606134c8fd20702358cad29743377b4f)
+++ kernel/arch/sparc64/src/mm/tsb.c	(revision 301ff30236f92bdd150603d5f6eb622239140696)
@@ -51,11 +51,12 @@
  * @param as Address space.
  * @param page First page to invalidate in TSB.
- * @param pages Number of pages to invalidate. Value of (count_t) -1 means the
+ * @param pages Number of pages to invalidate. Value of (size_t) -1 means the
  * 	whole TSB.
  */
-void tsb_invalidate(as_t *as, uintptr_t page, count_t pages)
+void tsb_invalidate(as_t *as, uintptr_t page, size_t pages)
 {
-	index_t i0, i;
-	count_t cnt;
+	size_t i0;
+	size_t i;
+	size_t cnt;
 	
 	ASSERT(as->arch.itsb && as->arch.dtsb);
@@ -64,5 +65,5 @@
 	ASSERT(i0 < ITSB_ENTRY_COUNT && i0 < DTSB_ENTRY_COUNT);
 
-	if (pages == (count_t) -1 || (pages * 2) > ITSB_ENTRY_COUNT)
+	if (pages == (size_t) -1 || (pages * 2) > ITSB_ENTRY_COUNT)
 		cnt = ITSB_ENTRY_COUNT;
 	else
@@ -82,9 +83,9 @@
  * @param index	Zero if lower 8K-subpage, one if higher 8K subpage.
  */
-void itsb_pte_copy(pte_t *t, index_t index)
+void itsb_pte_copy(pte_t *t, size_t index)
 {
 	as_t *as;
 	tsb_entry_t *tsb;
-	index_t entry;
+	size_t entry;
 
 	ASSERT(index <= 1);
@@ -128,9 +129,9 @@
  * @param ro	If true, the mapping is copied read-only.
  */
-void dtsb_pte_copy(pte_t *t, index_t index, bool ro)
+void dtsb_pte_copy(pte_t *t, size_t index, bool ro)
 {
 	as_t *as;
 	tsb_entry_t *tsb;
-	index_t entry;
+	size_t entry;
 	
 	ASSERT(index <= 1);
Index: kernel/arch/sparc64/src/smp/smp.c
===================================================================
--- kernel/arch/sparc64/src/smp/smp.c	(revision 687246b2606134c8fd20702358cad29743377b4f)
+++ kernel/arch/sparc64/src/smp/smp.c	(revision 301ff30236f92bdd150603d5f6eb622239140696)
@@ -62,5 +62,5 @@
 {
 	ofw_tree_node_t *node;
-	count_t cnt = 0;
+	size_t cnt = 0;
 	
 	if (is_us() || is_us_iii()) {