Changeset 2f23341 in mainline
- Timestamp:
- 2011-05-19T20:04:09Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 326bf65
- Parents:
- 2a922c8
- Location:
- kernel/arch/ia64
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia64/include/asm.h
r2a922c8 r2f23341 122 122 } 123 123 124 /** Return base address of current stack 125 * 126 * Return the base address of the current stack. 127 * The stack is assumed to be STACK_SIZE long. 128 * The stack must start on page boundary. 129 * 124 /** Return base address of current memory stack. 125 * 126 * The memory stack is assumed to be STACK_SIZE / 2 long. Note that there is 127 * also the RSE stack, which takes up the upper half of STACK_SIZE. 128 * The memory stack must start on page boundary. 130 129 */ 131 130 NO_TRACE static inline uintptr_t get_stack_base(void) 132 131 { 133 132 uint64_t value; 134 135 /*136 * I'm not sure why but this code inlines badly137 * in scheduler, resulting in THE shifting about138 * 16B and causing kernel panic.139 *140 * asm volatile (141 * "and %[value] = %[mask], r12"142 * : [value] "=r" (v)143 * : [mask] "r" (~(STACK_SIZE - 1))144 * );145 * return v;146 *147 * The following code has the same semantics but148 * inlines correctly.149 *150 */151 133 152 134 asm volatile ( … … 155 137 ); 156 138 157 return (value & (~(STACK_SIZE - 1)));139 return (value & (~(STACK_SIZE / 2 - 1))); 158 140 } 159 141 -
kernel/arch/ia64/include/context.h
r2a922c8 r2f23341 49 49 #define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) 50 50 51 /* RSE stack starts at the bottom of memory stack . */51 /* RSE stack starts at the bottom of memory stack, hence the division by 2. */ 52 52 #define context_set(c, _pc, stack, size) \ 53 53 do { \ 54 54 (c)->pc = (uintptr_t) _pc; \ 55 (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size ), REGISTER_STACK_ALIGNMENT);\55 (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size / 2), REGISTER_STACK_ALIGNMENT); \ 56 56 (c)->ar_pfs &= PFM_MASK; \ 57 (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size ), STACK_ALIGNMENT) - SP_DELTA;\57 (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size / 2), STACK_ALIGNMENT) - SP_DELTA; \ 58 58 } while (0); 59 59 -
kernel/arch/ia64/src/ia64.c
r2a922c8 r2f23341 249 249 rsc.mode = 3; /* eager mode */ 250 250 251 /* 252 * Switch to userspace. 253 * 254 * When calculating stack addresses, mind the stack split between the 255 * memory stack and the RSE stack. Each occuppies STACK_SIZE / 2 bytes. 256 */ 251 257 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, 252 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE -258 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2 - 253 259 ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), 254 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE ,260 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2, 255 261 (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); 256 262 -
kernel/arch/ia64/src/proc/scheduler.c
r2a922c8 r2f23341 79 79 * Record address of kernel stack to bank 0 r23. 80 80 * These values will be found there after switch from userspace. 81 * 82 * Mind the 1:1 split of the entire STACK_SIZE long region between the 83 * memory stack and the RSE stack. 81 84 */ 82 85 asm volatile ( … … 86 89 "bsw.1\n" 87 90 : 88 : "r" (&THREAD->kstack[STACK_SIZE ]),89 "r" (&THREAD->kstack[STACK_SIZE - SP_DELTA])91 : "r" (&THREAD->kstack[STACK_SIZE / 2]), 92 "r" (&THREAD->kstack[STACK_SIZE / 2 - SP_DELTA]) 90 93 ); 91 94 }
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