Index: kernel/arch/ia64/src/mm/tlb.c
===================================================================
--- kernel/arch/ia64/src/mm/tlb.c	(revision a35b458e9db1ca95e679799dc7c1b12c83359ca3)
+++ kernel/arch/ia64/src/mm/tlb.c	(revision 2f1c88e88f3d33245f94ca59d2b772d4dd5d1f56)
@@ -75,6 +75,6 @@
 		for (j = 0; j < count2; j++) {
 			asm volatile (
-				"ptc.e %[adr] ;;"
-				:: [adr] "r" (adr)
+			    "ptc.e %[adr] ;;"
+			    :: [adr] "r" (adr)
 			);
 			adr += stride2;
@@ -175,7 +175,7 @@
 	for (; va < (page + cnt * PAGE_SIZE); va += (1UL << ps))
 		asm volatile (
-			"ptc.l %[va], %[ps] ;;"
-			:: [va]"r" (va),
-			   [ps] "r" (ps << 2)
+		    "ptc.l %[va], %[ps] ;;"
+		    :: [va] "r" (va),
+		      [ps] "r" (ps << 2)
 		);
 
@@ -246,21 +246,21 @@
 
 	asm volatile (
-		"mov r8 = psr ;;\n"
-		"rsm %[mask] ;;\n"                 /* PSR_IC_MASK */
-		"srlz.d ;;\n"
-		"srlz.i ;;\n"
-		"mov cr.ifa = %[va]\n"             /* va */
-		"mov cr.itir = %[word1] ;;\n"      /* entry.word[1] */
-		"cmp.eq p6, p7 = %[dtc], r0 ;;\n"  /* decide between itc and dtc */
-		"(p6) itc.i %[word0] ;;\n"
-		"(p7) itc.d %[word0] ;;\n"
-		"mov psr.l = r8 ;;\n"
-		"srlz.d ;;\n"
-		:: [mask] "i" (PSR_IC_MASK),
-		   [va] "r" (va),
-		   [word0] "r" (entry.word[0]),
-		   [word1] "r" (entry.word[1]),
-		   [dtc] "r" (dtc)
-		: "p6", "p7", "r8"
+	    "mov r8 = psr ;;\n"
+	    "rsm %[mask] ;;\n"                 /* PSR_IC_MASK */
+	    "srlz.d ;;\n"
+	    "srlz.i ;;\n"
+	    "mov cr.ifa = %[va]\n"             /* va */
+	    "mov cr.itir = %[word1] ;;\n"      /* entry.word[1] */
+	    "cmp.eq p6, p7 = %[dtc], r0 ;;\n"  /* decide between itc and dtc */
+	    "(p6) itc.i %[word0] ;;\n"
+	    "(p7) itc.d %[word0] ;;\n"
+	    "mov psr.l = r8 ;;\n"
+	    "srlz.d ;;\n"
+	    :: [mask] "i" (PSR_IC_MASK),
+	      [va] "r" (va),
+	      [word0] "r" (entry.word[0]),
+	      [word1] "r" (entry.word[1]),
+	      [dtc] "r" (dtc)
+	    : "p6", "p7", "r8"
 	);
 
@@ -333,22 +333,22 @@
 
 	asm volatile (
-		"mov r8 = psr ;;\n"
-		"rsm %[mask] ;;\n"                       /* PSR_IC_MASK */
-		"srlz.d ;;\n"
-		"srlz.i ;;\n"
-		"mov cr.ifa = %[va]\n"                   /* va */
-		"mov cr.itir = %[word1] ;;\n"            /* entry.word[1] */
-		"cmp.eq p6, p7 = %[dtr], r0 ;;\n"        /* decide between itr and dtr */
-		"(p6) itr.i itr[%[tr]] = %[word0] ;;\n"
-		"(p7) itr.d dtr[%[tr]] = %[word0] ;;\n"
-		"mov psr.l = r8 ;;\n"
-		"srlz.d ;;\n"
-		:: [mask] "i" (PSR_IC_MASK),
-		   [va] "r" (va),
-		   [word1] "r" (entry.word[1]),
-		   [word0] "r" (entry.word[0]),
-		   [tr] "r" (tr),
-		   [dtr] "r" (dtr)
-		: "p6", "p7", "r8"
+	    "mov r8 = psr ;;\n"
+	    "rsm %[mask] ;;\n"                       /* PSR_IC_MASK */
+	    "srlz.d ;;\n"
+	    "srlz.i ;;\n"
+	    "mov cr.ifa = %[va]\n"                   /* va */
+	    "mov cr.itir = %[word1] ;;\n"            /* entry.word[1] */
+	    "cmp.eq p6, p7 = %[dtr], r0 ;;\n"        /* decide between itr and dtr */
+	    "(p6) itr.i itr[%[tr]] = %[word0] ;;\n"
+	    "(p7) itr.d dtr[%[tr]] = %[word0] ;;\n"
+	    "mov psr.l = r8 ;;\n"
+	    "srlz.d ;;\n"
+	    :: [mask] "i" (PSR_IC_MASK),
+	      [va] "r" (va),
+	      [word1] "r" (entry.word[1]),
+	      [word0] "r" (entry.word[0]),
+	      [tr] "r" (tr),
+	      [dtr] "r" (dtr)
+	    : "p6", "p7", "r8"
 	);
 
@@ -403,7 +403,7 @@
 {
 	asm volatile (
-		"ptr.d %[page], %[width]\n"
-		:: [page] "r" (page),
-		   [width] "r" (width << 2)
+	    "ptr.d %[page], %[width]\n"
+	    :: [page] "r" (page),
+	      [width] "r" (width << 2)
 	);
 }
Index: kernel/arch/ia64/src/mm/vhpt.c
===================================================================
--- kernel/arch/ia64/src/mm/vhpt.c	(revision a35b458e9db1ca95e679799dc7c1b12c83359ca3)
+++ kernel/arch/ia64/src/mm/vhpt.c	(revision 2f1c88e88f3d33245f94ca59d2b772d4dd5d1f56)
@@ -38,5 +38,5 @@
 #include <print.h>
 
-static vhpt_entry_t* vhpt_base;
+static vhpt_entry_t *vhpt_base;
 
 uintptr_t vhpt_set_up(void)