Index: Makefile
===================================================================
--- Makefile	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ Makefile	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -141,10 +141,10 @@
 .PHONY: all clean config depend boot
 
-all: kernel.bin boot
+all: kernel.bin boot disasm
 
 -include Makefile.depend
 
 clean:
-	-rm -f kernel.bin kernel.raw kernel.map kernel.map.pre kernel.objdump generic/src/debug/real_map.bin Makefile.depend generic/include/arch generic/include/genarch arch/$(ARCH)/_link.ld
+	-rm -f kernel.bin kernel.raw kernel.map kernel.map.pre kernel.objdump kernel.disasm generic/src/debug/real_map.bin Makefile.depend generic/include/arch generic/include/genarch arch/$(ARCH)/_link.ld
 	find generic/src/ arch/$(ARCH)/src/ genarch/src/ -name '*.o' -exec rm \{\} \;
 	$(MAKE) -C arch/$(ARCH)/boot clean
@@ -178,6 +178,9 @@
 	$(MAKE) -C arch/$(ARCH)/boot build KERNEL_SIZE="`cat kernel.bin | wc -c`" CC=$(CC) AS=$(AS) LD=$(LD)
 
+disasm: kernel.raw
+	$(OBJDUMP) -d kernel.raw > kernel.disasm
+
 %.o: %.S
-	$(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -c $< -o $@
+	$(CC) $(DEFS) $(AFLAGS) $(CFLAGS) -D__ASM__ -c $< -o $@
 
 %.o: %.s
Index: arch/amd64/src/asm_utils.S
===================================================================
--- arch/amd64/src/asm_utils.S	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/amd64/src/asm_utils.S	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -34,5 +34,4 @@
 #define ERROR_WORD_INTERRUPT_LIST 0x00027D00
 
-#define __ASM__
 #include <arch/pm.h>
 	
Index: arch/amd64/src/boot/boot.S
===================================================================
--- arch/amd64/src/boot/boot.S	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/amd64/src/boot/boot.S	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -26,6 +26,4 @@
 # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
-
-#define __ASM__
 
 #include <arch/mm/page.h>	
Index: arch/amd64/src/smp/ap.S
===================================================================
--- arch/amd64/src/smp/ap.S	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/amd64/src/smp/ap.S	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -31,5 +31,4 @@
 #
 
-#define __ASM__
 #include <arch/boot/boot.h>
 #include <arch/pm.h>
Index: arch/ia32/src/boot/boot.S
===================================================================
--- arch/ia32/src/boot/boot.S	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/ia32/src/boot/boot.S	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -27,6 +27,4 @@
 #
 
-#define __ASM__
-	
 #include <arch/boot/boot.h>
 #include <arch/boot/memmapasm.h>
Index: arch/ia64/include/asm.h
===================================================================
--- arch/ia64/include/asm.h	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/ia64/include/asm.h	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -221,10 +221,8 @@
 static inline void interrupts_restore(ipl_t ipl)
 {
-	__asm__ volatile (
-		"mov psr.l = %0\n"
-		";;\n"
-		"srlz.d\n"
-		: : "r" ((__u64) ipl)
-	);
+	if (ipl & PSR_I_MASK)
+		(void) interrupts_enable();
+	else
+		(void) interrupts_disable();
 }
 
Index: arch/ia64/include/interrupt.h
===================================================================
--- arch/ia64/include/interrupt.h	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/ia64/include/interrupt.h	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -31,8 +31,17 @@
 
 #include <arch/types.h>
+#include <arch/register.h>
 
-/** External interrupt vectors. */
+/** External Interrupt vectors. */
 #define INTERRUPT_TIMER		0
 #define INTERRUPT_SPURIOUS	15
+
+/** General Exception codes. */
+#define GE_ILLEGALOP		0
+#define GE_PRIVOP		1
+#define GE_PRIVREG		2
+#define GE_RESREGFLD		3
+#define GE_DISBLDISTRAN		4
+#define GE_ILLEGALDEP		8
 
 #define EOI	0		/**< The actual value doesn't matter. */
@@ -46,5 +55,5 @@
 	__u64 ar_rsc;
 	__address cr_ifa;
-	__u64 cr_isr;
+	cr_isr_t cr_isr;
 	__address cr_iipa;
 	__u64 cr_ips;
Index: arch/ia64/include/register.h
===================================================================
--- arch/ia64/include/register.h	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/ia64/include/register.h	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -30,8 +30,11 @@
 #define __ia64_REGISTER_H__
 
+#ifndef __ASM__
 #include <arch/types.h>
+#endif
 
 #define CR_IVR_MASK	0xf
 #define PSR_I_MASK	0x4000
+#define PSR_IC_MASK	0x2000
 
 /** Application registers. */
@@ -109,4 +112,5 @@
 /* CR82-CR127 reserved */
 
+#ifndef __ASM__
 /** External Interrupt Vector Register */
 union cr_ivr {
@@ -144,3 +148,36 @@
 typedef union cr_itv cr_itv_t;
 
+/** Interruption Status Register */
+union cr_isr {
+	struct {
+		union {
+			/** General Exception code field structuring. */
+			struct {
+				unsigned ge_na : 4;
+				unsigned ge_code : 4;
+			} __attribute__ ((packed));
+			__u16 code;
+		};
+		__u8 vector;
+		unsigned : 8;
+		unsigned x : 1;			/**< Execute exception. */
+		unsigned w : 1;			/**< Write exception. */
+		unsigned r : 1;			/**< Read exception. */
+		unsigned na : 1;		/**< Non-access exception. */
+		unsigned sp : 1;		/**< Speculative load exception. */
+		unsigned rs : 1;		/**< Register stack. */
+		unsigned ir : 1;		/**< Incomplete Register frame. */
+		unsigned ni : 1;		/**< Nested Interruption. */
+		unsigned so : 1;		/**< IA-32 Supervisor Override. */
+		unsigned ei : 2;		/**< Excepting Instruction. */
+		unsigned ed : 1;		/**< Exception Deferral. */
+		unsigned : 20;
+	} __attribute__ ((packed));
+	__u64 value;
+};
+
+typedef union cr_isr cr_isr_t;
+
+#endif /* !__ASM__ */
+
 #endif
Index: arch/ia64/src/interrupt.c
===================================================================
--- arch/ia64/src/interrupt.c	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/ia64/src/interrupt.c	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -106,5 +106,5 @@
 
 static char *vector_to_string(__u16 vector);
-static void dump_stack(struct exception_regdump *pstate);
+static void dump_interrupted_context(struct exception_regdump *pstate);
 
 char *vector_to_string(__u16 vector)
@@ -118,5 +118,5 @@
 }
 
-void dump_stack(struct exception_regdump *pstate)
+void dump_interrupted_context(struct exception_regdump *pstate)
 {
 	char *ifa, *iipa, *iip;
@@ -127,23 +127,51 @@
 
 	putchar('\n');
+	printf("Interrupted context dump:\n");
 	printf("ar.bsp=%P\tar.bspstore=%P\n", pstate->ar_bsp, pstate->ar_bspstore);
 	printf("ar.rnat=%Q\tar.rsc=%Q\n", pstate->ar_rnat, pstate->ar_rsc);
 	printf("ar.ifs=%Q\tar.pfs=%Q\n", pstate->ar_ifs, pstate->ar_pfs);
-	printf("cr.isr=%Q\tcr.ips=%Q\t\n", pstate->cr_isr, pstate->cr_ips);
+	printf("cr.isr=%Q\tcr.ips=%Q\t\n", pstate->cr_isr.value, pstate->cr_ips);
 	
-	printf("cr.iip=%Q (%s)\n", pstate->cr_iip, iip ? iip : "?");
-	printf("cr.iipa=%Q (%s)\n", pstate->cr_iipa, iipa ? iipa : "?");
-	printf("cr.ifa=%Q (%s)\n", pstate->cr_ifa, ifa ? ifa : "?");
+	printf("cr.iip=%Q, #%d\t(%s)\n", pstate->cr_iip, pstate->cr_isr.ei ,iip ? iip : "?");
+	printf("cr.iipa=%Q\t(%s)\n", pstate->cr_iipa, iipa ? iipa : "?");
+	printf("cr.ifa=%Q\t(%s)\n", pstate->cr_ifa, ifa ? ifa : "?");
 }
 
 void general_exception(__u64 vector, struct exception_regdump *pstate)
 {
-	dump_stack(pstate);
-	panic("General Exception\n");
+	char *desc = "";
+
+	dump_interrupted_context(pstate);
+
+	switch (pstate->cr_isr.ge_code) {
+	    case GE_ILLEGALOP:
+		desc = "Illegal Operation fault";
+		break;
+	    case GE_PRIVOP:
+		desc = "Privileged Operation fault";
+		break;
+	    case GE_PRIVREG:
+		desc = "Privileged Register fault";
+		break;
+	    case GE_RESREGFLD:
+		desc = "Reserved Register/Field fault";
+		break;
+	    case GE_DISBLDISTRAN:
+		desc = "Disabled Instruction Set Transition fault";
+		break;
+	    case GE_ILLEGALDEP:
+		desc = "Illegal Dependency fault";
+		break;
+	    default:
+	    	desc = "unknown";
+		break;
+	}
+
+	panic("General Exception (%s)\n", desc);
 }
 
 void break_instruction(__u64 vector, struct exception_regdump *pstate)
 {
-	dump_stack(pstate);
+	dump_interrupted_context(pstate);
 	panic("Break Instruction\n");
 }
@@ -151,5 +179,5 @@
 void universal_handler(__u64 vector, struct exception_regdump *pstate)
 {
-	dump_stack(pstate);
+	dump_interrupted_context(pstate);
 	panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
 }
Index: arch/ia64/src/ivt.S
===================================================================
--- arch/ia64/src/ivt.S	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/ia64/src/ivt.S	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -1,4 +1,5 @@
 #
 # Copyright (C) 2005 Jakub Vana
+# Copyright (C) 2005 Jakub Jermar
 # All rights reserved.
 #
@@ -28,4 +29,5 @@
 
 #include <arch/stack.h>
+#include <arch/register.h>
 
 #define STACK_ITEMS		12
@@ -190,5 +192,5 @@
 
     /* 6. switch to bank 1 and reenable PSR.ic */
-	ssm 0x2000
+	ssm PSR_IC_MASK
 	bsw.1 ;;
 	srlz.d
@@ -308,5 +310,5 @@
 	
     /* 15. disable PSR.ic and switch to bank 0 */
-	rsm 0x2000
+	rsm PSR_IC_MASK
 	bsw.0 ;;
 	srlz.d
Index: arch/mips32/src/context.S
===================================================================
--- arch/mips32/src/context.S	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/mips32/src/context.S	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -27,5 +27,4 @@
 #
 
-#define __ASM__
 #include <arch/asm/regname.h>
 #include <arch/context_offset.h>
Index: arch/mips32/src/start.S
===================================================================
--- arch/mips32/src/start.S	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/mips32/src/start.S	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -27,6 +27,4 @@
 #
 
-#define __ASM__
-	
 #include <arch/asm/regname.h>
 #include <arch/mm/page.h>
Index: arch/sparc64/src/context.S
===================================================================
--- arch/sparc64/src/context.S	(revision b183865e99c534b42e7e5de6db9c93b351693c93)
+++ arch/sparc64/src/context.S	(revision 2ccd27513379512abd7c8b126c84a0323a3cb5b6)
@@ -27,5 +27,4 @@
 #
 
-#define __ASM__
 #include <arch/context_offset.h>