Index: HelenOS.config
===================================================================
--- HelenOS.config	(revision 3233adb282aa1114b60f33176d7b3199f26cce2e)
+++ HelenOS.config	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -137,4 +137,9 @@
 ! [PLATFORM=mips32&(MACHINE=bmalta|MACHINE=lmalta)] PROCESSOR (choice)
 
+% Kernel memory model
+@ "kernel" Kernel
+@ "large" Large
+! [PLATFORM=amd64] MEMORY_MODEL (choice)
+
 % RAM disk format
 @ "tmpfs" TMPFS image
Index: boot/arch/riscv64/Makefile.inc
===================================================================
--- boot/arch/riscv64/Makefile.inc	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/Makefile.inc	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,49 @@
+#
+# Copyright (c) 2016 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+BFD_NAME = elf64-littleriscv
+BFD_OUTPUT = $(BFD_NAME)
+BFD_ARCH = riscv
+BFD = binary
+
+BITS = 64
+ENDIANESS = LE
+
+SOURCES = \
+	arch/$(BARCH)/src/asm.S \
+	arch/$(BARCH)/src/main.c \
+	arch/$(BARCH)/src/ucb.c \
+	arch/$(BARCH)/src/putchar.c \
+	$(COMPS_C) \
+	generic/src/memstr.c \
+	generic/src/printf_core.c \
+	generic/src/vprintf.c \
+	generic/src/printf.c \
+	generic/src/str.c \
+	generic/src/version.c \
+	generic/src/inflate.c
Index: boot/arch/riscv64/_link.ld.in
===================================================================
--- boot/arch/riscv64/_link.ld.in	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/_link.ld.in	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,29 @@
+ENTRY(start)
+
+SECTIONS {
+	.text : {
+		*(BOOTSTRAP);
+		*(.text);
+	}
+	
+	.data : {
+		*(.data);       /* initialized data */
+		*(.rodata);
+		*(.rodata.*);
+		*(.sdata);
+		*(.reginfo);
+		*(.sbss);
+		*(.scommon);
+		*(.bss);        /* uninitialized static variables */
+		*(COMMON);      /* global variables */
+[[COMPONENTS]]
+	}
+	
+	/DISCARD/ : {
+		*(.gnu.*);
+		*(.mdebug*);
+		*(.pdr);
+		*(.comment);
+		*(.note);
+	}
+}
Index: boot/arch/riscv64/include/arch.h
===================================================================
--- boot/arch/riscv64/include/arch.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/include/arch.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_riscv64_ARCH_H_
+#define BOOT_riscv64_ARCH_H_
+
+#define PAGE_WIDTH  12
+#define PAGE_SIZE   (1 << PAGE_WIDTH)
+
+#define BOOT_STACK_SIZE  PAGE_SIZE
+
+#define DEFAULT_MTVEC      0x00000100
+#define TRAP_VECTOR_RESET  0x0100
+
+#endif
Index: boot/arch/riscv64/include/asm.h
===================================================================
--- boot/arch/riscv64/include/asm.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/include/asm.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_riscv64_ASM_H_
+#define BOOT_riscv64_ASM_H_
+
+#include <typedefs.h>
+
+extern void jump_to_kernel(void *, uintptr_t)
+    __attribute__((noreturn));
+
+#endif
Index: boot/arch/riscv64/include/main.h
===================================================================
--- boot/arch/riscv64/include/main.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/include/main.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_riscv64_MAIN_H_
+#define BOOT_riscv64_MAIN_H_
+
+extern void bootstrap(void);
+
+#endif
Index: boot/arch/riscv64/include/types.h
===================================================================
--- boot/arch/riscv64/include/types.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/include/types.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_riscv64_TYPES_H_
+#define BOOT_riscv64_TYPES_H_
+
+#define MEMMAP_MAX_RECORDS         32
+#define TASKMAP_MAX_RECORDS        32
+#define BOOTINFO_TASK_NAME_BUFLEN  32
+
+typedef uint64_t size_t;
+typedef uint64_t uintptr_t;
+
+typedef struct {
+	void *start;
+	size_t size;
+} memzone_t;
+
+typedef struct {
+	uint64_t total;
+	size_t cnt;
+	memzone_t zones[MEMMAP_MAX_RECORDS];
+} memmap_t;
+
+typedef struct {
+	/** Address where the task was placed. */
+	void *addr;
+	/** Size of the task's binary. */
+	size_t size;
+	/** Task name. */
+	char name[BOOTINFO_TASK_NAME_BUFLEN];
+} task_t;
+
+typedef struct {
+	size_t cnt;
+	task_t tasks[TASKMAP_MAX_RECORDS];
+} taskmap_t;
+
+typedef struct {
+	memmap_t memmap;
+	taskmap_t taskmap;
+} bootinfo_t;
+
+#endif
Index: boot/arch/riscv64/include/ucb.h
===================================================================
--- boot/arch/riscv64/include/ucb.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/include/ucb.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_riscv64_UCB_H_
+#define BOOT_riscv64_UCB_H_
+
+/** University of California, Berkeley extensions to RISC-V
+ *
+ * Non-standard host-target interface extension targeting
+ * primarily the Spike ISA Simulator.
+ */
+
+#include <typedefs.h>
+
+#define CSR_MTOHOST    0x780
+#define CSR_MFROMHOST  0x781
+
+#define HTIF_DEVICE_CONSOLE  1
+
+#define HTIF_CONSOLE_PUTC  1
+
+extern void htif_cmd(uint8_t device, uint8_t cmd, uint64_t payload);
+
+#endif
Index: boot/arch/riscv64/src/asm.S
===================================================================
--- boot/arch/riscv64/src/asm.S	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/src/asm.S	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,89 @@
+#
+# Copyright (c) 2016 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+#include <abi/asmtool.h>
+#include <arch/arch.h>
+
+.section BOOTSTRAP
+
+.org DEFAULT_MTVEC + TRAP_VECTOR_RESET
+SYMBOL(start)
+	/* Set up machine state */
+	li x1, 0
+	li x2, 0
+	li x3, 0
+	li x4, 0
+	li x5, 0
+	li x6, 0
+	li x7, 0
+	li x8, 0
+	li x9, 0
+	li x10, 0
+	li x11, 0
+	li x12, 0
+	li x13, 0
+	li x14, 0
+	li x15, 0
+	li x16, 0
+	li x17, 0
+	li x18, 0
+	li x19, 0
+	li x20, 0
+	li x21, 0
+	li x22, 0
+	li x23, 0
+	li x24, 0
+	li x25, 0
+	li x26, 0
+	li x27, 0
+	li x28, 0
+	li x29, 0
+	li x30, 0
+	li x31, 0
+	
+	/* Set up stack, create stack frame */
+	la sp, boot_stack + BOOT_STACK_SIZE
+	addi sp, sp, -16
+	
+	j bootstrap
+
+.text
+
+FUNCTION_BEGIN(jump_to_kernel)
+	j halt
+FUNCTION_END(jump_to_kernel)
+
+FUNCTION_BEGIN(halt)
+	j halt
+FUNCTION_END(halt)
+
+.data
+
+.align PAGE_WIDTH
+SYMBOL(boot_stack)
+	.space BOOT_STACK_SIZE
Index: boot/arch/riscv64/src/main.c
===================================================================
--- boot/arch/riscv64/src/main.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/src/main.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <arch/main.h>
+#include <arch/arch.h>
+#include <arch/asm.h>
+#include <version.h>
+#include <typedefs.h>
+#include <printf.h>
+#include <macros.h>
+#include <errno.h>
+#include <align.h>
+#include <str.h>
+#include <halt.h>
+#include <inflate.h>
+#include <arch/_components.h>
+
+#define KA2PA(x)  (((uintptr_t) (x)) - UINT64_C(0xffff800000000000))
+#define PA2KA(x)  (((uintptr_t) (x)) + UINT64_C(0xffff800000000000))
+
+static bootinfo_t bootinfo;
+
+void bootstrap(void)
+{
+	version_print();
+	
+	// FIXME TODO: read from device tree
+	bootinfo.memmap.total = 1024 * 1024 * 1024;
+	bootinfo.memmap.cnt = 0;
+	
+	printf("\nMemory statistics (total %lu MB)\n\n", bootinfo.memmap.total >> 20);
+	printf(" %p: boot info structure\n", &bootinfo);
+	
+	uintptr_t top = 0;
+	
+	for (size_t i = 0; i < COMPONENTS; i++) {
+		printf(" %p: %s image (%zu/%zu bytes)\n", components[i].start,
+		    components[i].name, components[i].inflated,
+		    components[i].size);
+		
+		uintptr_t tail = (uintptr_t) components[i].start +
+		    components[i].size;
+		if (tail > top)
+			top = tail;
+	}
+	
+	top = ALIGN_UP(top, PAGE_SIZE);
+	printf(" %p: inflate area\n", (void *) top);
+	
+	void *kernel_entry = NULL;
+	void *dest[COMPONENTS];
+	size_t cnt = 0;
+	bootinfo.taskmap.cnt = 0;
+	
+	for (size_t i = 0; i < min(COMPONENTS, TASKMAP_MAX_RECORDS); i++) {
+		top = ALIGN_UP(top, PAGE_SIZE);
+		
+		if (i > 0) {
+			bootinfo.taskmap.tasks[bootinfo.taskmap.cnt].addr =
+			    (void *) PA2KA(top);
+			bootinfo.taskmap.tasks[bootinfo.taskmap.cnt].size =
+			    components[i].inflated;
+			
+			str_cpy(bootinfo.taskmap.tasks[bootinfo.taskmap.cnt].name,
+			    BOOTINFO_TASK_NAME_BUFLEN, components[i].name);
+			
+			bootinfo.taskmap.cnt++;
+		} else
+			kernel_entry = (void *) top;
+		
+		dest[i] = (void *) top;
+		top += components[i].inflated;
+		cnt++;
+	}
+	
+	printf(" %p: kernel entry point\n", kernel_entry);
+	
+	if (top >= bootinfo.memmap.total) {
+		printf("Not enough physical memory available.\n");
+		printf("The boot image is too large. Halting.\n");
+		halt();
+	}
+	
+	printf("\nInflating components ... ");
+	
+	for (size_t i = cnt; i > 0; i--) {
+		printf("%s ", components[i - 1].name);
+		
+		int err = inflate(components[i - 1].start, components[i - 1].size,
+		    dest[i - 1], components[i - 1].inflated);
+		
+		if (err != EOK) {
+			printf("\n%s: Inflating error %d, halting.\n",
+			    components[i - 1].name, err);
+			halt();
+		}
+	}
+	
+	printf(".\n");
+	
+	printf("Booting the kernel...\n");
+	jump_to_kernel(kernel_entry, PA2KA(&bootinfo));
+}
Index: boot/arch/riscv64/src/putchar.c
===================================================================
--- boot/arch/riscv64/src/putchar.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/src/putchar.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <typedefs.h>
+#include <arch/arch.h>
+#include <putchar.h>
+#include <str.h>
+#include <arch/ucb.h>
+
+void putchar(const wchar_t ch)
+{
+	if (ascii_check(ch))
+		htif_cmd(HTIF_DEVICE_CONSOLE, HTIF_CONSOLE_PUTC, ch);
+	else
+		htif_cmd(HTIF_DEVICE_CONSOLE, HTIF_CONSOLE_PUTC, U_SPECIAL);
+}
Index: boot/arch/riscv64/src/ucb.c
===================================================================
--- boot/arch/riscv64/src/ucb.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ boot/arch/riscv64/src/ucb.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <arch/ucb.h>
+#include <arch/arch.h>
+#include <macros.h>
+
+void htif_cmd(uint8_t device, uint8_t cmd, uint64_t payload)
+{
+	uint64_t val = (((uint64_t) device) << 56) |
+	    (((uint64_t) cmd) << 48) |
+	    (payload & UINT64_C(0xffffffffffff));
+	uint64_t retval;
+	
+	do {
+		asm volatile (
+			"csrrw %[retval], " STRING(CSR_MTOHOST) ", %[val]\n"
+			: [retval] "=r" (retval)
+			: [val] "r" (val)
+		);
+	} while (retval != 0);
+}
Index: defaults/amd64/Makefile.config
===================================================================
--- defaults/amd64/Makefile.config	(revision 3233adb282aa1114b60f33176d7b3199f26cce2e)
+++ defaults/amd64/Makefile.config	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -1,4 +1,7 @@
 # Platform
 PLATFORM = amd64
+
+# Kernel memory model
+MEMORY_MODEL = kernel
 
 # Ramdisk format
Index: kernel/arch/amd64/Makefile.inc
===================================================================
--- kernel/arch/amd64/Makefile.inc	(revision 3233adb282aa1114b60f33176d7b3199f26cce2e)
+++ kernel/arch/amd64/Makefile.inc	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -32,5 +32,5 @@
 
 FPU_NO_CFLAGS = -mno-sse -mno-sse2
-CMN1 = -m64 -mcmodel=kernel -mno-red-zone -fno-unwind-tables -fno-omit-frame-pointer
+CMN1 = -m64 -mcmodel=$(MEMORY_MODEL) -mno-red-zone -fno-unwind-tables -fno-omit-frame-pointer
 GCC_CFLAGS += $(CMN1)
 ICC_CFLAGS += $(CMN1)
Index: kernel/arch/amd64/include/arch/mm/km.h
===================================================================
--- kernel/arch/amd64/include/arch/mm/km.h	(revision 3233adb282aa1114b60f33176d7b3199f26cce2e)
+++ kernel/arch/amd64/include/arch/mm/km.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -38,9 +38,23 @@
 #include <typedefs.h>
 
-#define KM_AMD64_IDENTITY_START		UINT64_C(0xffffffff80000000)
-#define KM_AMD64_IDENTITY_SIZE		UINT64_C(0x0000000080000000)
+#ifdef MEMORY_MODEL_kernel
 
-#define KM_AMD64_NON_IDENTITY_START	UINT64_C(0xffff800000000000)
-#define KM_AMD64_NON_IDENTITY_SIZE	UINT64_C(0x00007fff80000000)
+#define KM_AMD64_IDENTITY_START      UINT64_C(0xffffffff80000000)
+#define KM_AMD64_IDENTITY_SIZE       UINT64_C(0x0000000080000000)
+
+#define KM_AMD64_NON_IDENTITY_START  UINT64_C(0xffff800000000000)
+#define KM_AMD64_NON_IDENTITY_SIZE   UINT64_C(0x00007fff80000000)
+
+#endif /* MEMORY_MODEL_kernel */
+
+#ifdef MEMORY_MODEL_large
+
+#define KM_AMD64_IDENTITY_START      UINT64_C(0xffff800000000000)
+#define KM_AMD64_IDENTITY_SIZE       UINT64_C(0x0000400000000000)
+
+#define KM_AMD64_NON_IDENTITY_START  UINT64_C(0xffffc00000000000)
+#define KM_AMD64_NON_IDENTITY_SIZE   UINT64_C(0x0000400000000000)
+
+#endif /* MEMORY_MODEL_large */
 
 extern void km_identity_arch_init(void);
Index: kernel/arch/amd64/include/arch/mm/page.h
===================================================================
--- kernel/arch/amd64/include/arch/mm/page.h	(revision 3233adb282aa1114b60f33176d7b3199f26cce2e)
+++ kernel/arch/amd64/include/arch/mm/page.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -42,4 +42,6 @@
 #define PAGE_SIZE   FRAME_SIZE
 
+#ifdef MEMORY_MODEL_kernel
+
 #ifndef __ASM__
 
@@ -53,4 +55,22 @@
 
 #endif /* __ASM__ */
+
+#endif /* MEMORY_MODEL_kernel */
+
+#ifdef MEMORY_MODEL_large
+
+#ifndef __ASM__
+
+#define KA2PA(x)  (((uintptr_t) (x)) - UINT64_C(0xffff800000000000))
+#define PA2KA(x)  (((uintptr_t) (x)) + UINT64_C(0xffff800000000000))
+
+#else /* __ASM__ */
+
+#define KA2PA(x)  ((x) - 0xffff800000000000)
+#define PA2KA(x)  ((x) + 0xffff800000000000)
+
+#endif /* __ASM__ */
+
+#endif /* MEMORY_MODEL_large */
 
 /* Number of entries in each level. */
Index: kernel/arch/amd64/src/boot/multiboot.S
===================================================================
--- kernel/arch/amd64/src/boot/multiboot.S	(revision 3233adb282aa1114b60f33176d7b3199f26cce2e)
+++ kernel/arch/amd64/src/boot/multiboot.S	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -430,10 +430,21 @@
 	movl multiboot_eax, %edi
 	movl multiboot_ebx, %esi
+	
+#ifdef MEMORY_MODEL_large
+	movabsq $amd64_pre_main, %rax
+	callq *%rax
+#else
 	callq amd64_pre_main
-
+#endif
+	
 	long_status $status_main
 	
 	/* Call main_bsp() */
-	callq main_bsp 
+#ifdef MEMORY_MODEL_large
+	movabsq $main_bsp, %rax
+	callq *%rax
+#else
+	callq main_bsp
+#endif
 	
 	/* Not reached */
@@ -622,4 +633,5 @@
 	ptl2gen 512 7
 
+#ifdef MEMORY_MODEL_kernel
 .align 4096
 ptl_1:
@@ -638,5 +650,4 @@
 	.quad ptl_2_1g + (PTL_WRITABLE | PTL_PRESENT)
 
-
 .align 4096
 SYMBOL(ptl_0)
@@ -644,4 +655,27 @@
 	.fill 510, 8, 0
 	.quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
+#endif
+
+#ifdef MEMORY_MODEL_large
+.align 4096
+ptl_1:
+	/* Identity mapping for [0; 8G) */
+	.quad ptl_2_0g + (PTL_WRITABLE | PTL_PRESENT)
+	.quad ptl_2_1g + (PTL_WRITABLE | PTL_PRESENT)
+	.quad ptl_2_2g + (PTL_WRITABLE | PTL_PRESENT)
+	.quad ptl_2_3g + (PTL_WRITABLE | PTL_PRESENT)
+	.quad ptl_2_4g + (PTL_WRITABLE | PTL_PRESENT)
+	.quad ptl_2_5g + (PTL_WRITABLE | PTL_PRESENT)
+	.quad ptl_2_6g + (PTL_WRITABLE | PTL_PRESENT)
+	.quad ptl_2_7g + (PTL_WRITABLE | PTL_PRESENT)
+	.fill 504, 8, 0
+
+.align 4096
+SYMBOL(ptl_0)
+	.quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
+	.fill 255, 8, 0
+	.quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
+	.fill 255, 8, 0
+#endif
 
 .section K_DATA_START, "aw", @progbits
Index: kernel/arch/amd64/src/boot/multiboot2.S
===================================================================
--- kernel/arch/amd64/src/boot/multiboot2.S	(revision 3233adb282aa1114b60f33176d7b3199f26cce2e)
+++ kernel/arch/amd64/src/boot/multiboot2.S	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -253,8 +253,19 @@
 	movl multiboot_eax, %edi
 	movl multiboot_ebx, %esi
-	callq amd64_pre_main 
+	
+#ifdef MEMORY_MODEL_large
+	movabsq $amd64_pre_main, %rax
+	callq *%rax
+#else
+	callq amd64_pre_main
+#endif
 	
 	/* Call main_bsp() */
-	callq main_bsp 
+#ifdef MEMORY_MODEL_large
+	movabsq $main_bsp, %rax
+	callq *%rax
+#else
+	callq main_bsp
+#endif
 	
 	/* Not reached */
Index: kernel/arch/amd64/src/context.S
===================================================================
--- kernel/arch/amd64/src/context.S	(revision 3233adb282aa1114b60f33176d7b3199f26cce2e)
+++ kernel/arch/amd64/src/context.S	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -50,6 +50,11 @@
 	movq %r14, CONTEXT_OFFSET_R14(%rdi)
 	movq %r15, CONTEXT_OFFSET_R15(%rdi)
-
+	
+#ifdef MEMORY_MODEL_large
+	movabsq $vreg_ptr, %rsi
+	movq (%rsi), %rsi
+#else
 	movq vreg_ptr, %rsi
+#endif
 	movq %fs:VREG_TP(%rsi), %rsi
 	movq %rsi, CONTEXT_OFFSET_TP(%rdi)
@@ -79,6 +84,11 @@
 	movq %rdx, (%rsp)
 	
-	movq CONTEXT_OFFSET_TP(%rdi), %rcx 
+	movq CONTEXT_OFFSET_TP(%rdi), %rcx
+#ifdef MEMORY_MODEL_large
+	movabsq $vreg_ptr, %rsi
+	movq (%rsi), %rsi
+#else
 	movq vreg_ptr, %rsi
+#endif
 	movq %rcx, %fs:VREG_TP(%rsi)
 	
Index: kernel/arch/riscv64/Makefile.inc
===================================================================
--- kernel/arch/riscv64/Makefile.inc	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/Makefile.inc	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,53 @@
+#
+# Copyright (c) 2016 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+BFD_NAME = elf64-littleriscv
+BFD_ARCH = riscv
+BFD = binary
+
+BITS = 64
+ENDIANESS = LE
+
+ARCH_SOURCES = \
+	arch/$(KARCH)/src/asm.S \
+	arch/$(KARCH)/src/debug/stacktrace.c \
+	arch/$(KARCH)/src/proc/scheduler.c \
+	arch/$(KARCH)/src/proc/task.c \
+	arch/$(KARCH)/src/proc/thread.c \
+	arch/$(KARCH)/src/riscv64.c \
+	arch/$(KARCH)/src/userspace.c \
+	arch/$(KARCH)/src/cpu/cpu.c \
+	arch/$(KARCH)/src/mm/km.c \
+	arch/$(KARCH)/src/mm/as.c \
+	arch/$(KARCH)/src/mm/frame.c \
+	arch/$(KARCH)/src/mm/page.c \
+	arch/$(KARCH)/src/mm/tlb.c
+
+ARCH_AUTOGENS_AG = \
+	arch/$(KARCH)/include/arch/istate_struct.ag \
+	arch/$(KARCH)/include/arch/context_struct.ag
Index: kernel/arch/riscv64/_link.ld.in
===================================================================
--- kernel/arch/riscv64/_link.ld.in	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/_link.ld.in	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,63 @@
+/*
+ * RISC-V 64 linker script
+ *
+ *  kernel text
+ *  kernel data
+ *
+ */
+
+OUTPUT_ARCH(riscv)
+ENTRY(kernel_image_start)
+
+#include <arch/boot/boot.h>
+#include <arch/mm/page.h>
+
+SECTIONS {
+	.unmapped BOOT_OFFSET: AT (0) {
+		unmapped_ktext_start = .;
+		*(K_TEXT_START);
+		unmapped_ktext_end = .;
+		
+		unmapped_kdata_start = .;
+		*(K_DATA_START);
+		*(K_INI_PTLS);
+		unmapped_kdata_end = .;
+	}
+	
+	.mapped (BOOT_OFFSET + SIZEOF(.unmapped)) : AT (SIZEOF(.unmapped)) {
+		ktext_start = .;
+		*(.text);
+		ktext_end = .;
+		
+		kdata_start = .;
+		*(.data);                       /* initialized data */
+		*(.rodata*);
+		hardcoded_load_address = .;
+		QUAD(PA2KA(BOOT_OFFSET));
+		hardcoded_ktext_size = .;
+		QUAD(ktext_end - ktext_start + (unmapped_ktext_end - unmapped_ktext_start));
+		hardcoded_kdata_size = .;
+		QUAD(kdata_end - kdata_start + (unmapped_kdata_end - unmapped_kdata_start));
+		hardcoded_unmapped_ktext_size = .;
+		QUAD(unmapped_ktext_end - unmapped_ktext_start);
+		hardcoded_unmapped_kdata_size = .;
+		QUAD(unmapped_kdata_end - unmapped_kdata_start);
+		*(.sdata);
+		*(.reginfo);
+		*(.sbss);
+		*(.scommon);
+		*(.bss);                        /* uninitialized static variables */
+		*(COMMON);                      /* global variables */
+		. = ALIGN(8);
+		symbol_table = .;
+		*(symtab.*);
+		kdata_end = .;
+	}
+	
+	/DISCARD/ : {
+		*(.mdebug*);
+		*(.pdr);
+		*(.comment);
+		*(.note);
+	}
+}
Index: kernel/arch/riscv64/include/arch/arch.h
===================================================================
--- kernel/arch/riscv64/include/arch/arch.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/arch.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_ARCH_H_
+#define KERN_riscv64_ARCH_H_
+
+#include <arch/boot/boot.h>
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/asm.h
===================================================================
--- kernel/arch/riscv64/include/arch/asm.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/asm.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_ASM_H_
+#define KERN_riscv64_ASM_H_
+
+#include <typedefs.h>
+#include <config.h>
+#include <arch/mm/asid.h>
+#include <trace.h>
+
+NO_TRACE static inline ipl_t interrupts_enable(void)
+{
+	// FIXME
+	return 0;
+}
+
+NO_TRACE static inline ipl_t interrupts_disable(void)
+{
+	// FIXME
+	return 0;
+}
+
+NO_TRACE static inline void interrupts_restore(ipl_t ipl)
+{
+	// FIXME
+}
+
+NO_TRACE static inline ipl_t interrupts_read(void)
+{
+	// FIXME
+	return 0;
+}
+
+NO_TRACE static inline bool interrupts_disabled(void)
+{
+	// FIXME
+	return 0;
+}
+
+NO_TRACE static inline uintptr_t get_stack_base(void)
+{
+	// FIXME
+	return 0;
+}
+
+NO_TRACE static inline void cpu_sleep(void)
+{
+}
+
+NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v)
+{
+	*port = v;
+}
+
+NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v)
+{
+	*port = v;
+}
+
+NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v)
+{
+	*port = v;
+}
+
+NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
+{
+	return *port;
+}
+
+NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
+{
+	return *port;
+}
+
+NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
+{
+	return *port;
+}
+
+extern void cpu_halt(void) __attribute__((noreturn));
+extern void asm_delay_loop(uint32_t t);
+extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack,
+    uintptr_t entry);
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/atomic.h
===================================================================
--- kernel/arch/riscv64/include/arch/atomic.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/atomic.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_ATOMIC_H_
+#define KERN_riscv64_ATOMIC_H_
+
+#include <trace.h>
+
+NO_TRACE static inline void atomic_inc(atomic_t *val)
+{
+	// FIXME
+}
+
+NO_TRACE static inline void atomic_dec(atomic_t *val)
+{
+	// FIXME
+}
+
+NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val)
+{
+	atomic_inc(val);
+	return val->count - 1;
+}
+
+NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val)
+{
+	atomic_dec(val);
+	return val->count + 1;
+}
+
+NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val)
+{
+	atomic_inc(val);
+	return val->count;
+}
+
+NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val)
+{
+	atomic_dec(val);
+	return val->count;
+}
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/barrier.h
===================================================================
--- kernel/arch/riscv64/include/arch/barrier.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/barrier.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_BARRIER_H_
+#define KERN_riscv64_BARRIER_H_
+
+#include <trace.h>
+
+// FIXME
+
+#define CS_ENTER_BARRIER()  asm volatile ("" ::: "memory")
+#define CS_LEAVE_BARRIER()  asm volatile ("" ::: "memory")
+
+#define memory_barrier()  asm volatile ("" ::: "memory")
+#define read_barrier()    asm volatile ("" ::: "memory")
+#define write_barrier()   asm volatile ("" ::: "memory")
+
+#ifdef KERNEL
+
+#define smc_coherence(addr)
+#define smc_coherence_block(addr, size)
+
+#endif /* KERNEL */
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/boot/boot.h
===================================================================
--- kernel/arch/riscv64/include/arch/boot/boot.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/boot/boot.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_BOOT_H_
+#define KERN_riscv64_BOOT_H_
+
+#define BOOT_OFFSET  0x200000
+
+#define TASKMAP_MAX_RECORDS        32
+#define MEMMAP_MAX_RECORDS         32
+#define BOOTINFO_TASK_NAME_BUFLEN  32
+
+#ifndef __ASM__
+
+#include <typedefs.h>
+#include <config.h>
+
+typedef struct {
+	void *addr;
+	size_t size;
+	char name[BOOTINFO_TASK_NAME_BUFLEN];
+} utask_t;
+
+typedef struct {
+	size_t cnt;
+	utask_t tasks[TASKMAP_MAX_RECORDS];
+} taskmap_t;
+
+typedef struct {
+	void *start;
+	size_t size;
+} memzone_t;
+
+typedef struct {
+	uint64_t total;
+	size_t cnt;
+	memzone_t zones[MEMMAP_MAX_RECORDS];
+} memmap_t;
+
+typedef struct {
+	memmap_t memmap;
+	taskmap_t taskmap;
+	ballocs_t ballocs;
+} bootinfo_t;
+
+extern memmap_t memmap;
+
+#endif
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/context.h
===================================================================
--- kernel/arch/riscv64/include/arch/context.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/context.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_CONTEXT_H_
+#define KERN_riscv64_CONTEXT_H_
+
+#include <arch/context_struct.h>
+
+#define SP_DELTA  16
+
+// FIXME
+
+#define context_set(context, pc, stack, size) \
+	context_set_generic(context, pc, stack, size)
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/context_struct.ag
===================================================================
--- kernel/arch/riscv64/include/arch/context_struct.ag	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/context_struct.ag	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,184 @@
+#
+# Copyright (c) 2016 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+{
+        name : context,
+
+        includes : [
+                {
+                        include : <typedefs.h>
+                }
+        ],
+
+        members : [
+                #
+                # There is a room for optimization (we can store just those
+                # registers that must be preserved during ABI function call).
+                #
+
+                {
+                        name : sp,
+                        type : uint64_t
+                },
+                {
+                        name : pc,
+                        type : uint64_t
+                },
+
+                {
+                        name : zero,
+                        type : uint64_t
+                },
+                {
+                        name : ra,
+                        type : uint64_t
+                },
+
+                {
+                        name : x3,
+                        type : uint64_t
+                },
+                {
+                        name : x4,
+                        type : uint64_t
+                },
+                {
+                        name : x5,
+                        type : uint64_t
+                },
+                {
+                        name : x6,
+                        type : uint64_t
+                },
+                {
+                        name : x7,
+                        type : uint64_t
+                },
+                {
+                        name : x8,
+                        type : uint64_t
+                },
+                {
+                        name : x9,
+                        type : uint64_t
+                },
+                {
+                        name : x10,
+                        type : uint64_t
+                },
+                {
+                        name : x11,
+                        type : uint64_t
+                },
+                {
+                        name : x12,
+                        type : uint64_t
+                },
+                {
+                        name : x13,
+                        type : uint64_t
+                },
+                {
+                        name : x14,
+                        type : uint64_t
+                },
+                {
+                        name : x15,
+                        type : uint64_t
+                },
+                {
+                        name : x16,
+                        type : uint64_t
+                },
+                {
+                        name : x17,
+                        type : uint64_t
+                },
+                {
+                        name : x18,
+                        type : uint64_t
+                },
+                {
+                        name : x19,
+                        type : uint64_t
+                },
+                {
+                        name : x20,
+                        type : uint64_t
+                },
+                {
+                        name : x21,
+                        type : uint64_t
+                },
+                {
+                        name : x22,
+                        type : uint64_t
+                },
+                {
+                        name : x23,
+                        type : uint64_t
+                },
+                {
+                        name : x24,
+                        type : uint64_t
+                },
+                {
+                        name : x25,
+                        type : uint64_t
+                },
+                {
+                        name : x26,
+                        type : uint64_t
+                },
+                {
+                        name : x27,
+                        type : uint64_t
+                },
+                {
+                        name : x28,
+                        type : uint64_t
+                },
+                {
+                        name : x29,
+                        type : uint64_t
+                },
+                {
+                        name : x30,
+                        type : uint64_t
+                },
+                {
+                        name : x31,
+                        type : uint64_t
+                },
+
+                {
+                        name : ipl,
+                        type : ipl_t
+                }
+        ]
+}
Index: kernel/arch/riscv64/include/arch/cpu.h
===================================================================
--- kernel/arch/riscv64/include/arch/cpu.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/cpu.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_CPU_H_
+#define KERN_riscv64_CPU_H_
+
+#ifndef __ASM__
+
+typedef struct {
+} cpu_arch_t;
+
+extern void cpu_setup_fpu(void);
+
+#endif /* __ASM__ */
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/cycle.h
===================================================================
--- kernel/arch/riscv64/include/arch/cycle.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/cycle.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_CYCLE_H_
+#define KERN_riscv64_CYCLE_H_
+
+#include <trace.h>
+
+NO_TRACE static inline uint64_t get_cycle(void)
+{
+	return 0;
+}
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/elf.h
===================================================================
--- kernel/arch/riscv64/include/arch/elf.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/elf.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_ELF_H_
+#define KERN_riscv64_ELF_H_
+
+#define ELF_MACHINE        EM_RISCV
+#define ELF_DATA_ENCODING  ELFDATA2LSB
+#define ELF_CLASS          ELFCLASS64
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/faddr.h
===================================================================
--- kernel/arch/riscv64/include/arch/faddr.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/faddr.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_FADDR_H_
+#define KERN_riscv64_FADDR_H_
+
+#include <typedefs.h>
+
+#define FADDR(fptr)  ((uintptr_t) (fptr))
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/fpu_context.h
===================================================================
--- kernel/arch/riscv64/include/arch/fpu_context.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/fpu_context.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_FPU_CONTEXT_H_
+#define KERN_riscv64_FPU_CONTEXT_H_
+
+#include <typedefs.h>
+
+typedef struct {
+} fpu_context_t;
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/interrupt.h
===================================================================
--- kernel/arch/riscv64/include/arch/interrupt.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/interrupt.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64interrupt
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_INTERRUPT_H_
+#define KERN_riscv64_INTERRUPT_H_
+
+#include <typedefs.h>
+#include <arch/istate.h>
+
+#define IVT_ITEMS  0
+#define IVT_FIRST  0
+
+#define VECTOR_TLB_SHOOTDOWN_IPI  0
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/istate.h
===================================================================
--- kernel/arch/riscv64/include/arch/istate.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/istate.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64interrupt
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_ISTATE_H_
+#define KERN_riscv64_ISTATE_H_
+
+#include <trace.h>
+
+#ifdef KERNEL
+	#include <arch/istate_struct.h>
+#else
+	#include <libarch/istate_struct.h>
+#endif
+
+NO_TRACE static inline int istate_from_uspace(istate_t *istate)
+{
+	// FIXME
+	return 0;
+}
+
+NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
+    uintptr_t retaddr)
+{
+	// FIXME
+}
+
+NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate)
+{
+	// FIXME
+	return 0;
+}
+
+NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate)
+{
+	// FIXME
+	return 0;
+}
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/istate_struct.ag
===================================================================
--- kernel/arch/riscv64/include/arch/istate_struct.ag	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/istate_struct.ag	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,177 @@
+#
+# Copyright (c) 2016 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+{
+        name : istate,
+
+        includes : [
+                {
+                        guard : KERNEL,
+                        include : <typedefs.h>
+                },
+                {
+                        negative-guard: KERNEL,
+                        include : <sys/types.h>
+                }
+        ],
+
+        members : [
+                {
+                        name : zero,
+                        type : uint64_t
+                },
+                {
+                        name : ra,
+                        type : uint64_t
+                },
+                {
+                        name : sp,
+                        type : uint64_t
+                },
+                {
+                        name : x3,
+                        type : uint64_t
+                },
+                {
+                        name : x4,
+                        type : uint64_t
+                },
+                {
+                        name : x5,
+                        type : uint64_t
+                },
+                {
+                        name : x6,
+                        type : uint64_t
+                },
+                {
+                        name : x7,
+                        type : uint64_t
+                },
+                {
+                        name : x8,
+                        type : uint64_t
+                },
+                {
+                        name : x9,
+                        type : uint64_t
+                },
+                {
+                        name : x10,
+                        type : uint64_t
+                },
+                {
+                        name : x11,
+                        type : uint64_t
+                },
+                {
+                        name : x12,
+                        type : uint64_t
+                },
+                {
+                        name : x13,
+                        type : uint64_t
+                },
+                {
+                        name : x14,
+                        type : uint64_t
+                },
+                {
+                        name : x15,
+                        type : uint64_t
+                },
+                {
+                        name : x16,
+                        type : uint64_t
+                },
+                {
+                        name : x17,
+                        type : uint64_t
+                },
+                {
+                        name : x18,
+                        type : uint64_t
+                },
+                {
+                        name : x19,
+                        type : uint64_t
+                },
+                {
+                        name : x20,
+                        type : uint64_t
+                },
+                {
+                        name : x21,
+                        type : uint64_t
+                },
+                {
+                        name : x22,
+                        type : uint64_t
+                },
+                {
+                        name : x23,
+                        type : uint64_t
+                },
+                {
+                        name : x24,
+                        type : uint64_t
+                },
+                {
+                        name : x25,
+                        type : uint64_t
+                },
+                {
+                        name : x26,
+                        type : uint64_t
+                },
+                {
+                        name : x27,
+                        type : uint64_t
+                },
+                {
+                        name : x28,
+                        type : uint64_t
+                },
+                {
+                        name : x29,
+                        type : uint64_t
+                },
+                {
+                        name : x30,
+                        type : uint64_t
+                },
+                {
+                        name : x31,
+                        type : uint64_t
+                },
+                {
+                        name : pc,
+                        type : uint64_t
+                },
+        ]
+}
Index: kernel/arch/riscv64/include/arch/mm/as.h
===================================================================
--- kernel/arch/riscv64/include/arch/mm/as.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/mm/as.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_AS_H_
+#define KERN_riscv64_AS_H_
+
+#define ADDRESS_SPACE_HOLE_START  UINT64_C(0x0000800000000000)
+#define ADDRESS_SPACE_HOLE_END    UINT64_C(0xffff7fffffffffff)
+
+#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
+
+#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT64_C(0xffff800000000000)
+#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT64_C(0xffffffffffffffff)
+#define USER_ADDRESS_SPACE_START_ARCH    UINT64_C(0x0000000000000000)
+#define USER_ADDRESS_SPACE_END_ARCH      UINT64_C(0x00007fffffffffff)
+
+typedef struct {
+} as_arch_t;
+
+#include <genarch/mm/as_pt.h>
+
+#define as_constructor_arch(as, flags)  (as != as)
+#define as_destructor_arch(as)          (as != as)
+#define as_create_arch(as, flags)       (as != as)
+#define as_deinstall_arch(as)
+#define as_invalidate_translation_cache(as, page, cnt)
+
+extern void as_arch_init(void);
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/mm/asid.h
===================================================================
--- kernel/arch/riscv64/include/arch/mm/asid.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/mm/asid.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_ASID_H_
+#define KERN_riscv64_ASID_H_
+
+#include <typedefs.h>
+
+#define ASID_MAX_ARCH  4096
+
+typedef uint32_t asid_t;
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/mm/frame.h
===================================================================
--- kernel/arch/riscv64/include/arch/mm/frame.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/mm/frame.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2016 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_FRAME_H_
+#define KERN_riscv64_FRAME_H_
+
+#define FRAME_WIDTH  12  /* 4 KiB */
+#define FRAME_SIZE   (1 << FRAME_WIDTH)
+
+#define FRAME_LOWPRIO  0
+
+#ifndef __ASM__
+
+#include <typedefs.h>
+
+extern void frame_low_arch_init(void);
+extern void frame_high_arch_init(void);
+extern void physmem_print(void);
+
+#endif /* __ASM__ */
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/mm/km.h
===================================================================
--- kernel/arch/riscv64/include/arch/mm/km.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/mm/km.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_KM_H_
+#define KERN_riscv64_KM_H_
+
+#include <typedefs.h>
+
+extern void km_identity_arch_init(void);
+extern void km_non_identity_arch_init(void);
+extern bool km_is_non_identity_arch(uintptr_t);
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/mm/page.h
===================================================================
--- kernel/arch/riscv64/include/arch/mm/page.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/mm/page.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,272 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_PAGE_H_
+#define KERN_riscv64_PAGE_H_
+
+#include <arch/mm/frame.h>
+
+#define PAGE_WIDTH  FRAME_WIDTH
+#define PAGE_SIZE   FRAME_SIZE
+
+#ifndef __ASM__
+	#define KA2PA(x)  (((uintptr_t) (x)) - UINT64_C(0xffff800000000000))
+	#define PA2KA(x)  (((uintptr_t) (x)) + UINT64_C(0xffff800000000000))
+#else
+	#define KA2PA(x)  ((x) - 0xffff800000000000)
+	#define PA2KA(x)  ((x) + 0xffff800000000000)
+#endif
+
+/*
+ * Page table entry types.
+ *
+ * - PTE_TYPE_PTR:         pointer to next level PTE
+ * - PTE_TYPE_PTR_GLOBAL:  pointer to next level PTE (global mapping)
+ *
+ * - PTE_TYPE_SRURX:       kernel read, user read execute
+ * - PTE_TYPE_SRWURWX:     kernel read write, user read write execute
+ * - PTE_TYPE_SRUR:        kernel read, user read
+ * - PTE_TYPE_SRWURW:      kernel read write, user read write
+ * - PTE_TYPE_SRXURX:      kernel read execute, user read execute
+ * - PTE_TYPE_SRWXURWX:    kernel read write execute, user read write execute
+ *
+ * - PTE_TYPE_SR:          kernel read
+ * - PTE_TYPE_SRW:         kernel read write
+ * - PTE_TYPE_SRX:         kernel read execute
+ * - PTE_TYPE_SRWX:        kernel read write execute
+ *
+ * - PTE_TYPE_SR_GLOBAL:   kernel read (global mapping)
+ * - PTE_TYPE_SRW_GLOBAL:  kernel read write (global mapping)
+ * - PTE_TYPE_SRX_GLOBAL:  kernel read execute (global mapping)
+ * - PTE_TYPE_SRWX_GLOBAL: kernel read write execute (global mapping)
+ */
+
+#define PTE_TYPE_PTR          0
+#define PTE_TYPE_PTR_GLOBAL   1
+
+#define PTE_TYPE_SRURX        2
+#define PTE_TYPE_SRWURWX      3
+#define PTE_TYPE_SRUR         4
+#define PTE_TYPE_SRWURW       5
+#define PTE_TYPE_SRXURX       6
+#define PTE_TYPE_SRWXURWX     7
+
+#define PTE_TYPE_SR           8
+#define PTE_TYPE_SRW          9
+#define PTE_TYPE_SRX          10
+#define PTE_TYPE_SRWX         11
+
+#define PTE_TYPE_SR_GLOBAL    12
+#define PTE_TYPE_SRW_GLOBAL   13
+#define PTE_TYPE_SRX_GLOBAL   14
+#define PTE_TYPE_SRWX_GLOBAL  15
+
+/*
+ * Implementation of 4-level page table interface.
+ *
+ * Page table layout:
+ * - 64-bit virtual addressess
+ *   (the virtual address space is 2^48 bytes in size
+ *   with a hole in the middle)
+ * - Offset is 12 bits => pages are 4 KiB long
+ * - PTL0 has 512 entries (9 bits)
+ * - PTL1 has 512 entries (9 bits)
+ * - PTL2 has 512 entries (9 bits)
+ * - PLT3 has 512 entries (9 bits)
+ */
+
+/* Number of entries in each level. */
+#define PTL0_ENTRIES_ARCH  512
+#define PTL1_ENTRIES_ARCH  512
+#define PTL2_ENTRIES_ARCH  512
+#define PTL3_ENTRIES_ARCH  512
+
+/* Page table sizes for each level. */
+#define PTL0_FRAMES_ARCH  1
+#define PTL1_FRAMES_ARCH  1
+#define PTL2_FRAMES_ARCH  1
+#define PTL3_FRAMES_ARCH  1
+
+/* Macros calculating indices into page tables on each level. */
+#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 39) & 0x1ff)
+#define PTL1_INDEX_ARCH(vaddr)  (((vaddr) >> 30) & 0x1ff)
+#define PTL2_INDEX_ARCH(vaddr)  (((vaddr) >> 21) & 0x1ff)
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ff)
+
+/* Get PTE address accessors for each level. */
+#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
+	(((pte_t *) (ptl0))[(i)].pfn << 12)
+
+#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
+	(((pte_t *) (ptl1))[(i)].pfn << 12)
+
+#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
+	(((pte_t *) (ptl2))[(i)].pfn << 12)
+
+#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
+	(((pte_t *) (ptl3))[(i)].pfn << 12)
+
+/* Set PTE address accessors for each level. */
+#define SET_PTL0_ADDRESS_ARCH(ptl0)
+
+#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
+	(((pte_t *) (ptl0))[(i)].pfn = (a) >> 12)
+
+#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) \
+	(((pte_t *) (ptl1))[(i)].pfn = (a) >> 12)
+
+#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) \
+	(((pte_t *) (ptl2))[(i)].pfn = (a) >> 12)
+
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
+	(((pte_t *) (ptl3))[(i)].pfn = (a) >> 12)
+
+/* Get PTE flags accessors for each level. */
+#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
+	get_pt_flags((pte_t *) (ptl0), (size_t) (i))
+
+#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
+	get_pt_flags((pte_t *) (ptl1), (size_t) (i))
+
+#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
+	get_pt_flags((pte_t *) (ptl2), (size_t) (i))
+
+#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
+	get_pt_flags((pte_t *) (ptl3), (size_t) (i))
+
+/* Set PTE flags accessors for each level. */
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
+	set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
+
+#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) \
+	set_pt_flags((pte_t *) (ptl1), (size_t) (i), (x))
+
+#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) \
+	set_pt_flags((pte_t *) (ptl2), (size_t) (i), (x))
+
+#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
+	set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x))
+
+/* Set PTE present accessors for each level. */
+#define SET_PTL1_PRESENT_ARCH(ptl0, i) \
+	set_pt_present((pte_t *) (ptl0), (size_t) (i))
+
+#define SET_PTL2_PRESENT_ARCH(ptl1, i) \
+	set_pt_present((pte_t *) (ptl1), (size_t) (i))
+
+#define SET_PTL3_PRESENT_ARCH(ptl2, i) \
+	set_pt_present((pte_t *) (ptl2), (size_t) (i))
+
+#define SET_FRAME_PRESENT_ARCH(ptl3, i) \
+	set_pt_present((pte_t *) (ptl3), (size_t) (i))
+
+/* Macros for querying the last-level PTEs. */
+#define PTE_VALID_ARCH(pte)       ((pte)->valid != 0)
+#define PTE_PRESENT_ARCH(pte)     ((pte)->valid != 0)
+#define PTE_GET_FRAME_ARCH(pte)   ((uintptr_t) (pte)->pfn << 12)
+
+#define PTE_WRITABLE_ARCH(pte) \
+	(((pte)->type == PTE_TYPE_SRWURWX) || \
+	((pte)->type == PTE_TYPE_SRWURW) || \
+	((pte)->type == PTE_TYPE_SRWXURWX))
+
+#define PTE_EXECUTABLE_ARCH(pte) \
+	(((pte)->type == PTE_TYPE_SRURX) || \
+	((pte)->type == PTE_TYPE_SRWURWX) || \
+	((pte)->type == PTE_TYPE_SRXURX) || \
+	((pte)->type == PTE_TYPE_SRWXURWX))
+
+#ifndef __ASM__
+
+#include <mm/mm.h>
+#include <arch/interrupt.h>
+#include <typedefs.h>
+
+/** Page Table Entry. */
+typedef struct {
+	unsigned long valid : 1;       /**< Valid bit. */
+	unsigned long type : 4;        /**< Entry type. */
+	unsigned long referenced : 1;  /**< Refenced bit. */
+	unsigned long dirty : 1;       /**< Dirty bit. */
+	unsigned long reserved : 3;    /**< Reserved bits. */
+	unsigned long pfn : 54;        /**< Physical frame number. */
+} pte_t;
+
+NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
+{
+	pte_t *entry = &pt[i];
+	
+	return (((!entry->valid) << PAGE_PRESENT_SHIFT) |
+	    ((entry->type < PTE_TYPE_SR) << PAGE_USER_SHIFT) |
+	    PAGE_READ |
+	    (PTE_WRITABLE_ARCH(entry) << PAGE_WRITE_SHIFT) |
+	    (PTE_EXECUTABLE_ARCH(entry) << PAGE_EXEC_SHIFT) |
+	    ((entry->type >= PTE_TYPE_SR_GLOBAL) << PAGE_GLOBAL_SHIFT));
+}
+
+NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
+{
+	pte_t *entry = &pt[i];
+	
+	entry->valid = !(flags & PAGE_NOT_PRESENT);
+	
+	if ((flags & PAGE_WRITE) != 0) {
+		if ((flags & PAGE_EXEC) != 0)
+			entry->type = PTE_TYPE_SRWXURWX;
+		else
+			entry->type = PTE_TYPE_SRWURW;
+	} else {
+		if ((flags & PAGE_EXEC) != 0)
+			entry->type = PTE_TYPE_SRXURX;
+		else
+			entry->type = PTE_TYPE_SRUR;
+	}
+}
+
+NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i)
+{
+	pte_t *entry = &pt[i];
+
+	entry->valid = 1;
+}
+
+extern void page_arch_init(void);
+extern void page_fault(unsigned int, istate_t *);
+
+#endif /* __ASM__ */
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/mm/tlb.h
===================================================================
--- kernel/arch/riscv64/include/arch/mm/tlb.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/mm/tlb.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_TLB_H_
+#define KERN_riscv64_TLB_H_
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/proc/task.h
===================================================================
--- kernel/arch/riscv64/include/arch/proc/task.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/proc/task.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64proc
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_TASK_H_
+#define KERN_riscv64_TASK_H_
+
+#include <typedefs.h>
+
+typedef struct {
+} task_arch_t;
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/proc/thread.h
===================================================================
--- kernel/arch/riscv64/include/arch/proc/thread.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/proc/thread.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64proc
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_THREAD_H_
+#define KERN_riscv64_THREAD_H_
+
+typedef struct {
+} thread_arch_t;
+
+#define thr_constructor_arch(thread)
+#define thr_destructor_arch(thread)
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/stack.h
===================================================================
--- kernel/arch/riscv64/include/arch/stack.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/stack.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_STACK_H_
+#define KERN_riscv64_STACK_H_
+
+#include <config.h>
+
+#define MEM_STACK_SIZE  STACK_SIZE
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/include/arch/types.h
===================================================================
--- kernel/arch/riscv64/include/arch/types.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/include/arch/types.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_riscv64_TYPES_H_
+#define KERN_riscv64_TYPES_H_
+
+typedef uint64_t size_t;
+typedef int64_t ssize_t;
+
+typedef uint64_t uintptr_t;
+typedef uint64_t pfn_t;
+
+typedef uint64_t ipl_t;
+
+typedef uint64_t sysarg_t;
+typedef int64_t native_t;
+typedef uint64_t atomic_count_t;
+
+typedef struct {
+} fncptr_t;
+
+#define INTN_C(c)   INT64_C(c)
+#define UINTN_C(c)  UINT64_C(c)
+
+#define PRIdn  PRId64  /**< Format for native_t. */
+#define PRIun  PRIu64  /**< Format for sysarg_t. */
+#define PRIxn  PRIx64  /**< Format for hexadecimal sysarg_t. */
+#define PRIua  PRIu64  /**< Format for atomic_count_t. */
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/asm.S
===================================================================
--- kernel/arch/riscv64/src/asm.S	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/asm.S	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <abi/asmtool.h>
+
+.text
+
+SYMBOL(kernel_image_start)
+	// FIXME
+	nop
Index: kernel/arch/riscv64/src/cpu/cpu.c
===================================================================
--- kernel/arch/riscv64/src/cpu/cpu.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/cpu/cpu.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#include <arch/cpu.h>
+#include <cpu.h>
+#include <arch.h>
+#include <typedefs.h>
+#include <print.h>
+#include <fpu_context.h>
+
+
+void fpu_disable(void)
+{
+}
+
+void fpu_enable(void)
+{
+}
+
+void cpu_arch_init(void)
+{
+}
+
+void cpu_identify(void)
+{
+}
+
+void cpu_print_report(cpu_t* cpu)
+{
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/debug/stacktrace.c
===================================================================
--- kernel/arch/riscv64/src/debug/stacktrace.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/debug/stacktrace.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#include <stacktrace.h>
+#include <syscall/copy.h>
+#include <typedefs.h>
+
+bool kernel_stack_trace_context_validate(stack_trace_context_t *ctx)
+{
+	return true;
+}
+
+bool kernel_frame_pointer_prev(stack_trace_context_t *ctx, uintptr_t *prev)
+{
+	return true;
+}
+
+bool kernel_return_address_get(stack_trace_context_t *ctx, uintptr_t *ra)
+{
+	return true;
+}
+
+bool uspace_stack_trace_context_validate(stack_trace_context_t *ctx)
+{
+	return true;
+}
+
+bool uspace_frame_pointer_prev(stack_trace_context_t *ctx, uintptr_t *prev)
+{
+	return true;
+}
+
+bool uspace_return_address_get(stack_trace_context_t *ctx, uintptr_t *ra)
+{
+	return true;
+}
+
+uintptr_t frame_pointer_get(void)
+{
+	return 0;
+}
+
+uintptr_t program_counter_get(void)
+{
+	return 0;
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/mm/as.c
===================================================================
--- kernel/arch/riscv64/src/mm/as.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/mm/as.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+
+#include <mm/as.h>
+#include <arch/mm/as.h>
+#include <genarch/mm/page_pt.h>
+
+void as_arch_init(void)
+{
+	as_operations = &as_pt_operations;
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/mm/frame.c
===================================================================
--- kernel/arch/riscv64/src/mm/frame.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/mm/frame.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+
+#include <mm/frame.h>
+#include <arch/mm/frame.h>
+#include <mm/as.h>
+#include <config.h>
+#include <panic.h>
+#include <debug.h>
+#include <align.h>
+#include <macros.h>
+
+#include <print.h>
+
+size_t hardcoded_unmapped_ktext_size = 0;
+size_t hardcoded_unmapped_kdata_size = 0;
+
+void physmem_print(void)
+{
+}
+
+
+void frame_low_arch_init(void)
+{
+}
+
+void frame_high_arch_init(void)
+{
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/mm/km.c
===================================================================
--- kernel/arch/riscv64/src/mm/km.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/mm/km.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+
+#include <arch/mm/km.h>
+#include <typedefs.h>
+
+void km_identity_arch_init(void)
+{
+}
+
+void km_non_identity_arch_init(void)
+{
+}
+
+bool km_is_non_identity_arch(uintptr_t addr)
+{
+	return false;
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/mm/page.c
===================================================================
--- kernel/arch/riscv64/src/mm/page.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/mm/page.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+/** @file
+ */
+
+#include <arch/mm/page.h>
+#include <genarch/mm/page_pt.h>
+#include <arch/mm/frame.h>
+#include <mm/frame.h>
+#include <mm/page.h>
+#include <mm/as.h>
+#include <typedefs.h>
+#include <align.h>
+#include <config.h>
+#include <func.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+#include <debug.h>
+#include <memstr.h>
+#include <print.h>
+#include <interrupt.h>
+
+void page_arch_init(void)
+{
+	if (config.cpu_active == 1)
+		page_mapping_operations = &pt_mapping_operations;
+}
+
+void page_fault(unsigned int n __attribute__((unused)), istate_t *istate)
+{
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/mm/tlb.c
===================================================================
--- kernel/arch/riscv64/src/mm/tlb.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/mm/tlb.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64mm
+ * @{
+ */
+
+#include <mm/tlb.h>
+#include <arch/mm/asid.h>
+#include <arch/asm.h>
+#include <typedefs.h>
+
+void tlb_invalidate_all(void)
+{
+}
+
+void tlb_invalidate_asid(asid_t asid __attribute__((unused)))
+{
+	tlb_invalidate_all();
+}
+
+void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, size_t cnt)
+{
+	tlb_invalidate_all();
+}
+
+void tlb_arch_init(void)
+{
+}
+
+void tlb_print(void)
+{
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/proc/scheduler.c
===================================================================
--- kernel/arch/riscv64/src/proc/scheduler.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/proc/scheduler.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64proc
+ * @{
+ */
+/** @file
+ */
+
+#include <proc/scheduler.h>
+
+void before_task_runs_arch(void)
+{
+}
+
+void before_thread_runs_arch(void)
+{
+}
+
+void after_thread_ran_arch(void)
+{
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/proc/task.c
===================================================================
--- kernel/arch/riscv64/src/proc/task.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/proc/task.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64proc
+ * @{
+ */
+/** @file
+ */
+
+#include <proc/task.h>
+
+void task_create_arch(task_t *t)
+{
+}
+
+void task_destroy_arch(task_t *t)
+{
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/proc/thread.c
===================================================================
--- kernel/arch/riscv64/src/proc/thread.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/proc/thread.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64proc
+ * @{
+ */
+/** @file
+ */
+
+#include <proc/thread.h>
+
+void thread_create_arch(thread_t *t)
+{
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/riscv64.c
===================================================================
--- kernel/arch/riscv64/src/riscv64.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/riscv64.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#include <arch.h>
+#include <typedefs.h>
+#include <arch/interrupt.h>
+#include <arch/asm.h>
+
+#include <func.h>
+#include <config.h>
+#include <errno.h>
+#include <context.h>
+#include <fpu_context.h>
+#include <interrupt.h>
+#include <syscall/copy.h>
+#include <ddi/irq.h>
+#include <proc/thread.h>
+#include <console/console.h>
+#include <memstr.h>
+
+char memcpy_from_uspace_failover_address;
+char memcpy_to_uspace_failover_address;
+
+arch_ops_t riscv64_ops = {
+};
+
+arch_ops_t *arch_ops = &riscv64_ops;
+
+void calibrate_delay_loop(void)
+{
+}
+
+/** Construct function pointer
+ *
+ * @param fptr   function pointer structure
+ * @param addr   function address
+ * @param caller calling function address
+ *
+ * @return address of the function pointer
+ *
+ */
+void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
+{
+	return addr;
+}
+
+void arch_reboot(void)
+{
+}
+
+void irq_initialize_arch(irq_t *irq)
+{
+	(void) irq;
+}
+
+void istate_decode(istate_t *istate)
+{
+	(void) istate;
+}
+
+int context_save_arch(context_t *ctx)
+{
+	return 1;
+}
+
+void context_restore_arch(context_t *ctx)
+{
+	while (true);
+}
+
+void fpu_init(void)
+{
+}
+
+void fpu_context_save(fpu_context_t *ctx)
+{
+}
+
+void fpu_context_restore(fpu_context_t *ctx)
+{
+}
+
+int memcpy_from_uspace(void *dst, const void *uspace_src, size_t size)
+{
+	return EOK;
+}
+
+int memcpy_to_uspace(void *uspace_dst, const void *src, size_t size)
+{
+	return EOK;
+}
+
+void early_putchar(wchar_t ch)
+{
+}
+
+/** @}
+ */
Index: kernel/arch/riscv64/src/userspace.c
===================================================================
--- kernel/arch/riscv64/src/userspace.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ kernel/arch/riscv64/src/userspace.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup riscv64
+ * @{
+ */
+/** @file
+ */
+
+#include <userspace.h>
+#include <typedefs.h>
+#include <arch.h>
+#include <abi/proc/uarg.h>
+#include <mm/as.h>
+
+void userspace(uspace_arg_t *kernel_uarg)
+{
+	// FIXME
+	while (true);
+}
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/Makefile.inc
===================================================================
--- uspace/lib/c/arch/riscv64/Makefile.inc	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/Makefile.inc	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,42 @@
+#
+# Copyright (c) 2016 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+ARCH_SOURCES = \
+	arch/$(UARCH)/src/entry.c \
+	arch/$(UARCH)/src/entryjmp.c \
+	arch/$(UARCH)/src/thread_entry.c \
+	arch/$(UARCH)/src/fibril.c \
+	arch/$(UARCH)/src/tls.c \
+	arch/$(UARCH)/src/syscall.c \
+	arch/$(UARCH)/src/stacktrace.c
+
+ARCH_AUTOGENS_AG = \
+	arch/$(UARCH)/include/libarch/istate_struct.ag \
+	arch/$(UARCH)/include/libarch/fibril_context.ag
+
+.PRECIOUS: arch/$(UARCH)/src/entry.o
Index: uspace/lib/c/arch/riscv64/_link.ld.in
===================================================================
--- uspace/lib/c/arch/riscv64/_link.ld.in	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/_link.ld.in	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,80 @@
+STARTUP(LIBC_PATH/arch/UARCH/src/entry.o)
+ENTRY(__entry)
+
+PHDRS {
+#ifdef LOADER
+	interp PT_INTERP;
+	text PT_LOAD FILEHDR PHDRS FLAGS(5);
+#else
+	text PT_LOAD FLAGS(5);
+#endif
+	data PT_LOAD FLAGS(6);
+	debug PT_NOTE;
+}
+
+SECTIONS {
+#ifdef LOADER
+	. = 0x70001000 + SIZEOF_HEADERS;
+#else
+	. = 0x1000 + SIZEOF_HEADERS;
+#endif
+	
+	.text : {
+		*(.text .text.*);
+		*(.rodata .rodata.*);
+		*(.srodata .srodata.*);
+	} :text
+	
+#ifdef LOADER
+	.interp : {
+		*(.interp);
+	} :interp :text
+#endif
+	
+	. = . + 0x1000;
+	
+	.data : {
+		*(.data);
+		*(.sdata);
+		*(.data.rel*);
+	} :data
+	
+	.tdata : {
+		_tdata_start = .;
+		*(.tdata);
+		*(.gnu.linkonce.tb.*);
+		_tdata_end = .;
+		_tbss_start = .;
+		*(.tbss);
+		_tbss_end = .;
+	} :data
+	
+	_tls_alignment = ALIGNOF(.tdata);
+	
+	.sbss : {
+		*(.scommon);
+		*(.sbss);
+	}
+	
+	.bss : {
+		*(COMMON);
+		*(.bss);
+	} :data
+	
+#ifdef CONFIG_LINE_DEBUG
+	.comment 0 : { *(.comment); } :debug
+	.debug_abbrev 0 : { *(.debug_abbrev); } :debug
+	.debug_aranges 0 : { *(.debug_aranges); } :debug
+	.debug_info 0 : { *(.debug_info); } :debug
+	.debug_line 0 : { *(.debug_line); } :debug
+	.debug_loc 0 : { *(.debug_loc); } :debug
+	.debug_pubnames 0 : { *(.debug_pubnames); } :debug
+	.debug_pubtypes 0 : { *(.debug_pubtypes); } :debug
+	.debug_ranges 0 : { *(.debug_ranges); } :debug
+	.debug_str 0 : { *(.debug_str); } :debug
+#endif
+	
+	/DISCARD/ : {
+		*(*);
+	}
+}
Index: uspace/lib/c/arch/riscv64/include/libarch/atomic.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/atomic.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/atomic.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libcriscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef LIBC_riscv64_ATOMIC_H_
+#define LIBC_riscv64_ATOMIC_H_
+
+#include <stdbool.h>
+
+#define LIBC_ARCH_ATOMIC_H_
+#define CAS
+
+#include <atomicdflt.h>
+
+// FIXME
+
+static inline bool cas(atomic_t *val, atomic_count_t ov, atomic_count_t nv)
+{
+	if (val->count == ov) {
+		val->count = nv;
+		return true;
+	}
+	
+	return false;
+}
+
+static inline void atomic_inc(atomic_t *val)
+{
+	/* On real hardware the increment has to be done
+	   as an atomic action. */
+	
+	val->count++;
+}
+
+static inline void atomic_dec(atomic_t *val)
+{
+	/* On real hardware the decrement has to be done
+	   as an atomic action. */
+	
+	val->count++;
+}
+
+static inline atomic_count_t atomic_postinc(atomic_t *val)
+{
+	/* On real hardware both the storing of the previous
+	   value and the increment have to be done as a single
+	   atomic action. */
+	
+	atomic_count_t prev = val->count;
+	
+	val->count++;
+	return prev;
+}
+
+static inline atomic_count_t atomic_postdec(atomic_t *val)
+{
+	/* On real hardware both the storing of the previous
+	   value and the decrement have to be done as a single
+	   atomic action. */
+	
+	atomic_count_t prev = val->count;
+	
+	val->count--;
+	return prev;
+}
+
+#define atomic_preinc(val) (atomic_postinc(val) + 1)
+#define atomic_predec(val) (atomic_postdec(val) - 1)
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/barrier.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/barrier.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/barrier.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,1 @@
+../../../../../../../kernel/arch/riscv64/include/arch/barrier.h
Index: uspace/lib/c/arch/riscv64/include/libarch/ddi.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/ddi.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/ddi.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @file
+ */
+
+#ifndef LIBC_riscv64_DDI_H_
+#define LIBC_riscv64_DDI_H_
+
+#include <sys/types.h>
+#include <libarch/types.h>
+
+static inline void arch_pio_write_8(ioport8_t *port, uint8_t v)
+{
+	*port = v;
+}
+
+static inline void arch_pio_write_16(ioport16_t *port, uint16_t v)
+{
+	*port = v;
+}
+
+static inline void arch_pio_write_32(ioport32_t *port, uint32_t v)
+{
+	*port = v;
+}
+
+static inline uint8_t arch_pio_read_8(const ioport8_t *port)
+{
+	return *port;
+}
+
+static inline uint16_t arch_pio_read_16(const ioport16_t *port)
+{
+	return *port;
+}
+
+static inline uint32_t arch_pio_read_32(const ioport32_t *port)
+{
+	return *port;
+}
+
+#endif
Index: uspace/lib/c/arch/riscv64/include/libarch/elf.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/elf.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/elf.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,1 @@
+../../../../../../../kernel/arch/riscv64/include/arch/elf.h
Index: uspace/lib/c/arch/riscv64/include/libarch/elf_linux.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/elf_linux.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/elf_linux.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libcriscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef LIBC_riscv64_ELF_LINUX_H_
+#define LBIC_riscv64_ELF_LINUX_H_
+
+#include <libarch/istate.h>
+#include <sys/types.h>
+
+typedef struct {
+} elf_regs_t;
+
+static inline void istate_to_elf_regs(istate_t *istate, elf_regs_t *elf_regs)
+{
+	(void) istate;
+	(void) elf_regs;
+}
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/entry.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/entry.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/entry.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libc
+ * @{
+ */
+/**
+ * @file
+ */
+
+#ifndef LIBC_riscv64_ENTRY_H_
+#define LIBC_riscv64_ENTRY_H_
+
+extern void __entry(void);
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/faddr.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/faddr.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/faddr.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libriscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef LIBC_riscv64_FADDR_H_
+#define LIBC_riscv64_FADDR_H_
+
+#include <libarch/types.h>
+
+#define FADDR(fptr)  ((uintptr_t) (fptr))
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/fibril.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/fibril.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/fibril.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libcriscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef LIBC_riscv64_FIBRIL_H_
+#define LIBC_riscv64_FIBRIL_H_
+
+#include <sys/types.h>
+
+#define SP_DELTA  0
+
+#define context_set(ctx, _pc, stack, size, ptls) \
+	do { \
+		(ctx)->pc = (uintptr_t) (_pc); \
+		(ctx)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \
+		(ctx)->fp = 0; \
+		(ctx)->tls = ((uintptr_t) (ptls)) + sizeof(tcb_t); \
+	} while (0)
+
+/*
+ * This stores the registers which need to be
+ * preserved across function calls.
+ */
+typedef struct {
+	uintptr_t sp;
+	uintptr_t fp;
+	uintptr_t pc;
+	uintptr_t tls;
+} context_t;
+
+static inline uintptr_t context_get_fp(context_t *ctx)
+{
+	/* This function returns the frame pointer. */
+	return ctx->fp;
+}
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/fibril_context.ag
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/fibril_context.ag	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/fibril_context.ag	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,179 @@
+#
+# Copyright (c) 2016 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+{
+        name : context,
+
+        includes : [
+                {
+                        include : <sys/types.h>
+                }
+        ],
+
+        members : [
+                #
+                # There is a room for optimization (we can store just those
+                # registers that must be preserved during ABI function call).
+                #
+
+                {
+                        name : sp,
+                        type : uint64_t
+                },
+                {
+                        name : pc,
+                        type : uint64_t
+                },
+
+                {
+                        name : zero,
+                        type : uint64_t
+                },
+                {
+                        name : ra,
+                        type : uint64_t
+                },
+
+                {
+                        name : x3,
+                        type : uint64_t
+                },
+                {
+                        name : x4,
+                        type : uint64_t
+                },
+                {
+                        name : x5,
+                        type : uint64_t
+                },
+                {
+                        name : x6,
+                        type : uint64_t
+                },
+                {
+                        name : x7,
+                        type : uint64_t
+                },
+                {
+                        name : x8,
+                        type : uint64_t
+                },
+                {
+                        name : x9,
+                        type : uint64_t
+                },
+                {
+                        name : x10,
+                        type : uint64_t
+                },
+                {
+                        name : x11,
+                        type : uint64_t
+                },
+                {
+                        name : x12,
+                        type : uint64_t
+                },
+                {
+                        name : x13,
+                        type : uint64_t
+                },
+                {
+                        name : x14,
+                        type : uint64_t
+                },
+                {
+                        name : x15,
+                        type : uint64_t
+                },
+                {
+                        name : x16,
+                        type : uint64_t
+                },
+                {
+                        name : x17,
+                        type : uint64_t
+                },
+                {
+                        name : x18,
+                        type : uint64_t
+                },
+                {
+                        name : x19,
+                        type : uint64_t
+                },
+                {
+                        name : x20,
+                        type : uint64_t
+                },
+                {
+                        name : x21,
+                        type : uint64_t
+                },
+                {
+                        name : x22,
+                        type : uint64_t
+                },
+                {
+                        name : x23,
+                        type : uint64_t
+                },
+                {
+                        name : x24,
+                        type : uint64_t
+                },
+                {
+                        name : x25,
+                        type : uint64_t
+                },
+                {
+                        name : x26,
+                        type : uint64_t
+                },
+                {
+                        name : x27,
+                        type : uint64_t
+                },
+                {
+                        name : x28,
+                        type : uint64_t
+                },
+                {
+                        name : x29,
+                        type : uint64_t
+                },
+                {
+                        name : x30,
+                        type : uint64_t
+                },
+                {
+                        name : x31,
+                        type : uint64_t
+                }
+        ]
+}
Index: uspace/lib/c/arch/riscv64/include/libarch/inttypes.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/inttypes.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/inttypes.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libcriscv64
+ * @{
+ */
+
+#ifndef LIBC_riscv64_INTTYPES_H_
+#define LIBC_riscv64_INTTYPES_H_
+
+#define PRIdn  PRId64  /**< Format for native_t. */
+#define PRIun  PRIu64  /**< Format for sysarg_t. */
+#define PRIxn  PRIx64  /**< Format for hexadecimal sysarg_t. */
+#define PRIua  PRIu64  /**< Format for atomic_count_t. */
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/istate.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/istate.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/istate.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,1 @@
+../../../../../../../kernel/arch/riscv64/include/arch/istate.h
Index: uspace/lib/c/arch/riscv64/include/libarch/istate_struct.ag
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/istate_struct.ag	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/istate_struct.ag	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,1 @@
+../../../../../../../kernel/arch/riscv64/include/arch/istate_struct.ag
Index: uspace/lib/c/arch/riscv64/include/libarch/stddef.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/stddef.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/stddef.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libcabs32
+ * @{
+ */
+/** @file
+ */
+
+#ifndef LIBC_abs32_STDDEF_H_
+#define LIBC_abs32_STDDEF_H_
+
+#include <libarch/common.h>
+
+typedef uint64_t size_t;
+typedef int64_t ptrdiff_t;
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/stdint.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/stdint.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/stdint.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libcabs32
+ * @{
+ */
+/** @file
+ */
+
+#ifndef LIBC_abs32_STDINT_H_
+#define LIBC_abs32_STDINT_H_
+
+#include <libarch/common.h>
+
+#define SIZE_MAX UINT64_MAX
+
+#define UINTPTR_MAX UINT64_MAX
+typedef uint64_t uintptr_t;
+
+#define INTPTR_MIN INT64_MIN
+#define INTPTR_MAX INT64_MAX
+typedef int64_t intptr_t;
+
+#define UINTMAX_MAX UINT64_MAX
+typedef uint64_t uintmax_t;
+
+#define INTMAX_MAX INT64_MAX
+typedef int64_t intmax_t;
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/syscall.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/syscall.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/syscall.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libc
+ * @{
+ */
+/**
+ * @file
+ */
+
+#ifndef LIBC_riscv64_SYSCALL_H_
+#define LIBC_riscv64_SYSCALL_H_
+
+#include <sys/types.h>
+#include <abi/syscall.h>
+
+#define __syscall0  __syscall
+#define __syscall1  __syscall
+#define __syscall2  __syscall
+#define __syscall3  __syscall
+#define __syscall4  __syscall
+#define __syscall5  __syscall
+#define __syscall6  __syscall
+
+extern sysarg_t __syscall(const sysarg_t, const sysarg_t, const sysarg_t,
+    const sysarg_t, const sysarg_t, const sysarg_t, const syscall_t);
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/thread.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/thread.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/thread.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libcriscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef LIBC_riscv64_THREAD_H_
+#define LIBC_riscv64_THREAD_H_
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/tls.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/tls.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/tls.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libcriscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef LIBC_riscv64_TLS_H_
+#define LIBC_riscv64_TLS_H_
+
+#define CONFIG_TLS_VARIANT_2
+
+#include <libc.h>
+#include <unistd.h>
+
+typedef struct {
+	void *self;
+	void *fibril_data;
+} tcb_t;
+
+static inline void __tcb_set(tcb_t *tcb)
+{
+}
+
+static inline tcb_t *__tcb_get(void)
+{
+	return NULL;
+}
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/include/libarch/types.h
===================================================================
--- uspace/lib/c/arch/riscv64/include/libarch/types.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/include/libarch/types.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libcriscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef LIBC_riscv64_TYPES_H_
+#define LIBC_riscv64_TYPES_H_
+
+#include <libarch/common.h>
+#include <libarch/stddef.h>
+#include <libarch/stdint.h>
+
+#define __64_BITS__
+
+#define SSIZE_MIN  INT64_MIN
+#define SSIZE_MAX  INT64_MAX
+
+typedef uint64_t sysarg_t;
+typedef int64_t native_t;
+
+typedef int64_t ssize_t;
+
+typedef uint64_t atomic_count_t;
+typedef int64_t atomic_signed_t;
+
+#endif
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/src/entry.c
===================================================================
--- uspace/lib/c/arch/riscv64/src/entry.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/src/entry.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @file
+ */
+
+#include <unistd.h>
+#include <libarch/entry.h>
+#include "../../../generic/private/libc.h"
+
+void __entry(void)
+{
+	__main(NULL);
+}
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/src/entryjmp.c
===================================================================
--- uspace/lib/c/arch/riscv64/src/entryjmp.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/src/entryjmp.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @file
+ */
+
+#include <stdbool.h>
+#include <entry_point.h>
+
+/** Jump to program entry point. */
+void entry_point_jmp(void *entry_point, void *pcb)
+{
+	while (true);
+}
+
+/**
+ * @}
+ */
Index: uspace/lib/c/arch/riscv64/src/fibril.c
===================================================================
--- uspace/lib/c/arch/riscv64/src/fibril.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/src/fibril.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @file
+ */
+
+#include <fibril.h>
+#include <stdbool.h>
+
+int context_save(context_t *ctx)
+{
+	return 1;
+}
+
+void context_restore(context_t *ctx)
+{
+	while (true);
+}
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/src/stacktrace.c
===================================================================
--- uspace/lib/c/arch/riscv64/src/stacktrace.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/src/stacktrace.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @file
+ */
+
+#include <sys/types.h>
+#include <unistd.h>
+#include <stdbool.h>
+#include <stacktrace.h>
+
+bool stacktrace_fp_valid(stacktrace_t *st, uintptr_t fp)
+{
+	return true;
+}
+
+int stacktrace_fp_prev(stacktrace_t *st, uintptr_t fp, uintptr_t *prev)
+{
+	return 0;
+}
+
+int stacktrace_ra_get(stacktrace_t *st, uintptr_t fp, uintptr_t *ra)
+{
+	return 0;
+}
+
+void stacktrace_prepare(void)
+{
+}
+
+uintptr_t stacktrace_fp_get(void)
+{
+	return (uintptr_t) NULL;
+}
+
+uintptr_t stacktrace_pc_get(void)
+{
+	return (uintptr_t) NULL;
+}
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/src/syscall.c
===================================================================
--- uspace/lib/c/arch/riscv64/src/syscall.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/src/syscall.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @file
+ */
+
+#include <sys/types.h>
+#include <libarch/syscall.h>
+
+sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2,
+    const sysarg_t p3, const sysarg_t p4, const sysarg_t p5, const sysarg_t p6,
+    const syscall_t id)
+{
+	return 0;
+}
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/src/thread_entry.c
===================================================================
--- uspace/lib/c/arch/riscv64/src/thread_entry.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/src/thread_entry.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @file
+ */
+
+#include <unistd.h>
+#include "../../../generic/private/thread.h"
+
+void __thread_entry(void)
+{
+	__thread_main(NULL);
+}
+
+/** @}
+ */
Index: uspace/lib/c/arch/riscv64/src/tls.c
===================================================================
--- uspace/lib/c/arch/riscv64/src/tls.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/c/arch/riscv64/src/tls.c	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @file
+ */
+
+#include <tls.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+tcb_t *tls_alloc_arch(void **data, size_t size)
+{
+	return tls_alloc_variant_2(data, size);
+}
+
+void tls_free_arch(tcb_t *tcb, size_t size)
+{
+	tls_free_variant_2(tcb, size);
+}
+
+/** @}
+ */
Index: uspace/lib/math/arch/riscv64/Makefile.inc
===================================================================
--- uspace/lib/math/arch/riscv64/Makefile.inc	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/math/arch/riscv64/Makefile.inc	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,29 @@
+#
+# Copyright (c) 2016 Martin Decky
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+ARCH_SOURCES =
Index: uspace/lib/math/arch/riscv64/include/libarch/math.h
===================================================================
--- uspace/lib/math/arch/riscv64/include/libarch/math.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
+++ uspace/lib/math/arch/riscv64/include/libarch/math.h	(revision 2c2d54a73f8d98a509aa5049bb9ef840b9bb186c)
@@ -0,0 +1,526 @@
+/*
+ * Copyright (c) 2016 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup libmathriscv64
+ * @{
+ */
+/** @file
+ */
+
+#ifndef LIBMATH_riscv64_MATH_H_
+#define LIBMATH_riscv64_MATH_H_
+
+#include <acos.h>
+#include <asin.h>
+#include <atan.h>
+#include <atan2.h>
+#include <ceil.h>
+#include <cosh.h>
+#include <exp.h>
+#include <fabs.h>
+#include <floor.h>
+#include <fmod.h>
+#include <frexp.h>
+#include <ldexp.h>
+#include <log.h>
+#include <log10.h>
+#include <mathtypes.h>
+#include <modf.h>
+#include <pow.h>
+#include <sinh.h>
+#include <sqrt.h>
+#include <tan.h>
+#include <tanh.h>
+#include <trig.h>
+#include <trunc.h>
+
+#define HUGE_VAL FLOAT64_INF
+
+static inline float64_t acos_f64(float64_t val)
+{
+	return float64_acos(val);
+}
+
+static inline float32_t acos_f32(float32_t val)
+{
+	return float32_acos(val);
+}
+
+static inline float64_t asin_f64(float64_t val)
+{
+	return float64_asin(val);
+}
+
+static inline float32_t asin_f32(float32_t val)
+{
+	return float32_asin(val);
+}
+
+static inline float64_t atan_f64(float64_t val)
+{
+	return float64_atan(val);
+}
+
+static inline float32_t atan_f32(float32_t val)
+{
+	return float32_atan(val);
+}
+
+static inline float64_t atan2_f64(float64_t y, float64_t x)
+{
+	return float64_atan2(y, x);
+}
+
+static inline float32_t atan2_f32(float32_t y, float32_t x)
+{
+	return float32_atan2(y, x);
+}
+
+static inline float64_t ceil_f64(float64_t val)
+{
+	return float64_ceil(val);
+}
+
+static inline float32_t ceil_f32(float32_t val)
+{
+	return float32_ceil(val);
+}
+
+static inline float64_t cos_f64(float64_t val)
+{
+	return float64_cos(val);
+}
+
+static inline float32_t cos_f32(float32_t val)
+{
+	return float32_cos(val);
+}
+
+static inline float64_t cosh_f64(float64_t val)
+{
+	return float64_cosh(val);
+}
+
+static inline float32_t cosh_f32(float32_t val)
+{
+	return float32_cosh(val);
+}
+
+static inline float64_t exp_f64(float64_t val)
+{
+	return float64_exp(val);
+}
+
+static inline float32_t exp_f32(float32_t val)
+{
+	return float32_exp(val);
+}
+
+static inline float64_t fabs_f64(float64_t val)
+{
+	return float64_fabs(val);
+}
+
+static inline float32_t fabs_f32(float32_t val)
+{
+	return float32_fabs(val);
+}
+
+static inline float64_t floor_f64(float64_t val)
+{
+	return float64_floor(val);
+}
+
+static inline float32_t floor_f32(float32_t val)
+{
+	return float32_floor(val);
+}
+static inline float64_t fmod_f64(float64_t dividend, float64_t divisor)
+{
+	return float64_fmod(dividend, divisor);
+}
+
+static inline float64_t fmod_f32(float32_t dividend, float32_t divisor)
+{
+	return float32_fmod(dividend, divisor);
+}
+
+static inline float64_t frexp_f64(float64_t x, int *exp)
+{
+	return float64_frexp(x, exp);
+}
+
+static inline float64_t frexp_f32(float32_t x, int *exp)
+{
+	return float32_frexp(x, exp);
+}
+
+static inline float64_t ldexp_f64(float64_t x, int exp)
+{
+	return float64_ldexp(x, exp);
+}
+
+static inline float64_t ldexp_f32(float32_t x, int exp)
+{
+	return float32_ldexp(x, exp);
+}
+
+static inline float64_t log_f64(float64_t val)
+{
+	return float64_log(val);
+}
+
+static inline float32_t log_f32(float32_t val)
+{
+	return float32_log(val);
+}
+
+static inline float64_t log10_f64(float64_t val)
+{
+	return float64_log10(val);
+}
+
+static inline float32_t log10_f32(float32_t val)
+{
+	return float32_log10(val);
+}
+
+static inline float64_t modf_f64(float64_t value, float64_t *iptr)
+{
+	return float64_modf(value, iptr);
+}
+
+static inline float64_t modf_f32(float32_t value, float32_t *iptr)
+{
+	return float32_modf(value, iptr);
+}
+
+static inline float64_t pow_f64(float64_t x, float64_t y)
+{
+	return float64_pow(x, y);
+}
+
+static inline float32_t pow_f32(float32_t x, float32_t y)
+{
+	return float32_pow(x, y);
+}
+
+static inline float64_t sin_f64(float64_t val)
+{
+	return float64_sin(val);
+}
+
+static inline float32_t sin_f32(float32_t val)
+{
+	return float32_sin(val);
+}
+
+static inline float64_t sinh_f64(float64_t val)
+{
+	return float64_sinh(val);
+}
+
+static inline float32_t sinh_f32(float32_t val)
+{
+	return float32_sinh(val);
+}
+
+static inline float64_t sqrt_f64(float64_t val)
+{
+	return float64_sqrt(val);
+}
+
+static inline float32_t sqrt_f32(float32_t val)
+{
+	return float32_sqrt(val);
+}
+
+static inline float64_t tan_f64(float64_t val)
+{
+	return float64_tan(val);
+}
+
+static inline float32_t tan_f32(float32_t val)
+{
+	return float32_tan(val);
+}
+
+static inline float64_t tanh_f64(float64_t val)
+{
+	return float64_tanh(val);
+}
+
+static inline float32_t tanh_f32(float32_t val)
+{
+	return float32_tanh(val);
+}
+
+static inline float64_t trunc_f64(float64_t val)
+{
+	return float64_trunc(val);
+}
+
+static inline float32_t trunc_f32(float32_t val)
+{
+	return float32_trunc(val);
+}
+
+static inline float64_t acos(float64_t val)
+{
+	return acos_f64(val);
+}
+
+static inline float32_t acosf(float32_t val)
+{
+	return acos_f32(val);
+}
+
+static inline float64_t asin(float64_t val)
+{
+	return asin_f64(val);
+}
+
+static inline float32_t asinf(float32_t val)
+{
+	return asin_f32(val);
+}
+
+static inline float64_t atan(float64_t val)
+{
+	return atan_f64(val);
+}
+
+static inline float32_t atanf(float32_t val)
+{
+	return atan_f32(val);
+}
+
+static inline float64_t atan2(float64_t y, float64_t x)
+{
+	return atan2_f64(y, x);
+}
+
+static inline float32_t atan2f(float32_t y, float32_t x)
+{
+	return atan2_f32(y, x);
+}
+
+static inline float64_t ceil(float64_t val)
+{
+	return ceil_f64(val);
+}
+
+static inline float32_t ceilf(float32_t val)
+{
+	return ceil_f32(val);
+}
+
+static inline float64_t cos(float64_t val)
+{
+	return cos_f64(val);
+}
+
+static inline float32_t cosf(float32_t val)
+{
+	return cos_f32(val);
+}
+
+static inline float64_t cosh(float64_t val)
+{
+	return cosh_f64(val);
+}
+
+static inline float32_t coshf(float32_t val)
+{
+	return cosh_f32(val);
+}
+
+static inline float64_t exp(float64_t val)
+{
+	return exp_f64(val);
+}
+
+static inline float32_t expf(float32_t val)
+{
+	return exp_f32(val);
+}
+
+static inline float64_t fabs(float64_t val)
+{
+	return fabs_f64(val);
+}
+
+static inline float32_t fabsf(float32_t val)
+{
+	return fabs_f32(val);
+}
+
+static inline float64_t floor(float64_t val)
+{
+	return floor_f64(val);
+}
+
+static inline float32_t floorf(float32_t val)
+{
+	return floor_f32(val);
+}
+
+static inline float64_t fmod(float64_t dividend, float64_t divisor)
+{
+	return fmod_f64(dividend, divisor);
+}
+
+static inline float32_t fmodf(float32_t dividend, float32_t divisor)
+{
+	return fmod_f32(dividend, divisor);
+}
+
+static inline float64_t frexp(float64_t x, int *exp)
+{
+	return frexp_f64(x, exp);
+}
+
+static inline float32_t frexpf(float32_t x, int *exp)
+{
+	return frexp_f32(x, exp);
+}
+
+static inline float64_t ldexp(float64_t x, int exp)
+{
+	return ldexp_f64(x, exp);
+}
+
+static inline float32_t ldexpf(float32_t x, int exp)
+{
+	return ldexp_f32(x, exp);
+}
+
+static inline float64_t log(float64_t val)
+{
+	return log_f64(val);
+}
+
+static inline float32_t logf(float32_t val)
+{
+	return log_f32(val);
+}
+
+static inline float64_t log10(float64_t val)
+{
+	return log10_f64(val);
+}
+
+static inline float32_t log10f(float32_t val)
+{
+	return log10_f32(val);
+}
+
+static inline float64_t modf(float64_t value, float64_t *iptr)
+{
+	return modf_f64(value, iptr);
+}
+
+static inline float32_t modff(float32_t value, float32_t *iptr)
+{
+	return modf_f32(value, iptr);
+}
+
+static inline float64_t pow(float64_t x, float64_t y)
+{
+	return pow_f64(x, y);
+}
+
+static inline float32_t powf(float32_t x, float32_t y)
+{
+	return pow_f32(x, y);
+}
+
+static inline float64_t sin(float64_t val)
+{
+	return sin_f64(val);
+}
+
+static inline float32_t sinf(float32_t val)
+{
+	return sin_f32(val);
+}
+
+static inline float64_t sinh(float64_t val)
+{
+	return sinh_f64(val);
+}
+
+static inline float32_t sinhf(float32_t val)
+{
+	return sinh_f32(val);
+}
+
+static inline float64_t sqrt(float64_t val)
+{
+	return sqrt_f64(val);
+}
+
+static inline float32_t sqrtf(float32_t val)
+{
+	return sqrt_f32(val);
+}
+
+static inline float64_t tan(float64_t val)
+{
+	return tan_f64(val);
+}
+
+static inline float32_t tanf(float32_t val)
+{
+	return tan_f32(val);
+}
+
+static inline float64_t tanh(float64_t val)
+{
+	return tanh_f64(val);
+}
+
+static inline float32_t tanhf(float32_t val)
+{
+	return tanh_f32(val);
+}
+
+static inline float64_t trunc(float64_t val)
+{
+	return trunc_f64(val);
+}
+
+static inline float32_t truncf(float32_t val)
+{
+	return trunc_f32(val);
+}
+
+#endif
+
+/** @}
+ */
