Index: meson/arch/arm32/meson.build
===================================================================
--- meson/arch/arm32/meson.build	(revision cebd95675480e74dfb2dc07fda0cd4ac6e8caf3f)
+++ meson/arch/arm32/meson.build	(revision 2944b5a3877eb26bd1f747ad6f3445ef6774239d)
@@ -42,12 +42,14 @@
 ]
 
+arch_kernel_c_args = arch_uspace_c_args + [ '-mno-unaligned-access', '-mfpu=vfpv3' ]
+arch_kernel_c_args += cc.get_supported_arguments(['-mgeneral-regs-only' ])
+arch_kernel_link_args = [ '-nostdlib', '-Wl,-z,max-page-size=0x1000' ]
+
 if CONFIG_FPU
-	# This is necessary for kernel too, to allow vmsr insn and fpexc manipulation.
-	# Use vfp32 to allow context save/restore of d16-d31 regs.
-	arch_uspace_c_args += [ '-mfloat-abi=hard' ]
+    # Need to use softfp because our libgcc.a uses it too
+    # softfp - generate code with soft-float calling conventions but allow use
+    # of "hard" float instructions
+    arch_uspace_c_args += [ '-mfloat-abi=softfp' ]
 endif
-
-arch_kernel_c_args = arch_uspace_c_args + [ '-mno-unaligned-access', '-mfpu=vfpv3' ]
-arch_kernel_link_args = [ '-nostdlib', '-Wl,-z,max-page-size=0x1000' ]
 arch_uspace_link_args = [ '-nostdlib', '-lgcc', '-Wl,-z,max-page-size=0x1000' ]