Changes in / [e06ef614:28f4adb] in mainline
- Files:
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- 5 edited
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kernel/arch/amd64/src/asm.S (modified) (7 diffs)
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kernel/arch/amd64/src/boot/boot.S (modified) (1 diff)
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kernel/arch/amd64/src/context.S (modified) (2 diffs)
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uspace/lib/c/arch/amd64/src/entry.s (modified) (1 diff)
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uspace/lib/c/arch/amd64/src/fibril.S (modified) (2 diffs)
Legend:
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- Added
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kernel/arch/amd64/src/asm.S
re06ef614 r28f4adb 95 95 memcpy_from_uspace_failover_address: 96 96 memcpy_to_uspace_failover_address: 97 xor l %eax, %eax /* return 0, failure */97 xorq %rax, %rax /* return 0, failure */ 98 98 ret 99 99 … … 143 143 144 144 set_efer_flag: 145 mov l $0xc0000080, %ecx145 movq $0xc0000080, %rcx 146 146 rdmsr 147 147 btsl %edi, %eax … … 150 150 151 151 read_efer_flag: 152 mov l $0xc0000080, %ecx152 movq $0xc0000080, %rcx 153 153 rdmsr 154 154 ret … … 243 243 * Stop stack traces here if we came from userspace. 244 244 */ 245 xor l %edx, %edx245 xorq %rdx, %rdx 246 246 cmpq $(GDT_SELECTOR(KTEXT_DES)), ISTATE_OFFSET_CS(%rsp) 247 247 cmovnzq %rdx, %rbp … … 386 386 movq ISTATE_OFFSET_RSP(%rsp), %rsp 387 387 388 /*389 * Clear the rest of the scratch registers to prevent information leak.390 * The 32-bit XOR on the low GPRs actually clears the entire 64-bit391 * register and the instruction is shorter.392 */393 xorl %edx, %edx394 xorl %esi, %esi395 xorl %edi, %edi396 xorq %r8, %r8397 xorq %r9, %r9398 xorq %r10, %r10399 400 388 sysretq 401 389 … … 425 413 movq %rdi, %rsi 426 414 movq $(PA2KA(0xb8000)), %rdi /* base of EGA text mode memory */ 427 xor l %eax, %eax415 xorq %rax, %rax 428 416 429 417 /* Read bits 8 - 15 of the cursor address */ … … 505 493 movq $(PA2KA(0xb80a0)), %rsi 506 494 movq $(PA2KA(0xb8000)), %rdi 507 mov l $480, %ecx495 movq $480, %rcx 508 496 rep movsq 509 497 510 498 /* Clear the 24th row */ 511 xor l %eax, %eax512 mov l $20, %ecx499 xorq %rax, %rax 500 movq $20, %rcx 513 501 rep stosq 514 502 -
kernel/arch/amd64/src/boot/boot.S
re06ef614 r28f4adb 516 516 movq $(PA2KA(0xb80a0)), %rsi 517 517 movq $(PA2KA(0xb8000)), %rdi 518 mov l $480, %ecx518 movq $480, %rcx 519 519 rep movsq 520 520 521 521 /* Clear the 24th row */ 522 xor l %eax, %eax523 mov l $20, %ecx522 xorq %rax, %rax 523 movq $20, %rcx 524 524 rep stosq 525 525 -
kernel/arch/amd64/src/context.S
re06ef614 r28f4adb 45 45 CONTEXT_SAVE_ARCH_CORE %rdi %rdx 46 46 47 xor l %eax, %eax # context_save returns 148 inc l %eax47 xorq %rax, %rax # context_save returns 1 48 incq %rax 49 49 ret 50 50 … … 60 60 movq %rdx, (%rsp) 61 61 62 xor l %eax, %eax # context_restore returns 062 xorq %rax, %rax # context_restore returns 0 63 63 ret -
uspace/lib/c/arch/amd64/src/entry.s
re06ef614 r28f4adb 42 42 # 43 43 pushq $0 44 mov q%rsp, %rbp44 mov %rsp, %rbp 45 45 46 46 # %rdi was deliberately chosen as the first argument is also in %rdi -
uspace/lib/c/arch/amd64/src/fibril.S
re06ef614 r28f4adb 49 49 movq %rax, OFFSET_TLS(%rdi) 50 50 51 xor l %eax, %eax # context_save returns 152 inc l %eax51 xorq %rax,%rax # context_save returns 1 52 incq %rax 53 53 ret 54 54 … … 67 67 # Set thread local storage 68 68 movq OFFSET_TLS(%rdi), %rdi # Set arg1 to TLS addr 69 mov l $1, %eax # SYS_TLS_SET69 movq $1, %rax # SYS_TLS_SET 70 70 syscall 71 71 72 xor l %eax, %eax # context_restore returns 072 xorq %rax,%rax # context_restore returns 0 73 73 ret
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