Index: boot/arch/arm32/src/mm.c
===================================================================
--- boot/arch/arm32/src/mm.c	(revision 26e550c22bed7bdb552a6277dba5becaa96591ed)
+++ boot/arch/arm32/src/mm.c	(revision 2826998bbecee0bf5a27635707da0db286c328a3)
@@ -120,6 +120,7 @@
 		
 #ifdef PROCESSOR_armv7_a
-		/* Mask to enable paging, caching */
-		"ldr r1, =0x00000005\n"
+		/* Mask to enable paging, I-cache D-cache
+		 * See kernel/arch/arm32/include/regutils.h for bit values.*/
+		"ldr r1, =0x00001005\n"
 #else
 		/* Mask to enable paging */
Index: kernel/arch/arm32/include/regutils.h
===================================================================
--- kernel/arch/arm32/include/regutils.h	(revision 26e550c22bed7bdb552a6277dba5becaa96591ed)
+++ kernel/arch/arm32/include/regutils.h	(revision 2826998bbecee0bf5a27635707da0db286c328a3)
@@ -47,5 +47,5 @@
 #define CP15_R1_CACHE_EN          (1 << 2)
 #define CP15_R1_CP15_BARRIER_EN   (1 << 5)
-#define CP15_R1_B_EN              (1 << 7)  /* ARMv6- only big endian switch */
+#define CP15_R1_B_EN              (1 << 7)  /* ARMv6- only, big endian switch */
 #define CP15_R1_SWAP_EN           (1 << 10)
 #define CP15_R1_BRANCH_PREDICT_EN (1 << 11)
Index: kernel/arch/arm32/src/cpu/cpu.c
===================================================================
--- kernel/arch/arm32/src/cpu/cpu.c	(revision 26e550c22bed7bdb552a6277dba5becaa96591ed)
+++ kernel/arch/arm32/src/cpu/cpu.c	(revision 2826998bbecee0bf5a27635707da0db286c328a3)
@@ -105,10 +105,10 @@
 	);
 	
-	/* Turn off tex remap, RAZ ignores writes prior to armv7 */
+	/* Turn off tex remap, RAZ/WI prior to armv7 */
 	control_reg &= ~CP15_R1_TEX_REMAP_EN;
-	/* Turn off accessed flag, RAZ ignores writes prior to armv7 */
+	/* Turn off accessed flag, RAZ/WI prior to armv7 */
 	control_reg &= ~(CP15_R1_ACCESS_FLAG_EN | CP15_R1_HW_ACCESS_FLAG_EN);
-	/* Enable unaligned access, RAZ ignores writes prior to armv6
-	 * switchable on armv6, RAO ignores writes on armv7,
+	/* Enable unaligned access, RAZ/WI prior to armv6
+	 * switchable on armv6, RAO/WI writes on armv7,
 	 * see ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition
 	 * L.3.1 (p. 2456) */