Ignore:
Timestamp:
2013-04-19T18:38:18Z (12 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
6d717a4
Parents:
a1e2df13 (diff), 289cb7dd (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline chages.

File:
1 moved

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Unmodified
Added
Removed
  • kernel/arch/arm32/include/arch/mm/page_armv4.h

    ra1e2df13 r25eec4e  
    11/*
    22 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
     3 * Copyright (c) 2012 Jan Vesely
    34 * All rights reserved.
    45 *
     
    3435 */
    3536
     37#ifndef KERN_arm32_PAGE_armv4_H_
     38#define KERN_arm32_PAGE_armv4_H_
     39
    3640#ifndef KERN_arm32_PAGE_H_
    37 #define KERN_arm32_PAGE_H_
    38 
    39 #include <arch/mm/frame.h>
    40 #include <mm/mm.h>
    41 #include <arch/exception.h>
    42 #include <arch/barrier.h>
    43 #include <trace.h>
    44 
    45 #define PAGE_WIDTH      FRAME_WIDTH
    46 #define PAGE_SIZE       FRAME_SIZE
    47 
    48 #ifndef __ASM__
    49 #       define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
    50 #       define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
    51 #else
    52 #       define KA2PA(x) ((x) - 0x80000000)
    53 #       define PA2KA(x) ((x) + 0x80000000)
     41#error "Do not include arch specific page.h directly use generic page.h instead"
    5442#endif
    55 
    56 /* Number of entries in each level. */
    57 #define PTL0_ENTRIES_ARCH       (1 << 12)       /* 4096 */
    58 #define PTL1_ENTRIES_ARCH       0
    59 #define PTL2_ENTRIES_ARCH       0
    60 /* coarse page tables used (256 * 4 = 1KB per page) */
    61 #define PTL3_ENTRIES_ARCH       (1 << 8)        /* 256 */
    62 
    63 /* Page table sizes for each level. */
    64 #define PTL0_SIZE_ARCH          FOUR_FRAMES
    65 #define PTL1_SIZE_ARCH          0
    66 #define PTL2_SIZE_ARCH          0
    67 #define PTL3_SIZE_ARCH          ONE_FRAME
    68 
    69 /* Macros calculating indices into page tables for each level. */
    70 #define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 20) & 0xfff)
    71 #define PTL1_INDEX_ARCH(vaddr)  0
    72 #define PTL2_INDEX_ARCH(vaddr)  0
    73 #define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x0ff)
    74 
    75 /* Get PTE address accessors for each level. */
    76 #define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
    77         ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10))
    78 #define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
    79         (ptl1)
    80 #define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
    81         (ptl2)
    82 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
    83         ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12))
    84 
    85 /* Set PTE address accessors for each level. */
    86 #define SET_PTL0_ADDRESS_ARCH(ptl0) \
    87         (set_ptl0_addr((pte_t *) (ptl0)))
    88 #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
    89         (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10)
    90 #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
    91 #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
    92 #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
    93         (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12)
    94 
    95 /* Get PTE flags accessors for each level. */
    96 #define GET_PTL1_FLAGS_ARCH(ptl0, i) \
    97         get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i))
    98 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \
    99         PAGE_PRESENT
    100 #define GET_PTL3_FLAGS_ARCH(ptl2, i) \
    101         PAGE_PRESENT
    102 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \
    103         get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i))
    104 
    105 /* Set PTE flags accessors for each level. */
    106 #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
    107         set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x))
    108 #define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
    109 #define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
    110 #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
    111         set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x))
    112 
    113 /* Set PTE present bit accessors for each level. */
    114 #define SET_PTL1_PRESENT_ARCH(ptl0, i) \
    115         set_pt_level0_present((pte_t *) (ptl0), (size_t) (i))
    116 #define SET_PTL2_PRESENT_ARCH(ptl1, i)
    117 #define SET_PTL3_PRESENT_ARCH(ptl2, i)
    118 #define SET_FRAME_PRESENT_ARCH(ptl3, i) \
    119         set_pt_level1_present((pte_t *) (ptl3), (size_t) (i))
    12043
    12144/* Macros for querying the last-level PTE entries. */
     
    276199}
    277200
    278 NO_TRACE static inline void set_pt_level0_present(pte_t *pt, size_t i)
    279 {
    280         pte_level0_t *p = &pt[i].l0;
    281 
    282         p->should_be_zero = 0;
    283         write_barrier();
    284         p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE;
    285 }
    286201
    287202/** Sets flags of level 1 page table entry.
     
    326241}
    327242
     243NO_TRACE static inline void set_pt_level0_present(pte_t *pt, size_t i)
     244{
     245        pte_level0_t *p = &pt[i].l0;
     246
     247        p->should_be_zero = 0;
     248        write_barrier();
     249        p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE;
     250}
     251
     252
    328253NO_TRACE static inline void set_pt_level1_present(pte_t *pt, size_t i)
    329254{
     
    332257        p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE;
    333258}
    334        
     259
     260
    335261extern void page_arch_init(void);
    336262
     263
    337264#endif /* __ASM__ */
    338265
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