Changeset 25eec4e in mainline for boot/arch/arm32/include/mm.h

Timestamp:

2013-04-19T18:38:18Z (12 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

6d717a4

Parents:

a1e2df13 (diff), 289cb7dd (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline chages.

File:

• boot/arch/arm32/include/mm.h (modified) (2 diffs)

boot/arch/arm32/include/mm.h

@@ -47 +47 @@
 /** Describe "section" page table entry (one-level paging with 1 MB sized pages). */
 #define PTE_DESCRIPTOR_SECTION  0x02
+/** Shift of memory address in section descriptor */
+#define PTE_SECTION_SHIFT  20
 
 /** Page table access rights: user - no access, kernel - read/write. */
 #define PTE_AP_USER_NO_KERNEL_RW  0x01
+
+/** Start of memory mapped I/O area for GTA02 */
+#define GTA02_IOMEM_START  0x48000000
+/** End of memory mapped I/O area for GTA02 */
+#define GTA02_IOMEM_END  0x60000000
+
+/** Start of ram memory on BBxM */
+#define BBXM_RAM_START   0x80000000
+/** Start of ram memory on BBxM */
+#define BBXM_RAM_END   0xc0000000
+
+/** Start of ram memory on AM335x */
+#define AM335x_RAM_START   0x80000000
+/** End of ram memory on AM335x */
+#define AM335x_RAM_END     0xC0000000
+
 
 /* Page table level 0 entry - "section" format is used
@@ -58 +76 @@
         unsigned int bufferable : 1;
         unsigned int cacheable : 1;
-        unsigned int impl_specific : 1;
+        unsigned int xn : 1;
         unsigned int domain : 4;
         unsigned int should_be_zero_1 : 1;
-        unsigned int access_permission : 2;
-        unsigned int should_be_zero_2 : 8;
+        unsigned int access_permission_0 : 2;
+        unsigned int tex : 3;
+        unsigned int access_permission_1 : 1;
+        unsigned int shareable : 1;
+        unsigned int non_global : 1;
+        unsigned int should_be_zero_2 : 1;
+        unsigned int non_secure : 1;
         unsigned int section_base_addr : 12;
 } __attribute__((packed)) pte_level0_section_t;