Changeset 25d7709 in mainline for arch/ia64/src


Ignore:
Timestamp:
2006-03-13T20:08:16Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
631ca4d
Parents:
45d6add
Message:

Nicer ia32 interrupt handlers and structures holding interrupted context data.
Unify the name holding interrupted context data on all architectures to be istate.

Location:
arch/ia64/src
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • arch/ia64/src/interrupt.c

    r45d6add r25d7709  
    109109
    110110static char *vector_to_string(__u16 vector);
    111 static void dump_interrupted_context(struct exception_regdump *pstate);
     111static void dump_interrupted_context(istate_t *istate);
    112112
    113113char *vector_to_string(__u16 vector)
    … …  
    121121}
    122122
    123 void dump_interrupted_context(struct exception_regdump *pstate)
     123void dump_interrupted_context(istate_t *istate)
    124124{
    125125        char *ifa, *iipa, *iip;
    126126
    127         ifa = get_symtab_entry(pstate->cr_ifa);
    128         iipa = get_symtab_entry(pstate->cr_iipa);
    129         iip = get_symtab_entry(pstate->cr_iip);
     127        ifa = get_symtab_entry(istate->cr_ifa);
     128        iipa = get_symtab_entry(istate->cr_iipa);
     129        iip = get_symtab_entry(istate->cr_iip);
    130130
    131131        putchar('\n');
    132132        printf("Interrupted context dump:\n");
    133         printf("ar.bsp=%P\tar.bspstore=%P\n", pstate->ar_bsp, pstate->ar_bspstore);
    134         printf("ar.rnat=%Q\tar.rsc=%Q\n", pstate->ar_rnat, pstate->ar_rsc);
    135         printf("ar.ifs=%Q\tar.pfs=%Q\n", pstate->ar_ifs, pstate->ar_pfs);
    136         printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", pstate->cr_isr.value, pstate->cr_ipsr);
     133        printf("ar.bsp=%P\tar.bspstore=%P\n", istate->ar_bsp, istate->ar_bspstore);
     134        printf("ar.rnat=%Q\tar.rsc=%Q\n", istate->ar_rnat, istate->ar_rsc);
     135        printf("ar.ifs=%Q\tar.pfs=%Q\n", istate->ar_ifs, istate->ar_pfs);
     136        printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", istate->cr_isr.value, istate->cr_ipsr);
    137137       
    138         printf("cr.iip=%Q, #%d\t(%s)\n", pstate->cr_iip, pstate->cr_isr.ei ,iip ? iip : "?");
    139         printf("cr.iipa=%Q\t(%s)\n", pstate->cr_iipa, iipa ? iipa : "?");
    140         printf("cr.ifa=%Q\t(%s)\n", pstate->cr_ifa, ifa ? ifa : "?");
    141 }
    142 
    143 void general_exception(__u64 vector, struct exception_regdump *pstate)
     138        printf("cr.iip=%Q, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei ,iip ? iip : "?");
     139        printf("cr.iipa=%Q\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");
     140        printf("cr.ifa=%Q\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");
     141}
     142
     143void general_exception(__u64 vector, istate_t *istate)
    144144{
    145145        char *desc = "";
    146146
    147         dump_interrupted_context(pstate);
    148 
    149         switch (pstate->cr_isr.ge_code) {
     147        dump_interrupted_context(istate);
     148
     149        switch (istate->cr_isr.ge_code) {
    150150            case GE_ILLEGALOP:
    151151                desc = "Illegal Operation fault";
    … …  
    175175
    176176/** Handle syscall. */
    177 int break_instruction(__u64 vector, struct exception_regdump *pstate)
     177int break_instruction(__u64 vector, istate_t *istate)
    178178{
    179179        /*
    180180         * Move to next instruction after BREAK.
    181181         */
    182         if (pstate->cr_ipsr.ri == 2) {
    183                 pstate->cr_ipsr.ri = 0;
    184                 pstate->cr_iip += 16;
     182        if (istate->cr_ipsr.ri == 2) {
     183                istate->cr_ipsr.ri = 0;
     184                istate->cr_iip += 16;
    185185        } else {
    186                 pstate->cr_ipsr.ri++;
     186                istate->cr_ipsr.ri++;
    187187        }
    188188
    189         if (pstate->in0 < SYSCALL_END)
    190                 return syscall_table[pstate->in0](pstate->in1, pstate->in2, pstate->in3);
     189        if (istate->in3 < SYSCALL_END)
     190                return syscall_table[istate->in3](istate->in0, istate->in1, istate->in2);
    191191        else
    192                 panic("Undefined syscall %d", pstate->in0);
     192                panic("Undefined syscall %d", istate->in3);
    193193               
    194194        return -1;
    195195}
    196196
    197 void universal_handler(__u64 vector, struct exception_regdump *pstate)
    198 {
    199         dump_interrupted_context(pstate);
     197void universal_handler(__u64 vector, istate_t *istate)
     198{
     199        dump_interrupted_context(istate);
    200200        panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
    201201}
    202202
    203 void external_interrupt(__u64 vector, struct exception_regdump *pstate)
     203void external_interrupt(__u64 vector, istate_t *istate)
    204204{
    205205        cr_ivr_t ivr;

  • arch/ia64/src/mm/tlb.c

    r45d6add r25d7709  
    443443 *
    444444 * @param vector Interruption vector.
    445  * @param pstate Structure with saved interruption state.
    446  */
    447 void alternate_instruction_tlb_fault(__u64 vector, struct exception_regdump *pstate)
     445 * @param istate Structure with saved interruption state.
     446 */
     447void alternate_instruction_tlb_fault(__u64 vector, istate_t *istate)
    448448{
    449449        region_register rr;
    … …  
    451451        pte_t *t;
    452452       
    453         va = pstate->cr_ifa;    /* faulting address */
     453        va = istate->cr_ifa;    /* faulting address */
    454454        t = page_mapping_find(AS, va);
    455455        if (t) {
    … …  
    464464                 */
    465465                if (!as_page_fault(va)) {
    466                         panic("%s: va=%P, rid=%d\n", __FUNCTION__, pstate->cr_ifa, rr.map.rid);
     466                        panic("%s: va=%P, rid=%d\n", __FUNCTION__, istate->cr_ifa, rr.map.rid);
    467467                }
    468468        }
    … …  
    472472 *
    473473 * @param vector Interruption vector.
    474  * @param pstate Structure with saved interruption state.
    475  */
    476 void alternate_data_tlb_fault(__u64 vector, struct exception_regdump *pstate)
     474 * @param istate Structure with saved interruption state.
     475 */
     476void alternate_data_tlb_fault(__u64 vector, istate_t *istate)
    477477{
    478478        region_register rr;
    … …  
    481481        pte_t *t;
    482482       
    483         va = pstate->cr_ifa;    /* faulting address */
     483        va = istate->cr_ifa;    /* faulting address */
    484484        rr.word = rr_read(VA2VRN(va));
    485485        rid = rr.map.rid;
    … …  
    507507                 */
    508508                if (!as_page_fault(va)) {
    509                         panic("%s: va=%P, rid=%d\n", __FUNCTION__, pstate->cr_ifa, rr.map.rid);
     509                        panic("%s: va=%P, rid=%d\n", __FUNCTION__, istate->cr_ifa, rr.map.rid);
    510510                }
    511511        }
    … …  
    517517 *
    518518 * @param vector Interruption vector.
    519  * @param pstate Structure with saved interruption state.
    520  */
    521 void data_nested_tlb_fault(__u64 vector, struct exception_regdump *pstate)
     519 * @param istate Structure with saved interruption state.
     520 */
     521void data_nested_tlb_fault(__u64 vector, istate_t *istate)
    522522{
    523523        panic("%s\n", __FUNCTION__);
    … …  
    527527 *
    528528 * @param vector Interruption vector.
    529  * @param pstate Structure with saved interruption state.
    530  */
    531 void data_dirty_bit_fault(__u64 vector, struct exception_regdump *pstate)
     529 * @param istate Structure with saved interruption state.
     530 */
     531void data_dirty_bit_fault(__u64 vector, istate_t *istate)
    532532{
    533533        pte_t *t;
    534534
    535         t = page_mapping_find(AS, pstate->cr_ifa);
     535        t = page_mapping_find(AS, istate->cr_ifa);
    536536        ASSERT(t && t->p);
    537537        if (t && t->p) {
    … …  
    548548 *
    549549 * @param vector Interruption vector.
    550  * @param pstate Structure with saved interruption state.
    551  */
    552 void instruction_access_bit_fault(__u64 vector, struct exception_regdump *pstate)
     550 * @param istate Structure with saved interruption state.
     551 */
     552void instruction_access_bit_fault(__u64 vector, istate_t *istate)
    553553{
    554554        pte_t *t;
    555555
    556         t = page_mapping_find(AS, pstate->cr_ifa);
     556        t = page_mapping_find(AS, istate->cr_ifa);
    557557        ASSERT(t && t->p);
    558558        if (t && t->p) {
    … …  
    569569 *
    570570 * @param vector Interruption vector.
    571  * @param pstate Structure with saved interruption state.
    572  */
    573 void data_access_bit_fault(__u64 vector, struct exception_regdump *pstate)
     571 * @param istate Structure with saved interruption state.
     572 */
     573void data_access_bit_fault(__u64 vector, istate_t *istate)
    574574{
    575575        pte_t *t;
    576576
    577         t = page_mapping_find(AS, pstate->cr_ifa);
     577        t = page_mapping_find(AS, istate->cr_ifa);
    578578        ASSERT(t && t->p);
    579579        if (t && t->p) {
    … …  
    590590 *
    591591 * @param vector Interruption vector.
    592  * @param pstate Structure with saved interruption state.
    593  */
    594 void page_not_present(__u64 vector, struct exception_regdump *pstate)
     592 * @param istate Structure with saved interruption state.
     593 */
     594void page_not_present(__u64 vector, istate_t *istate)
    595595{
    596596        region_register rr;
    … …  
    598598        pte_t *t;
    599599       
    600         va = pstate->cr_ifa;    /* faulting address */
     600        va = istate->cr_ifa;    /* faulting address */
    601601        t = page_mapping_find(AS, va);
    602602        ASSERT(t);
    … …  
    613613        } else {
    614614                if (!as_page_fault(va)) {
    615                         panic("%s: va=%P, rid=%d\n", __FUNCTION__, pstate->cr_ifa, rr.map.rid);
    616                 }
    617         }
    618 }
     615                        panic("%s: va=%P, rid=%d\n", __FUNCTION__, istate->cr_ifa, rr.map.rid);
     616                }
     617        }
     618}
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