Changes in kernel/arch/amd64/src/fpu_context.c [9d58539:24c394b] in mainline

File:

• kernel/arch/amd64/src/fpu_context.c (modified) (3 diffs)

kernel/arch/amd64/src/fpu_context.c

@@ -41 +41 @@
         asm volatile (
                 "fxsave %[fctx]\n"
-                : [fctx] "=m" (*fctx)
+                : [fctx] "=m" (fctx->fpu)
         );
 }
@@ -50 +50 @@
         asm volatile (
                 "fxrstor %[fctx]\n"
-                : [fctx] "=m" (*fctx)
+                : [fctx] "=m" (fctx->fpu)
         );
 }
@@ -57 +57 @@
 {
         /* TODO: Zero all SSE, MMX etc. registers */
+        /* Default value of SCR register is 0x1f80,
+         * it masks all FPU exceptions*/
         asm volatile (
                 "fninit\n"