Changeset 24bead17 in mainline for boot/arch/arm32/src/asm.S
- Timestamp:
- 2013-01-24T22:04:29Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 005b765, 7275e520
- Parents:
- 0e63d34
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/arm32/src/asm.S
r0e63d34 r24bead17 97 97 nop 98 98 #endif 99 100 #TODO:This should not be necessary101 102 #if defined(MACHINE_gta02)103 104 #define CP15_C7_SEG_SHIFT 5105 #define CP15_C7_SEG_SIZE 3106 #define CP15_C7_IDX_SHIFT 26107 108 # Now clean D-cache to guarantee coherency between I-cache and D-cache.109 110 # D-cache clean and invalidate procedure.111 # See ARM920T TRM pages 2-17, 4-17.112 113 # Initialize segment114 mov r4, #0115 # Initialize index116 1: mov r5, #0117 2: orr r6, r4, r5118 # Clean and invalidate a single line119 mcr p15, 0, r6, c7, c10, 2120 # Increment index121 add r5, r5, #(1 << CP15_C7_IDX_SHIFT)122 cmp r5, #0123 bne 2b124 # Increment segment125 add r4, #(1 << CP15_C7_SEG_SHIFT)126 tst r4, #(1 << (CP15_C7_SEG_SHIFT + CP15_C7_SEG_SIZE))127 beq 1b128 #endif129 130 99 mov pc, r0
Note:
See TracChangeset
for help on using the changeset viewer.