Changes in / [fbfe59d:2498b95] in mainline
- Files:
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- 8 deleted
- 7 edited
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boot/Makefile.common (modified) (1 diff)
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tools/ew.py (modified) (4 diffs)
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uspace/Makefile (modified) (2 diffs)
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uspace/drv/bus/pci/pciintel/pci.c (modified) (3 diffs)
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uspace/drv/nic/virtio-net/Makefile (deleted)
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uspace/drv/nic/virtio-net/virtio-net.c (deleted)
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uspace/drv/nic/virtio-net/virtio-net.h (deleted)
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uspace/drv/nic/virtio-net/virtio-net.ma (deleted)
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uspace/lib/c/generic/ddi.c (modified) (5 diffs)
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uspace/lib/c/include/ddi.h (modified) (3 diffs)
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uspace/lib/drv/include/pci_dev_iface.h (modified) (2 diffs)
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uspace/lib/virtio/Makefile (deleted)
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uspace/lib/virtio/virtio-pci.c (deleted)
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uspace/lib/virtio/virtio-pci.h (deleted)
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uspace/lib/virtio/virtio.c (deleted)
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boot/Makefile.common
rfbfe59d r2498b95 139 139 nic/rtl8169 \ 140 140 nic/ar9271 \ 141 nic/virtio-net \142 141 block/ahci 143 142 -
tools/ew.py
rfbfe59d r2498b95 146 146 return ' -device rtl8139,vlan=0' 147 147 148 def qemu_nic_virtio_options():149 return ' -device virtio-net,vlan=0'150 151 148 def qemu_net_options(): 152 149 if is_override('nonet'): … … 161 158 if 'ne2k' in overrides['net'].keys(): 162 159 nic_options += qemu_nic_ne2k_options() 163 if 'virtio-net' in overrides['net'].keys():164 nic_options += qemu_nic_virtio_options()165 160 else: 166 161 # Use the default NIC … … 331 326 def usage(): 332 327 print("%s - emulator wrapper for running HelenOS\n" % os.path.basename(sys.argv[0])) 333 print("%s [-d] [-h] [-net e1k|rtl8139|ne2k |virtio-net] [-nohdd] [-nokvm] [-nonet] [-nosnd] [-nousb] [-noxhci] [-notablet]\n" %328 print("%s [-d] [-h] [-net e1k|rtl8139|ne2k] [-nohdd] [-nokvm] [-nonet] [-nosnd] [-nousb] [-noxhci] [-notablet]\n" % 334 329 os.path.basename(sys.argv[0])) 335 330 print("-d\tDry run: do not run the emulation, just print the command line.") … … 365 360 elif sys.argv[i] == 'ne2k': 366 361 overrides['net']['ne2k'] = True 367 elif sys.argv[i] == 'virtio-net':368 overrides['net']['virtio-net'] = True369 362 else: 370 363 usage() -
uspace/Makefile
rfbfe59d r2498b95 181 181 drv/nic/rtl8169 \ 182 182 drv/nic/ar9271 \ 183 drv/nic/virtio-net \184 183 drv/platform/amdm37x \ 185 184 drv/platform/icp \ … … 252 251 lib/bithenge \ 253 252 lib/posix \ 254 lib/ieee80211 \ 255 lib/virtio 253 lib/ieee80211 256 254 257 255 BASE_BUILDS := $(addsuffix .build,$(BASE_LIBS)) -
uspace/drv/bus/pci/pciintel/pci.c
rfbfe59d r2498b95 738 738 739 739 if (pio_enable_resource(&bus->pio_win, 740 &hw_resources.resources[0], (void **) &bus->conf_space,741 NULL, NULL)) {740 &hw_resources.resources[0], 741 (void **) &bus->conf_space)) { 742 742 ddf_msg(LVL_ERROR, 743 743 "Failed to map configuration space."); … … 759 759 760 760 if (pio_enable_resource(&bus->pio_win, 761 &hw_resources.resources[0], (void **) &bus->conf_addr_reg,762 NULL, NULL)) {761 &hw_resources.resources[0], 762 (void **) &bus->conf_addr_reg)) { 763 763 ddf_msg(LVL_ERROR, 764 764 "Failed to enable configuration ports."); … … 767 767 } 768 768 if (pio_enable_resource(&bus->pio_win, 769 &hw_resources.resources[1], (void **) &bus->conf_data_reg,770 NULL, NULL)) {769 &hw_resources.resources[1], 770 (void **) &bus->conf_data_reg)) { 771 771 ddf_msg(LVL_ERROR, 772 772 "Failed to enable configuration ports."); -
uspace/lib/c/generic/ddi.c
rfbfe59d r2498b95 220 220 /** Enable PIO for specified HW resource wrt. to the PIO window. 221 221 * 222 * @param win PIO window. May be NULL if the resources are known to be 223 * absolute. 224 * @param res Resources specifying the I/O range wrt. to the PIO window. 225 * @param[out] virt Virtual address for application's PIO operations. 226 * @param[out] phys If non-NULL, physical address of the resource 227 * @param[out] size If non-NULL, size of the enabled resource. 222 * @param win PIO window. May be NULL if the resources are known to be 223 * absolute. 224 * @param res Resources specifying the I/O range wrt. to the PIO window. 225 * @param virt Virtual address for application's PIO operations. 228 226 * 229 227 * @return EOK on success. … … 231 229 * 232 230 */ 233 errno_t pio_enable_resource(pio_window_t *win, hw_resource_t *res, void **virt, 234 uintptr_t *phys, size_t *size) 231 errno_t pio_enable_resource(pio_window_t *win, hw_resource_t *res, void **virt) 235 232 { 236 233 uintptr_t addr; 237 size_t s z;234 size_t size; 238 235 239 236 switch (res->type) { … … 245 242 addr += win->io.base; 246 243 } 247 s z= res->res.io_range.size;244 size = res->res.io_range.size; 248 245 break; 249 246 case MEM_RANGE: … … 254 251 addr += win->mem.base; 255 252 } 256 s z= res->res.mem_range.size;253 size = res->res.mem_range.size; 257 254 break; 258 255 default: … … 260 257 } 261 258 262 if (phys) 263 *phys = addr; 264 if (size) 265 *size = sz; 266 267 return pio_enable((void *) addr, sz, virt); 259 return pio_enable((void *) addr, size, virt); 268 260 } 269 261 -
uspace/lib/c/include/ddi.h
rfbfe59d r2498b95 40 40 #include <stdint.h> 41 41 #include <sys/time.h> 42 #include <byteorder.h>43 42 #include <abi/ddi/irq.h> 44 43 #include <device/hw_res.h> … … 65 64 66 65 extern errno_t pio_enable_range(addr_range_t *, void **); 67 extern errno_t pio_enable_resource(pio_window_t *, hw_resource_t *, void **, 68 uintptr_t *, size_t *); 66 extern errno_t pio_enable_resource(pio_window_t *, hw_resource_t *, void **); 69 67 extern errno_t pio_enable(void *, size_t, void **); 70 68 extern errno_t pio_disable(void *, size_t); … … 86 84 extern uint32_t pio_read_32(const ioport32_t *); 87 85 extern uint64_t pio_read_64(const ioport64_t *); 88 89 static inline void pio_write_le16(ioport16_t *reg, uint16_t val)90 {91 pio_write_16(reg, host2uint16_t_le(val));92 }93 static inline void pio_write_be16(ioport16_t *reg, uint16_t val)94 {95 pio_write_16(reg, host2uint16_t_be(val));96 }97 static inline void pio_write_le32(ioport32_t *reg, uint32_t val)98 {99 pio_write_32(reg, host2uint32_t_le(val));100 }101 static inline void pio_write_be32(ioport32_t *reg, uint32_t val)102 {103 pio_write_32(reg, host2uint32_t_be(val));104 }105 static inline void pio_write_le64(ioport64_t *reg, uint64_t val)106 {107 pio_write_64(reg, host2uint64_t_le(val));108 }109 static inline void pio_write_be64(ioport64_t *reg, uint64_t val)110 {111 pio_write_64(reg, host2uint64_t_be(val));112 }113 114 static inline uint16_t pio_read_le16(const ioport16_t *reg)115 {116 return uint16_t_le2host(pio_read_16(reg));117 }118 static inline uint16_t pio_read_be16(const ioport16_t *reg)119 {120 return uint16_t_be2host(pio_read_16(reg));121 }122 static inline uint32_t pio_read_le32(const ioport32_t *reg)123 {124 return uint32_t_le2host(pio_read_32(reg));125 }126 static inline uint32_t pio_read_be32(const ioport32_t *reg)127 {128 return uint32_t_be2host(pio_read_32(reg));129 }130 static inline uint64_t pio_read_le64(const ioport64_t *reg)131 {132 return uint64_t_le2host(pio_read_64(reg));133 }134 static inline uint64_t pio_read_be64(const ioport64_t *reg)135 {136 return uint64_t_be2host(pio_read_64(reg));137 }138 86 139 87 static inline uint8_t pio_change_8(ioport8_t *reg, uint8_t val, uint8_t mask, -
uspace/lib/drv/include/pci_dev_iface.h
rfbfe59d r2498b95 42 42 #define PCI_VENDOR_ID 0x00 43 43 #define PCI_DEVICE_ID 0x02 44 #define PCI_STATUS 0x0645 44 #define PCI_SUB_CLASS 0x0A 46 45 #define PCI_BASE_CLASS 0x0B 47 #define PCI_BAR0 0x1048 #define PCI_CAP_PTR 0x3449 50 #define PCI_BAR_COUNT 651 52 #define PCI_STATUS_CAP_LIST (1 << 4)53 54 #define PCI_CAP_ID(c) ((c) + 0x0)55 #define PCI_CAP_NEXT(c) ((c) + 0x1)56 57 #define PCI_CAP_PMID 0x158 #define PCI_CAP_VENDORSPECID 0x959 46 60 47 extern errno_t pci_config_space_read_8(async_sess_t *, uint32_t, uint8_t *); … … 65 52 extern errno_t pci_config_space_write_16(async_sess_t *, uint32_t, uint16_t); 66 53 extern errno_t pci_config_space_write_32(async_sess_t *, uint32_t, uint32_t); 67 68 static inline errno_t69 pci_config_space_cap_first(async_sess_t *sess, uint8_t *c, uint8_t *id)70 {71 errno_t rc;72 uint16_t status;73 74 rc = pci_config_space_read_16(sess, PCI_STATUS, &status);75 if (rc != EOK)76 return rc;77 78 if (!(status & PCI_STATUS_CAP_LIST)) {79 *c = 0;80 return EOK;81 }82 83 rc = pci_config_space_read_8(sess, PCI_CAP_PTR, c);84 if (rc != EOK)85 return rc;86 if (!c)87 return EOK;88 return pci_config_space_read_8(sess, PCI_CAP_ID(*c), id);89 }90 91 static inline errno_t92 pci_config_space_cap_next(async_sess_t *sess, uint8_t *c, uint8_t *id)93 {94 errno_t rc = pci_config_space_read_8(sess, PCI_CAP_NEXT(*c), c);95 if (rc != EOK)96 return rc;97 if (!c)98 return EOK;99 return pci_config_space_read_8(sess, PCI_CAP_ID(*c), id);100 }101 54 102 55 /** PCI device communication interface. */
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