Index: uspace/lib/c/arch/arm32/include/libarch/atomic.h
===================================================================
--- uspace/lib/c/arch/arm32/include/libarch/atomic.h	(revision e0a4686ebb68dd7d42dd083c5ea6c37d6ced027d)
+++ uspace/lib/c/arch/arm32/include/libarch/atomic.h	(revision 231c770580f4400a6e0e7612723b1efb16fd5390)
@@ -56,27 +56,27 @@
 	 */
 	asm volatile (
-		"1:\n"
-		"	adr %[ret], 1b\n"
-		"	str %[ret], %[rp0]\n"
-		"	adr %[ret], 2f\n"
-		"	str %[ret], %[rp1]\n"
-		"	ldr %[ret], %[addr]\n"
-		"	cmp %[ret], %[ov]\n"
-		"	streq %[nv], %[addr]\n"
-		"2:\n"
-		"	moveq %[ret], #1\n"
-		"	movne %[ret], #0\n"
-		: [ret] "+&r" (ret),
-		  [rp0] "=m" (ras_page[0]),
-		  [rp1] "=m" (ras_page[1]),
-		  [addr] "+m" (val->count)
-		: [ov] "r" (ov),
-		  [nv] "r" (nv)
-		: "memory"
+	    "1:\n"
+	    "	adr %[ret], 1b\n"
+	    "	str %[ret], %[rp0]\n"
+	    "	adr %[ret], 2f\n"
+	    "	str %[ret], %[rp1]\n"
+	    "	ldr %[ret], %[addr]\n"
+	    "	cmp %[ret], %[ov]\n"
+	    "	streq %[nv], %[addr]\n"
+	    "2:\n"
+	    "	moveq %[ret], #1\n"
+	    "	movne %[ret], #0\n"
+	    : [ret] "+&r" (ret),
+	      [rp0] "=m" (ras_page[0]),
+	      [rp1] "=m" (ras_page[1]),
+	      [addr] "+m" (val->count)
+	    : [ov] "r" (ov),
+	      [nv] "r" (nv)
+	    : "memory"
 	);
 
 	ras_page[0] = 0;
 	asm volatile (
-		"" ::: "memory"
+	    "" ::: "memory"
 	);
 	ras_page[1] = 0xffffffff;
@@ -103,23 +103,23 @@
 	 */
 	asm volatile (
-		"1:\n"
-		"	adr %[ret], 1b\n"
-		"	str %[ret], %[rp0]\n"
-		"	adr %[ret], 2f\n"
-		"	str %[ret], %[rp1]\n"
-		"	ldr %[ret], %[addr]\n"
-		"	add %[ret], %[ret], %[imm]\n"
-		"	str %[ret], %[addr]\n"
-		"2:\n"
-		: [ret] "+&r" (ret),
-		  [rp0] "=m" (ras_page[0]),
-		  [rp1] "=m" (ras_page[1]),
-		  [addr] "+m" (val->count)
-		: [imm] "r" (i)
+	    "1:\n"
+	    "	adr %[ret], 1b\n"
+	    "	str %[ret], %[rp0]\n"
+	    "	adr %[ret], 2f\n"
+	    "	str %[ret], %[rp1]\n"
+	    "	ldr %[ret], %[addr]\n"
+	    "	add %[ret], %[ret], %[imm]\n"
+	    "	str %[ret], %[addr]\n"
+	    "2:\n"
+	    : [ret] "+&r" (ret),
+	      [rp0] "=m" (ras_page[0]),
+	      [rp1] "=m" (ras_page[1]),
+	      [addr] "+m" (val->count)
+	    : [imm] "r" (i)
 	);
 
 	ras_page[0] = 0;
 	asm volatile (
-		"" ::: "memory"
+	    "" ::: "memory"
 	);
 	ras_page[1] = 0xffffffff;
