Index: kernel/arch/abs32le/include/arch/barrier.h
===================================================================
--- kernel/arch/abs32le/include/arch/barrier.h	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/abs32le/include/arch/barrier.h	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -49,6 +49,5 @@
 #ifdef KERNEL
 
-#define smc_coherence(addr)
-#define smc_coherence_block(addr, size)
+#define smc_coherence(addr, size)
 
 #endif	/* KERNEL*/
Index: kernel/arch/arm32/include/arch/barrier.h
===================================================================
--- kernel/arch/arm32/include/arch/barrier.h	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/arm32/include/arch/barrier.h	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -117,26 +117,21 @@
  */
 
-#if defined PROCESSOR_ARCH_armv7_a | defined PROCESSOR_ARCH_armv6 | defined KERNEL
-//TODO might be PL1 only on armv5-
-#define smc_coherence(a) \
-do { \
-	dcache_clean_mva_pou(ALIGN_DOWN((uintptr_t) a, CP15_C7_MVA_ALIGN)); \
-	write_barrier();               /* Wait for completion */\
-	icache_invalidate();\
-	inst_barrier();                /* Wait for Inst refetch */\
-} while (0)
+#ifdef KERNEL
+
 /*
  * @note: Cache type register is not available in uspace. We would need
  * to export the cache line value, or use syscall for uspace smc_coherence
  */
-#define smc_coherence_block(a, l) \
+#define smc_coherence(a, l) \
 do { \
 	for (uintptr_t addr = (uintptr_t) a; addr < (uintptr_t) a + l; \
 	    addr += CP15_C7_MVA_ALIGN) \
-		smc_coherence(addr); \
+		dcache_clean_mva_pou(ALIGN_DOWN((uintptr_t) a, CP15_C7_MVA_ALIGN)); \
+	write_barrier();               /* Wait for completion */\
+	icache_invalidate();\
+	write_barrier();\
+	inst_barrier();                /* Wait for Inst refetch */\
 } while (0)
-#else
-#define smc_coherence(a)
-#define smc_coherence_block(a, l)
+
 #endif
 
Index: kernel/arch/arm32/src/exception.c
===================================================================
--- kernel/arch/arm32/src/exception.c	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/arm32/src/exception.c	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -75,5 +75,5 @@
 	/* Make it LDR instruction and store at exception vector */
 	*vector = handler_address_ptr | LDR_OPCODE;
-	smc_coherence(vector);
+	smc_coherence(vector, 4);
 
 	/* Store handler's address */
Index: kernel/arch/ia32/include/arch/barrier.h
===================================================================
--- kernel/arch/ia32/include/arch/barrier.h	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/ia32/include/arch/barrier.h	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -106,6 +106,5 @@
  * sufficient for them to drain to the D-cache).
  */
-#define smc_coherence(a)           write_barrier()
-#define smc_coherence_block(a, l)  write_barrier()
+#define smc_coherence(a, l)  write_barrier()
 
 #endif	/* KERNEL */
Index: kernel/arch/ia64/include/arch/barrier.h
===================================================================
--- kernel/arch/ia64/include/arch/barrier.h	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/ia64/include/arch/barrier.h	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -58,13 +58,6 @@
 #ifdef KERNEL
 
-#define smc_coherence(a)	\
-{				\
-	fc_i((a));		\
-	sync_i();		\
-	srlz_i();		\
-}
-
 #define FC_INVAL_MIN		32
-#define smc_coherence_block(a, l)		\
+#define smc_coherence(a, l)		\
 {						\
 	unsigned long i;			\
Index: kernel/arch/mips32/include/arch/barrier.h
===================================================================
--- kernel/arch/mips32/include/arch/barrier.h	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/mips32/include/arch/barrier.h	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -48,6 +48,5 @@
 #ifdef KERNEL
 
-#define smc_coherence(a)
-#define smc_coherence_block(a, l)
+#define smc_coherence(a, l)
 
 #endif	/* KERNEL */
Index: kernel/arch/mips32/src/debugger.c
===================================================================
--- kernel/arch/mips32/src/debugger.c	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/mips32/src/debugger.c	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -213,5 +213,5 @@
 	/* Set breakpoint */
 	*((sysarg_t *) cur->address) = 0x0d;
-	smc_coherence(cur->address);
+	smc_coherence(cur->address, 4);
 
 	irq_spinlock_unlock(&bkpoint_lock, true);
@@ -246,7 +246,7 @@
 
 	((uint32_t *) cur->address)[0] = cur->instruction;
-	smc_coherence(((uint32_t *) cur->address)[0]);
+	smc_coherence(((uint32_t *) cur->address)[0], 4);
 	((uint32_t *) cur->address)[1] = cur->nextinstruction;
-	smc_coherence(((uint32_t *) cur->address)[1]);
+	smc_coherence(((uint32_t *) cur->address)[1], 4);
 
 	cur->address = (uintptr_t) NULL;
@@ -358,9 +358,9 @@
 			/* Set breakpoint on first instruction */
 			((uint32_t *) cur->address)[0] = 0x0d;
-			smc_coherence(((uint32_t *)cur->address)[0]);
+			smc_coherence(((uint32_t *)cur->address)[0], 4);
 
 			/* Return back the second */
 			((uint32_t *) cur->address)[1] = cur->nextinstruction;
-			smc_coherence(((uint32_t *) cur->address)[1]);
+			smc_coherence(((uint32_t *) cur->address)[1], 4);
 
 			cur->flags &= ~BKPOINT_REINST;
@@ -380,5 +380,5 @@
 		/* Return first instruction back */
 		((uint32_t *)cur->address)[0] = cur->instruction;
-		smc_coherence(cur->address);
+		smc_coherence(cur->address, 4);
 
 		if (!(cur->flags & BKPOINT_ONESHOT)) {
Index: kernel/arch/mips32/src/mips32.c
===================================================================
--- kernel/arch/mips32/src/mips32.c	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/mips32/src/mips32.c	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -121,9 +121,9 @@
 	/* Copy the exception vectors to the right places */
 	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
-	smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
+	smc_coherence(TLB_EXC, EXCEPTION_JUMP_SIZE);
 	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
-	smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
+	smc_coherence(NORM_EXC, EXCEPTION_JUMP_SIZE);
 	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
-	smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
+	smc_coherence(CACHE_EXC, EXCEPTION_JUMP_SIZE);
 
 	/*
Index: kernel/arch/ppc32/include/arch/barrier.h
===================================================================
--- kernel/arch/ppc32/include/arch/barrier.h	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/ppc32/include/arch/barrier.h	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -62,17 +62,5 @@
  */
 
-NO_TRACE static inline void smc_coherence(void *addr)
-{
-	asm volatile (
-	    "dcbst 0, %[addr]\n"
-	    "sync\n"
-	    "icbi 0, %[addr]\n"
-	    "sync\n"
-	    "isync\n"
-	    :: [addr] "r" (addr)
-	);
-}
-
-NO_TRACE static inline void smc_coherence_block(void *addr, unsigned int len)
+NO_TRACE static inline void smc_coherence(void *addr, unsigned int len)
 {
 	unsigned int i;
Index: kernel/arch/riscv64/include/arch/barrier.h
===================================================================
--- kernel/arch/riscv64/include/arch/barrier.h	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/riscv64/include/arch/barrier.h	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -49,6 +49,5 @@
 #ifdef KERNEL
 
-#define smc_coherence(addr)
-#define smc_coherence_block(addr, size)
+#define smc_coherence(addr, size)
 
 #endif /* KERNEL */
Index: kernel/arch/sparc64/include/arch/barrier.h
===================================================================
--- kernel/arch/sparc64/include/arch/barrier.h	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/sparc64/include/arch/barrier.h	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -116,11 +116,5 @@
 #define FLUSH_INVAL_MIN  4
 
-#define smc_coherence(a) \
-	do { \
-		write_barrier(); \
-		flush((a)); \
-	} while (0)
-
-#define smc_coherence_block(a, l) \
+#define smc_coherence(a, l) \
 	do { \
 		unsigned long i; \
@@ -133,11 +127,5 @@
 #elif defined (US3)
 
-#define smc_coherence(a) \
-	do { \
-		write_barrier(); \
-		flush_pipeline(); \
-	} while (0)
-
-#define smc_coherence_block(a, l) \
+#define smc_coherence(a, l) \
 	do { \
 		write_barrier(); \
Index: kernel/generic/src/mm/backend_elf.c
===================================================================
--- kernel/generic/src/mm/backend_elf.c	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/generic/src/mm/backend_elf.c	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -334,5 +334,5 @@
 			    PAGE_SIZE);
 			if (entry->p_flags & PF_X) {
-				smc_coherence_block((void *) kpage, PAGE_SIZE);
+				smc_coherence((void *) kpage, PAGE_SIZE);
 			}
 			km_temporary_page_put(kpage);
@@ -385,5 +385,5 @@
 		    PAGE_SIZE - pad_lo - pad_hi);
 		if (entry->p_flags & PF_X) {
-			smc_coherence_block((void *) (kpage + pad_lo),
+			smc_coherence((void *) (kpage + pad_lo),
 			    PAGE_SIZE - pad_lo - pad_hi);
 		}
Index: kernel/generic/src/synch/smc.c
===================================================================
--- kernel/generic/src/synch/smc.c	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/generic/src/synch/smc.c	(revision 231b3fd911824ee9736dc8408fcbc951c9490222)
@@ -54,5 +54,5 @@
 	}
 
-	smc_coherence_block((void *) va, size);
+	smc_coherence((void *) va, size);
 	return 0;
 }