Index: uspace/drv/bus/pci/pciintel/pci.c
===================================================================
--- uspace/drv/bus/pci/pciintel/pci.c	(revision 948911d932e23606af8586bec7e27dd956147234)
+++ uspace/drv/bus/pci/pciintel/pci.c	(revision 230385c0d03a5a1e8237576b1efe752853a3438b)
@@ -650,15 +650,23 @@
 	got_res = true;
 	
+	
+	assert(hw_resources.count > 1);
+	assert(hw_resources.resources[0].type == IO_RANGE);
+	assert(hw_resources.resources[0].res.io_range.size >= 4);
+	
+	assert(hw_resources.resources[1].type == IO_RANGE);
+	assert(hw_resources.resources[1].res.io_range.size >= 4);
+	
 	ddf_msg(LVL_DEBUG, "conf_addr = %" PRIx64 ".",
 	    hw_resources.resources[0].res.io_range.address);
-	
-	assert(hw_resources.count > 0);
-	assert(hw_resources.resources[0].type == IO_RANGE);
-	assert(hw_resources.resources[0].res.io_range.size == 8);
+	ddf_msg(LVL_DEBUG, "data_addr = %" PRIx64 ".",
+	    hw_resources.resources[1].res.io_range.address);
 	
 	bus->conf_io_addr =
 	    (uint32_t) hw_resources.resources[0].res.io_range.address;
-	
-	if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 8,
+	bus->conf_io_data =
+	    (uint32_t) hw_resources.resources[1].res.io_range.address;
+	
+	if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 4,
 	    &bus->conf_addr_port)) {
 		ddf_msg(LVL_ERROR, "Failed to enable configuration ports.");
@@ -666,5 +674,10 @@
 		goto fail;
 	}
-	bus->conf_data_port = (char *) bus->conf_addr_port + 4;
+	if (pio_enable((void *)(uintptr_t)bus->conf_io_data, 4,
+	    &bus->conf_data_port)) {
+		ddf_msg(LVL_ERROR, "Failed to enable configuration ports.");
+		rc = EADDRNOTAVAIL;
+		goto fail;
+	}
 	
 	/* Make the bus device more visible. It has no use yet. */
Index: uspace/drv/bus/pci/pciintel/pci.h
===================================================================
--- uspace/drv/bus/pci/pciintel/pci.h	(revision 948911d932e23606af8586bec7e27dd956147234)
+++ uspace/drv/bus/pci/pciintel/pci.h	(revision 230385c0d03a5a1e8237576b1efe752853a3438b)
@@ -46,4 +46,5 @@
 	ddf_dev_t *dnode;
 	uint32_t conf_io_addr;
+	uint32_t conf_io_data;
 	void *conf_data_port;
 	void *conf_addr_port;
Index: uspace/drv/infrastructure/rootpc/rootpc.c
===================================================================
--- uspace/drv/infrastructure/rootpc/rootpc.c	(revision 948911d932e23606af8586bec7e27dd956147234)
+++ uspace/drv/infrastructure/rootpc/rootpc.c	(revision 230385c0d03a5a1e8237576b1efe752853a3438b)
@@ -77,10 +77,20 @@
 };
 
-static hw_resource_t pci_conf_regs = {
-	.type = IO_RANGE,
-	.res.io_range = {
-		.address = 0xCF8,
-		.size = 8,
-		.endianness = LITTLE_ENDIAN
+static hw_resource_t pci_conf_regs[] = {
+	{
+		.type = IO_RANGE,
+		.res.io_range = {
+			.address = 0xCF8,
+			.size = 4,
+			.endianness = LITTLE_ENDIAN
+		}
+	},
+	{
+		.type = IO_RANGE,
+		.res.io_range = {
+			.address = 0xCFC,
+			.size = 4,
+			.endianness = LITTLE_ENDIAN
+		}
 	}
 };
@@ -88,6 +98,6 @@
 static rootpc_fun_t pci_data = {
 	.hw_resources = {
-		1,
-		&pci_conf_regs
+		sizeof(pci_conf_regs)/sizeof(pci_conf_regs[0]),
+		pci_conf_regs
 	}
 };