Index: kernel/arch/ia64/include/mm/page.h
===================================================================
--- kernel/arch/ia64/include/mm/page.h	(revision d99c1d2ba8c7b2c687d430f2e9fd237046606545)
+++ kernel/arch/ia64/include/mm/page.h	(revision 22c3444da12c77181be739f433e57e2eb2ec3b70)
@@ -208,5 +208,5 @@
  * @return Address of the head of VHPT collision chain.
  */
-static inline uint64_t thash(uint64_t va)
+NO_TRACE static inline uint64_t thash(uint64_t va)
 {
 	uint64_t ret;
@@ -230,5 +230,5 @@
  * @return The unique tag for VPN and RID in the collision chain returned by thash().
  */
-static inline uint64_t ttag(uint64_t va)
+NO_TRACE static inline uint64_t ttag(uint64_t va)
 {
 	uint64_t ret;
@@ -249,5 +249,5 @@
  * @return Current contents of rr[i].
  */
-static inline uint64_t rr_read(size_t i)
+NO_TRACE static inline uint64_t rr_read(size_t i)
 {
 	uint64_t ret;
@@ -269,5 +269,5 @@
  * @param v Value to be written to rr[i].
  */
-static inline void rr_write(size_t i, uint64_t v)
+NO_TRACE static inline void rr_write(size_t i, uint64_t v)
 {
 	ASSERT(i < REGION_REGISTERS);
@@ -284,5 +284,5 @@
  * @return Current value stored in PTA.
  */
-static inline uint64_t pta_read(void)
+NO_TRACE static inline uint64_t pta_read(void)
 {
 	uint64_t ret;
@@ -300,5 +300,5 @@
  * @param v New value to be stored in PTA.
  */
-static inline void pta_write(uint64_t v)
+NO_TRACE static inline void pta_write(uint64_t v)
 {
 	asm volatile (