Index: kernel/arch/amd64/include/atomic.h
===================================================================
--- kernel/arch/amd64/include/atomic.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/amd64/include/atomic.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -40,5 +40,6 @@
 #include <preemption.h>
 
-static inline void atomic_inc(atomic_t *val) {
+static inline void atomic_inc(atomic_t *val)
+{
 #ifdef CONFIG_SMP
 	asm volatile (
@@ -54,5 +55,6 @@
 }
 
-static inline void atomic_dec(atomic_t *val) {
+static inline void atomic_dec(atomic_t *val)
+{
 #ifdef CONFIG_SMP
 	asm volatile (
@@ -68,11 +70,12 @@
 }
 
-static inline long atomic_postinc(atomic_t *val) 
+static inline atomic_count_t atomic_postinc(atomic_t *val)
 {
-	long r = 1;
+	atomic_count_t r = 1;
 	
 	asm volatile (
 		"lock xaddq %[r], %[count]\n"
-		: [count] "+m" (val->count), [r] "+r" (r)
+		: [count] "+m" (val->count),
+		  [r] "+r" (r)
 	);
 	
@@ -80,11 +83,12 @@
 }
 
-static inline long atomic_postdec(atomic_t *val) 
+static inline atomic_count_t atomic_postdec(atomic_t *val)
 {
-	long r = -1;
+	atomic_count_t r = -1;
 	
 	asm volatile (
 		"lock xaddq %[r], %[count]\n"
-		: [count] "+m" (val->count), [r] "+r" (r)
+		: [count] "+m" (val->count),
+		  [r] "+r" (r)
 	);
 	
@@ -95,11 +99,13 @@
 #define atomic_predec(val)  (atomic_postdec(val) - 1)
 
-static inline uint64_t test_and_set(atomic_t *val) {
-	uint64_t v;
+static inline atomic_count_t test_and_set(atomic_t *val)
+{
+	atomic_count_t v;
 	
 	asm volatile (
 		"movq $1, %[v]\n"
 		"xchgq %[v], %[count]\n"
-		: [v] "=r" (v), [count] "+m" (val->count)
+		: [v] "=r" (v),
+		  [count] "+m" (val->count)
 	);
 	
@@ -107,9 +113,8 @@
 }
 
-
 /** amd64 specific fast spinlock */
 static inline void atomic_lock_arch(atomic_t *val)
 {
-	uint64_t tmp;
+	atomic_count_t tmp;
 	
 	preemption_disable();
@@ -125,6 +130,8 @@
 		"testq %[tmp], %[tmp]\n"
 		"jnz 0b\n"
-		: [count] "+m" (val->count), [tmp] "=&r" (tmp)
+		: [count] "+m" (val->count),
+		  [tmp] "=&r" (tmp)
 	);
+	
 	/*
 	 * Prevent critical section code from bleeding out this way up.
Index: kernel/arch/amd64/include/types.h
===================================================================
--- kernel/arch/amd64/include/types.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/amd64/include/types.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -55,4 +55,5 @@
 typedef uint64_t unative_t;
 typedef int64_t native_t;
+typedef uint64_t atomic_count_t;
 
 typedef struct {
Index: kernel/arch/arm32/include/atomic.h
===================================================================
--- kernel/arch/arm32/include/atomic.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/arm32/include/atomic.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -47,8 +47,6 @@
  *
  */
-static inline long atomic_add(atomic_t *val, int i)
+static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i)
 {
-	long ret;
-
 	/*
 	 * This implementation is for UP pre-ARMv6 systems where we do not have
@@ -57,5 +55,5 @@
 	ipl_t ipl = interrupts_disable();
 	val->count += i;
-	ret = val->count;
+	atomic_count_t ret = val->count;
 	interrupts_restore(ipl);
 	
@@ -66,4 +64,5 @@
  *
  * @param val Variable to be incremented.
+ *
  */
 static inline void atomic_inc(atomic_t *val)
@@ -75,4 +74,5 @@
  *
  * @param val Variable to be decremented.
+ *
  */
 static inline void atomic_dec(atomic_t *val) {
@@ -84,6 +84,7 @@
  * @param val Variable to be incremented.
  * @return    Value after incrementation.
+ *
  */
-static inline long atomic_preinc(atomic_t *val)
+static inline atomic_count_t atomic_preinc(atomic_t *val)
 {
 	return atomic_add(val, 1);
@@ -94,6 +95,7 @@
  * @param val Variable to be decremented.
  * @return    Value after decrementation.
+ *
  */
-static inline long atomic_predec(atomic_t *val)
+static inline atomic_count_t atomic_predec(atomic_t *val)
 {
 	return atomic_add(val, -1);
@@ -104,6 +106,7 @@
  * @param val Variable to be incremented.
  * @return    Value before incrementation.
+ *
  */
-static inline long atomic_postinc(atomic_t *val)
+static inline atomic_count_t atomic_postinc(atomic_t *val)
 {
 	return atomic_add(val, 1) - 1;
@@ -114,6 +117,7 @@
  * @param val Variable to be decremented.
  * @return    Value before decrementation.
+ *
  */
-static inline long atomic_postdec(atomic_t *val)
+static inline atomic_count_t atomic_postdec(atomic_t *val)
 {
 	return atomic_add(val, -1) + 1;
Index: kernel/arch/arm32/include/types.h
===================================================================
--- kernel/arch/arm32/include/types.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/arm32/include/types.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup arm32	
+/** @addtogroup arm32
  * @{
  */
@@ -38,7 +38,7 @@
 
 #ifndef DOXYGEN
-#	define ATTRIBUTE_PACKED __attribute__ ((packed))
+	#define ATTRIBUTE_PACKED __attribute__((packed))
 #else
-#	define ATTRIBUTE_PACKED
+	#define ATTRIBUTE_PACKED
 #endif
 
@@ -62,4 +62,5 @@
 typedef uint32_t unative_t;
 typedef int32_t native_t;
+typedef uint32_t atomic_count_t;
 
 typedef struct {
Index: kernel/arch/ia32/include/atomic.h
===================================================================
--- kernel/arch/ia32/include/atomic.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/ia32/include/atomic.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -40,5 +40,6 @@
 #include <preemption.h>
 
-static inline void atomic_inc(atomic_t *val) {
+static inline void atomic_inc(atomic_t *val)
+{
 #ifdef CONFIG_SMP
 	asm volatile (
@@ -54,5 +55,6 @@
 }
 
-static inline void atomic_dec(atomic_t *val) {
+static inline void atomic_dec(atomic_t *val)
+{
 #ifdef CONFIG_SMP
 	asm volatile (
@@ -68,11 +70,12 @@
 }
 
-static inline long atomic_postinc(atomic_t *val) 
+static inline atomic_count_t atomic_postinc(atomic_t *val)
 {
-	long r = 1;
+	atomic_count_t r = 1;
 	
 	asm volatile (
 		"lock xaddl %[r], %[count]\n"
-		: [count] "+m" (val->count), [r] "+r" (r)
+		: [count] "+m" (val->count),
+		  [r] "+r" (r)
 	);
 	
@@ -80,11 +83,12 @@
 }
 
-static inline long atomic_postdec(atomic_t *val) 
+static inline atomic_count_t atomic_postdec(atomic_t *val)
 {
-	long r = -1;
+	atomic_count_t r = -1;
 	
 	asm volatile (
 		"lock xaddl %[r], %[count]\n"
-		: [count] "+m" (val->count), [r] "+r"(r)
+		: [count] "+m" (val->count),
+		  [r] "+r" (r)
 	);
 	
@@ -95,11 +99,13 @@
 #define atomic_predec(val)  (atomic_postdec(val) - 1)
 
-static inline uint32_t test_and_set(atomic_t *val) {
-	uint32_t v;
+static inline atomic_count_t test_and_set(atomic_t *val)
+{
+	atomic_count_t v;
 	
 	asm volatile (
 		"movl $1, %[v]\n"
 		"xchgl %[v], %[count]\n"
-		: [v] "=r" (v), [count] "+m" (val->count)
+		: [v] "=r" (v),
+		  [count] "+m" (val->count)
 	);
 	
@@ -110,5 +116,5 @@
 static inline void atomic_lock_arch(atomic_t *val)
 {
-	uint32_t tmp;
+	atomic_count_t tmp;
 	
 	preemption_disable();
@@ -124,6 +130,8 @@
 		"testl %[tmp], %[tmp]\n"
 		"jnz 0b\n"
-		: [count] "+m" (val->count), [tmp] "=&r" (tmp)
+		: [count] "+m" (val->count),
+		  [tmp] "=&r" (tmp)
 	);
+	
 	/*
 	 * Prevent critical section code from bleeding out this way up.
Index: kernel/arch/ia32/include/types.h
===================================================================
--- kernel/arch/ia32/include/types.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/ia32/include/types.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -55,4 +55,5 @@
 typedef uint32_t unative_t;
 typedef int32_t native_t;
+typedef uint32_t atomic_count_t;
 
 typedef struct {
Index: kernel/arch/ia64/include/atomic.h
===================================================================
--- kernel/arch/ia64/include/atomic.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/ia64/include/atomic.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -36,8 +36,8 @@
 #define KERN_ia64_ATOMIC_H_
 
-static inline uint64_t test_and_set(atomic_t *val)
+static inline atomic_count_t test_and_set(atomic_t *val)
 {
-	uint64_t v;
-		
+	atomic_count_t v;
+	
 	asm volatile (
 		"movl %[v] = 0x1;;\n"
@@ -53,6 +53,5 @@
 {
 	do {
-		while (val->count)
-			;
+		while (val->count);
 	} while (test_and_set(val));
 }
@@ -60,5 +59,5 @@
 static inline void atomic_inc(atomic_t *val)
 {
-	long v;
+	atomic_count_t v;
 	
 	asm volatile (
@@ -71,5 +70,5 @@
 static inline void atomic_dec(atomic_t *val)
 {
-	long v;
+	atomic_count_t v;
 	
 	asm volatile (
@@ -80,7 +79,7 @@
 }
 
-static inline long atomic_preinc(atomic_t *val)
+static inline atomic_count_t atomic_preinc(atomic_t *val)
 {
-	long v;
+	atomic_count_t v;
 	
 	asm volatile (
@@ -93,7 +92,7 @@
 }
 
-static inline long atomic_predec(atomic_t *val)
+static inline atomic_count_t atomic_predec(atomic_t *val)
 {
-	long v;
+	atomic_count_t v;
 	
 	asm volatile (
@@ -106,7 +105,7 @@
 }
 
-static inline long atomic_postinc(atomic_t *val)
+static inline atomic_count_t atomic_postinc(atomic_t *val)
 {
-	long v;
+	atomic_count_t v;
 	
 	asm volatile (
@@ -119,7 +118,7 @@
 }
 
-static inline long atomic_postdec(atomic_t *val)
+static inline atomic_count_t atomic_postdec(atomic_t *val)
 {
-	long v;
+	atomic_count_t v;
 	
 	asm volatile (
Index: kernel/arch/ia64/include/types.h
===================================================================
--- kernel/arch/ia64/include/types.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/ia64/include/types.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64	
+/** @addtogroup ia64
  * @{
  */
@@ -63,4 +63,5 @@
 typedef uint64_t unative_t;
 typedef int64_t native_t;
+typedef uint64_t atomic_count_t;
 
 typedef struct {
Index: kernel/arch/mips32/include/atomic.h
===================================================================
--- kernel/arch/mips32/include/atomic.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/mips32/include/atomic.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup mips32	
+/** @addtogroup mips32
  * @{
  */
@@ -51,8 +51,10 @@
  *
  * @return Value after addition.
+ *
  */
-static inline long atomic_add(atomic_t *val, int i)
+static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i)
 {
-	long tmp, v;
+	atomic_count_t tmp;
+	atomic_count_t v;
 	
 	asm volatile (
@@ -64,6 +66,9 @@
 		"	beq %0, %4, 1b\n"   /* if the atomic operation failed, try again */
 		"	nop\n"
-		: "=&r" (tmp), "+m" (val->count), "=&r" (v)
-		: "r" (i), "i" (0)
+		: "=&r" (tmp),
+		  "+m" (val->count),
+		  "=&r" (v)
+		: "r" (i),
+		  "i" (0)
 	);
 	
@@ -71,6 +76,8 @@
 }
 
-static inline uint32_t test_and_set(atomic_t *val) {
-	uint32_t tmp, v;
+static inline atomic_count_t test_and_set(atomic_t *val)
+{
+	atomic_count_t tmp;
+	atomic_count_t v;
 	
 	asm volatile (
@@ -82,5 +89,7 @@
 		"	beqz %0, 1b\n"
 		"2:\n"
-		: "=&r" (tmp), "+m" (val->count), "=&r" (v)
+		: "=&r" (tmp),
+		  "+m" (val->count),
+		  "=&r" (v)
 		: "i" (1)
 	);
@@ -89,8 +98,8 @@
 }
 
-static inline void atomic_lock_arch(atomic_t *val) {
+static inline void atomic_lock_arch(atomic_t *val)
+{
 	do {
-		while (val->count)
-			;
+		while (val->count);
 	} while (test_and_set(val));
 }
Index: kernel/arch/mips32/include/types.h
===================================================================
--- kernel/arch/mips32/include/types.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/mips32/include/types.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup mips32	
+/** @addtogroup mips32
  * @{
  */
@@ -55,4 +55,5 @@
 typedef uint32_t unative_t;
 typedef int32_t native_t;
+typedef uint32_t atomic_count_t;
 
 typedef struct {
Index: kernel/arch/ppc32/include/atomic.h
===================================================================
--- kernel/arch/ppc32/include/atomic.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/ppc32/include/atomic.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ppc32	
+/** @addtogroup ppc32
  * @{
  */
@@ -38,6 +38,6 @@
 static inline void atomic_inc(atomic_t *val)
 {
-	long tmp;
-
+	atomic_count_t tmp;
+	
 	asm volatile (
 		"1:\n"
@@ -46,6 +46,8 @@
 		"stwcx. %0, 0, %2\n"
 		"bne- 1b"
-		: "=&r" (tmp), "=m" (val->count)
-		: "r" (&val->count), "m" (val->count)
+		: "=&r" (tmp),
+		  "=m" (val->count)
+		: "r" (&val->count),
+		  "m" (val->count)
 		: "cc"
 	);
@@ -54,19 +56,21 @@
 static inline void atomic_dec(atomic_t *val)
 {
-	long tmp;
-
+	atomic_count_t tmp;
+	
 	asm volatile (
 		"1:\n"
 		"lwarx %0, 0, %2\n"
 		"addic %0, %0, -1\n"
-		"stwcx.	%0, 0, %2\n"
+		"stwcx. %0, 0, %2\n"
 		"bne- 1b"
-		: "=&r" (tmp), "=m" (val->count)
-		: "r" (&val->count), "m" (val->count)
+		: "=&r" (tmp),
+		  "=m" (val->count)
+		: "r" (&val->count),
+		  "m" (val->count)
 		: "cc"
 	);
 }
 
-static inline long atomic_postinc(atomic_t *val)
+static inline atomic_count_t atomic_postinc(atomic_t *val)
 {
 	atomic_inc(val);
@@ -74,5 +78,5 @@
 }
 
-static inline long atomic_postdec(atomic_t *val)
+static inline atomic_count_t atomic_postdec(atomic_t *val)
 {
 	atomic_dec(val);
@@ -80,5 +84,5 @@
 }
 
-static inline long atomic_preinc(atomic_t *val)
+static inline atomic_count_t atomic_preinc(atomic_t *val)
 {
 	atomic_inc(val);
@@ -86,5 +90,5 @@
 }
 
-static inline long atomic_predec(atomic_t *val)
+static inline atomic_count_t atomic_predec(atomic_t *val)
 {
 	atomic_dec(val);
Index: kernel/arch/ppc32/include/types.h
===================================================================
--- kernel/arch/ppc32/include/types.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/ppc32/include/types.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ppc32	
+/** @addtogroup ppc32
  * @{
  */
@@ -55,4 +55,5 @@
 typedef uint32_t unative_t;
 typedef int32_t native_t;
+typedef uint32_t atomic_count_t;
 
 typedef struct {
Index: kernel/arch/sparc64/include/atomic.h
===================================================================
--- kernel/arch/sparc64/include/atomic.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/sparc64/include/atomic.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup sparc64	
+/** @addtogroup sparc64
  * @{
  */
@@ -45,40 +45,47 @@
  *
  * @param val Atomic variable.
- * @param i Signed value to be added.
+ * @param i   Signed value to be added.
  *
  * @return Value of the atomic variable as it existed before addition.
+ *
  */
-static inline long atomic_add(atomic_t *val, int i)
+static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i)
 {
-	uint64_t a, b;
-
+	atomic_count_t a;
+	atomic_count_t b;
+	
 	do {
-		volatile uintptr_t x = (uint64_t) &val->count;
-
-		a = *((uint64_t *) x);
+		volatile uintptr_t ptr = (uintptr_t) &val->count;
+		
+		a = *((atomic_count_t *) ptr);
 		b = a + i;
-		asm volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *)x)),
-		    "+r" (b) : "r" (a));
+		
+		asm volatile (
+			"casx %0, %2, %1\n"
+			: "+m" (*((atomic_count_t *) ptr)),
+		      "+r" (b)
+		    : "r" (a)
+		);
 	} while (a != b);
-
+	
 	return a;
 }
 
-static inline long atomic_preinc(atomic_t *val)
+static inline atomic_count_t atomic_preinc(atomic_t *val)
 {
 	return atomic_add(val, 1) + 1;
 }
 
-static inline long atomic_postinc(atomic_t *val)
+static inline atomic_count_t atomic_postinc(atomic_t *val)
 {
 	return atomic_add(val, 1);
 }
 
-static inline long atomic_predec(atomic_t *val)
+static inline atomic_count_t atomic_predec(atomic_t *val)
 {
 	return atomic_add(val, -1) - 1;
 }
 
-static inline long atomic_postdec(atomic_t *val)
+static inline atomic_count_t atomic_postdec(atomic_t *val)
 {
 	return atomic_add(val, -1);
@@ -95,12 +102,16 @@
 }
 
-static inline long test_and_set(atomic_t *val)
+static inline atomic_count_t test_and_set(atomic_t *val)
 {
-	uint64_t v = 1;
-	volatile uintptr_t x = (uint64_t) &val->count;
-
-	asm volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *) x)),
-	    "+r" (v) : "r" (0));
-
+	atomic_count_t v = 1;
+	volatile uintptr_t ptr = (uintptr_t) &val->count;
+	
+	asm volatile (
+		"casx %0, %2, %1\n"
+		: "+m" (*((atomic_count_t *) ptr)),
+	      "+r" (v)
+	    : "r" (0)
+	);
+	
 	return v;
 }
@@ -108,24 +119,27 @@
 static inline void atomic_lock_arch(atomic_t *val)
 {
-	uint64_t tmp1 = 1;
-	uint64_t tmp2 = 0;
-
-	volatile uintptr_t x = (uint64_t) &val->count;
-
+	atomic_count_t tmp1 = 1;
+	atomic_count_t tmp2 = 0;
+	
+	volatile uintptr_t ptr = (uintptr_t) &val->count;
+	
 	preemption_disable();
-
+	
 	asm volatile (
-	"0:\n"
-		"casx %0, %3, %1\n"
-		"brz %1, 2f\n"
-		"nop\n"
-	"1:\n"
-		"ldx %0, %2\n"
-		"brz %2, 0b\n"
-		"nop\n"
-		"ba %%xcc, 1b\n"
-		"nop\n"
-	"2:\n"
-		: "+m" (*((uint64_t *) x)), "+r" (tmp1), "+r" (tmp2) : "r" (0)
+		"0:\n"
+			"casx %0, %3, %1\n"
+			"brz %1, 2f\n"
+			"nop\n"
+		"1:\n"
+			"ldx %0, %2\n"
+			"brz %2, 0b\n"
+			"nop\n"
+			"ba %%xcc, 1b\n"
+			"nop\n"
+		"2:\n"
+		: "+m" (*((atomic_count_t *) ptr)),
+		  "+r" (tmp1),
+		  "+r" (tmp2)
+		: "r" (0)
 	);
 	
Index: kernel/arch/sparc64/include/types.h
===================================================================
--- kernel/arch/sparc64/include/types.h	(revision 81983e397478462b29f24f7beae41f423f0fb920)
+++ kernel/arch/sparc64/include/types.h	(revision 228666c006a3414de772f08f77335c546dd21aab)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup sparc64	
+/** @addtogroup sparc64
  * @{
  */
@@ -55,4 +55,5 @@
 typedef uint64_t unative_t;
 typedef int64_t native_t;
+typedef uint64_t atomic_count_t;
 
 typedef struct {
