Index: kernel/genarch/src/drivers/bcm2835/mbox.c
===================================================================
--- kernel/genarch/src/drivers/bcm2835/mbox.c	(revision a35b458e9db1ca95e679799dc7c1b12c83359ca3)
+++ kernel/genarch/src/drivers/bcm2835/mbox.c	(revision 202872234fa56c357a39df0a3cd16a73688b3ff4)
@@ -40,5 +40,6 @@
 static void mbox_write(bcm2835_mbox_t *mbox, uint8_t chan, uint32_t value)
 {
-	while (mbox->status & MBOX_STATUS_FULL) ;
+	while (mbox->status & MBOX_STATUS_FULL)
+		;
 	mbox->write = MBOX_COMPOSE(chan, value);
 }
@@ -49,5 +50,6 @@
 
 	do {
-		while (mbox->status & MBOX_STATUS_EMPTY) ;
+		while (mbox->status & MBOX_STATUS_EMPTY)
+			;
 		msg = mbox->read;
 	} while (MBOX_MSG_CHAN(msg) != chan);
@@ -69,7 +71,7 @@
 
 	mbox_write((bcm2835_mbox_t *)BCM2835_MBOX0_ADDR,
-		   MBOX_CHAN_PROP_A2V, KA2VCA((uint32_t)req));
+	    MBOX_CHAN_PROP_A2V, KA2VCA((uint32_t)req));
 	mbox_read((bcm2835_mbox_t *)BCM2835_MBOX0_ADDR,
-		  MBOX_CHAN_PROP_A2V);
+	    MBOX_CHAN_PROP_A2V);
 
 	if (req->buf_hdr.code == MBOX_PROP_CODE_RESP_OK) {
@@ -88,8 +90,8 @@
 	bcm2835_mbox_t *fb_mbox;
 	bool ret = false;
-        MBOX_BUFF_ALLOC(fb_desc, bcm2835_fb_desc_t);
+	MBOX_BUFF_ALLOC(fb_desc, bcm2835_fb_desc_t);
 
 	fb_mbox = (void *) km_map(BCM2835_MBOX0_ADDR, sizeof(bcm2835_mbox_t),
-				  PAGE_NOT_CACHEABLE);
+	    PAGE_NOT_CACHEABLE);
 
 	fb_desc->width = 640;
@@ -119,5 +121,5 @@
 
 	printf("BCM2835 framebuffer at 0x%08x (%dx%d)\n", prop->addr,
-	       prop->x, prop->y);
+	    prop->x, prop->y);
 	ret = true;
 out:
Index: kernel/genarch/src/drivers/omap/uart.c
===================================================================
--- kernel/genarch/src/drivers/omap/uart.c	(revision a35b458e9db1ca95e679799dc7c1b12c83359ca3)
+++ kernel/genarch/src/drivers/omap/uart.c	(revision 202872234fa56c357a39df0a3cd16a73688b3ff4)
@@ -43,5 +43,6 @@
 {
 	/* Wait for buffer */
-	while (uart->regs->ssr & OMAP_UART_SSR_TX_FIFO_FULL_FLAG);
+	while (uart->regs->ssr & OMAP_UART_SSR_TX_FIFO_FULL_FLAG)
+		;
 	/* Write to the outgoing fifo */
 	uart->regs->thr = b;
@@ -93,5 +94,6 @@
 	/* Soft reset the port */
 	uart->regs->sysc = OMAP_UART_SYSC_SOFTRESET_FLAG;
-	while (!(uart->regs->syss & OMAP_UART_SYSS_RESETDONE_FLAG));
+	while (!(uart->regs->syss & OMAP_UART_SYSS_RESETDONE_FLAG))
+		;
 
 	/* Disable the UART module */
Index: kernel/genarch/src/drivers/pl011/pl011.c
===================================================================
--- kernel/genarch/src/drivers/pl011/pl011.c	(revision a35b458e9db1ca95e679799dc7c1b12c83359ca3)
+++ kernel/genarch/src/drivers/pl011/pl011.c	(revision 202872234fa56c357a39df0a3cd16a73688b3ff4)
@@ -50,5 +50,5 @@
 	/* Wait for space becoming available in Tx FIFO. */
 	// TODO make pio_read accept consts pointers and remove the cast
-	while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_TXFF_FLAG) != 0)
+	while ((pio_read_32((ioport32_t *)&uart->regs->flag) & PL011_UART_FLAG_TXFF_FLAG) != 0)
 		;
 
@@ -86,5 +86,5 @@
 
 	// TODO make pio_read accept const pointers and remove the cast
-	while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_RXFE_FLAG) == 0) {
+	while ((pio_read_32((ioport32_t *)&uart->regs->flag) & PL011_UART_FLAG_RXFE_FLAG) == 0) {
 		/* We ignore all error flags here */
 		const uint8_t data = pio_read_32(&uart->regs->data);
@@ -99,15 +99,15 @@
 {
 	assert(uart);
-	uart->regs = (void*)km_map(addr, sizeof(pl011_uart_regs_t),
-				   PAGE_NOT_CACHEABLE);
+	uart->regs = (void *)km_map(addr, sizeof(pl011_uart_regs_t),
+	    PAGE_NOT_CACHEABLE);
 	assert(uart->regs);
 
 	/* Disable UART */
-	uart->regs->control &= ~ PL011_UART_CONTROL_UARTEN_FLAG;
+	uart->regs->control &= ~PL011_UART_CONTROL_UARTEN_FLAG;
 
 	/* Enable hw flow control */
 	uart->regs->control |=
-		PL011_UART_CONTROL_RTSE_FLAG |
-		PL011_UART_CONTROL_CTSE_FLAG;
+	    PL011_UART_CONTROL_RTSE_FLAG |
+	    PL011_UART_CONTROL_CTSE_FLAG;
 
 	/* Mask all interrupts */
@@ -117,7 +117,7 @@
 	/* Enable UART, TX and RX */
 	uart->regs->control |=
-		PL011_UART_CONTROL_UARTEN_FLAG |
-		PL011_UART_CONTROL_TXE_FLAG |
-		PL011_UART_CONTROL_RXE_FLAG;
+	    PL011_UART_CONTROL_UARTEN_FLAG |
+	    PL011_UART_CONTROL_TXE_FLAG |
+	    PL011_UART_CONTROL_RXE_FLAG;
 
 	outdev_initialize("pl011_uart_dev", &uart->outdev, &pl011_uart_ops);
@@ -143,6 +143,6 @@
 	/* Enable receive interrupts */
 	uart->regs->interrupt_mask |=
-		PL011_UART_INTERRUPT_RX_FLAG |
-		PL011_UART_INTERRUPT_RT_FLAG;
+	    PL011_UART_INTERRUPT_RX_FLAG |
+	    PL011_UART_INTERRUPT_RT_FLAG;
 }