Index: kernel/genarch/src/drivers/amdm37x_uart/amdm37x_uart.c
===================================================================
--- kernel/genarch/src/drivers/amdm37x_uart/amdm37x_uart.c	(revision 14f8fd4b8057885912cc5c2ed1e6ef6316a18ddb)
+++ kernel/genarch/src/drivers/amdm37x_uart/amdm37x_uart.c	(revision 1cdb412ac28e101da1795823f3d01ca7c3e0df21)
@@ -72,11 +72,10 @@
 {
 	amdm37x_uart_t *uart = irq->instance;
-//TODO enable while checking when RX FIFO is used instead of single char.
-//	while (!(uart->regs->isr2 & AMDM37x_UART_ISR2_RX_FIFO_EMPTY_FLAG)) {
+	while (!(uart->regs->isr2 & AMDM37x_UART_ISR2_RX_FIFO_EMPTY_FLAG)) {
 		const uint8_t val = uart->regs->rhr;
 		if (uart->indev && val) {
 			indev_push_character(uart->indev, val);
 		}
-//	}
+	}
 }
 
@@ -93,5 +92,6 @@
 	/* Soft reset the port */
 	uart->regs->sysc = AMDM37x_UART_SYSC_SOFTRESET_FLAG;
-	while (uart->regs->syss & AMDM37x_UART_SYSS_RESETDONE_FLAG) ;
+	while (!(uart->regs->syss & AMDM37x_UART_SYSS_RESETDONE_FLAG)) ;
+#endif
 
 	/* Enable access to EFR register */
@@ -106,9 +106,15 @@
 	/* Set default (val 0) triggers, disable DMA enable FIFOs */
 	const bool tcl_tlr = uart->regs->mcr & AMDM37x_UART_MCR_TCR_TLR_FLAG;
+	/* Enable access to tcr and tlr registers */
+	uart->regs->mcr |= AMDM37x_UART_MCR_TCR_TLR_FLAG;
+
+	/* Enable FIFOs */
 	uart->regs->fcr = AMDM37x_UART_FCR_FIFO_EN_FLAG;
 
-	/* Enable fine granularity for rx trigger */
+	/* Eneble fine granularity for RX FIFO and set trigger level to 1,
+	 * TX FIFO, trigger level is irelevant*/
 	uart->regs->lcr = 0xbf;              /* Sets config mode B */
 	uart->regs->scr = AMDM37x_UART_SCR_RX_TRIG_GRANU1_FLAG;
+	uart->regs->tlr = 1 << AMDM37x_UART_TLR_RX_FIFO_TRIG_SHIFT;
 
 	/* Restore enhanced */
@@ -117,14 +123,14 @@
 
 	uart->regs->lcr = 0x80;              /* Config mode A */
-	/* Restore tcl_lcr */
+	/* Restore tcl_lcr access flag*/
 	if (!tcl_tlr)
 		uart->regs->mcr &= ~AMDM37x_UART_MCR_TCR_TLR_FLAG;
 
-	/* Restore tcl_lcr */
+	/* Restore lcr */
 	uart->regs->lcr = lcr;
 
 	/* Disable interrupts */
 	uart->regs->ier = 0;
-#endif
+
 	/* Setup outdev */
 	outdev_initialize("amdm37x_uart_dev", &uart->outdev, &amdm37x_uart_ops);
@@ -138,5 +144,4 @@
 	uart->irq.handler = amdm37x_uart_handler;
 	uart->irq.instance = uart;
-	irq_register(&uart->irq);
 
 	return true;
@@ -148,9 +153,8 @@
 	/* Set indev */
 	uart->indev = indev;
+	/* Register interrupt. */
+	irq_register(&uart->irq);
 	/* Enable interrupt on receive */
 	uart->regs->ier |= AMDM37x_UART_IER_RHR_IRQ_FLAG;
-
-	// TODO set rx fifo
-	// TODO set rx fifo threshold to 1
 }
 
