Index: kernel/arch/mips32/include/arch/asm.h
===================================================================
--- kernel/arch/mips32/include/arch/asm.h	(revision 1433ecda9b732f3f185f902feb26826ec2496e03)
+++ kernel/arch/mips32/include/arch/asm.h	(revision 1cac8753dba1dcd1e470087cba35d1d4f93975a2)
@@ -57,7 +57,7 @@
 
 	asm volatile (
-		"and %[base], $29, %[mask]\n"
-		: [base] "=r" (base)
-		: [mask] "r" (~(STACK_SIZE - 1))
+	    "and %[base], $29, %[mask]\n"
+	    : [base] "=r" (base)
+	    : [mask] "r" (~(STACK_SIZE - 1))
 	);
 
Index: kernel/arch/mips32/include/arch/mm/tlb.h
===================================================================
--- kernel/arch/mips32/include/arch/mm/tlb.h	(revision 1433ecda9b732f3f185f902feb26826ec2496e03)
+++ kernel/arch/mips32/include/arch/mm/tlb.h	(revision 1cac8753dba1dcd1e470087cba35d1d4f93975a2)
@@ -82,5 +82,5 @@
 		unsigned : 2;       /* zero */
 #endif
-	} __attribute__ ((packed));
+	} __attribute__((packed));
 	uint32_t value;
 } entry_lo_t;
@@ -97,5 +97,5 @@
 		unsigned vpn2 : 19;
 #endif
-	} __attribute__ ((packed));
+	} __attribute__((packed));
 	uint32_t value;
 } entry_hi_t;
@@ -112,5 +112,5 @@
 		unsigned : 7;
 #endif
-	} __attribute__ ((packed));
+	} __attribute__((packed));
 	uint32_t value;
 } page_mask_t;
@@ -127,5 +127,5 @@
 		unsigned p : 1;
 #endif
-	} __attribute__ ((packed));
+	} __attribute__((packed));
 	uint32_t value;
 } tlb_index_t;