Changeset 1b20da0 in mainline for uspace/drv/nic
- Timestamp:
- 2018-02-28T17:52:03Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 3061bc1
- Parents:
- df6ded8
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:26:03)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:52:03)
- Location:
- uspace/drv/nic
- Files:
-
- 10 edited
-
ar9271/ar9271.c (modified) (1 diff)
-
ar9271/ar9271.h (modified) (2 diffs)
-
ar9271/ath_usb.c (modified) (1 diff)
-
ar9271/htc.c (modified) (1 diff)
-
ar9271/wmi.h (modified) (1 diff)
-
ne2k/ne2k.c (modified) (1 diff)
-
rtl8139/defs.h (modified) (9 diffs)
-
rtl8139/driver.c (modified) (11 diffs)
-
rtl8139/general.c (modified) (2 diffs)
-
rtl8169/driver.c (modified) (7 diffs)
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/ar9271/ar9271.c
rdf6ded8 r1b20da0 381 381 rate_msg.legacy_rates_count = ARRAY_SIZE(ieee80211bg_data_rates); 382 382 memcpy(&rate_msg.legacy_rates, 383 ieee80211bg_data_rates, 383 ieee80211bg_data_rates, 384 384 ARRAY_SIZE(ieee80211bg_data_rates)); 385 385 -
uspace/drv/nic/ar9271/ar9271.h
rdf6ded8 r1b20da0 148 148 AR9271_AGC_CONTROL = 0x9860, 149 149 AR9271_PHY_CAL = 0x9864, 150 AR9271_PHY_SYNTH_CONTROL = 0x9874, 150 AR9271_PHY_SYNTH_CONTROL = 0x9874, 151 151 AR9271_PHY_SPECTRAL_SCAN = 0x9910, 152 152 AR9271_PHY_RADAR0 = 0x9954, … … 156 156 AR9271_PHY_MODE = 0xA200, 157 157 AR9271_PHY_CCK_TX_CTRL = 0xA204, 158 AR9271_PHY_TPCRG1 = 0xA258, 158 AR9271_PHY_TPCRG1 = 0xA258, 159 159 AR9271_CARRIER_LEAK_CONTROL = 0xA358, 160 160 AR9271_ADC_CONTROL_OFF_PWDADC = 0x00008000, 161 161 AR9271_AGC_CONTROL_CALIB = 0x00000001, 162 162 AR9271_AGC_CONTROL_NF_CALIB = 0x00000002, 163 AR9271_AGC_CONTROL_NF_CALIB_EN = 0x00008000, 163 AR9271_AGC_CONTROL_NF_CALIB_EN = 0x00008000, 164 164 AR9271_AGC_CONTROL_TX_CALIB = 0x00010000, 165 165 AR9271_AGC_CONTROL_NF_NOT_UPDATE = 0x00020000, -
uspace/drv/nic/ar9271/ath_usb.c
rdf6ded8 r1b20da0 137 137 /** Send data message. 138 138 * 139 * @param ath Generic Atheros WiFi device structure. 139 * @param ath Generic Atheros WiFi device structure. 140 140 * @param buffer Buffer with data to send. 141 141 * @param buffer_size Buffer size. -
uspace/drv/nic/ar9271/htc.c
rdf6ded8 r1b20da0 320 320 ((void *) buffer + sizeof(htc_frame_header_t)); 321 321 322 config_message->message_id = 322 config_message->message_id = 323 323 host2uint16_t_be(HTC_MESSAGE_CONFIG); 324 324 /* Magic number to initialize device. */ -
uspace/drv/nic/ar9271/wmi.h
rdf6ded8 r1b20da0 29 29 /** @file wmi.h 30 30 * 31 * Definitions of the Atheros WMI protocol specified in the 31 * Definitions of the Atheros WMI protocol specified in the 32 32 * Wireless Module Interface (WMI). 33 33 * -
uspace/drv/nic/ne2k/ne2k.c
rdf6ded8 r1b20da0 68 68 { 69 69 .base = 0, 70 .size = NE2K_IO_SIZE, 70 .size = NE2K_IO_SIZE, 71 71 } 72 72 }; -
uspace/drv/nic/rtl8139/defs.h
rdf6ded8 r1b20da0 310 310 RCR_ACCEPT_MULTICAST = 1 << 2, /**< Accept multicast */ 311 311 RCR_ACCEPT_PHYS_MATCH = 1 << 1, /**< Accept device MAC address match */ 312 RCR_ACCEPT_ALL_PHYS = 1 << 0, /**< Accept all frames with 313 * phys. desticnation 312 RCR_ACCEPT_ALL_PHYS = 1 << 0, /**< Accept all frames with 313 * phys. desticnation 314 314 */ 315 315 RCR_ACCEPT_MASK = (1 << 6) - 1 /**< Mask of accept part */ … … 325 325 CS_F_LINK100 = (1 << 6), 326 326 CS_F_CONNECT = (1 << 5), 327 CS_CON_STATUS = (1 << 3), /**< connection status: 328 * 1 = valid, 0 = disconnected 327 CS_CON_STATUS = (1 << 3), /**< connection status: 328 * 1 = valid, 0 = disconnected 329 329 */ 330 330 CS_CON_STATUS_EN = (1 << 2), /**< LED1 pin connection status indication */ … … 361 361 enum rtl8139_anar { 362 362 ANAR_NEXT_PAGE = (1 << 15), /**< Next page bit, 0 - primary capability 363 * 1 - protocol specific 363 * 1 - protocol specific 364 364 */ 365 365 ANAR_ACK = (1 << 14), /**< Capability reception acknowledge */ … … 371 371 ANAR_10_FD = (1 << 6), /**< 10BASE_T full duplex */ 372 372 ANAR_10_HD = (1 << 5), /**< 10BASE_T half duplex */ 373 ANAR_SELECTOR = 0x1 /**< Selector, 373 ANAR_SELECTOR = 0x1 /**< Selector, 374 374 * CSMA/CD (0x1) supported only 375 375 */ … … 391 391 392 392 /** Descending/ascending grow of Rx/Tx FIFO (to test FIFO SRAM only) */ 393 CONFIG5_FIFO_ADDR_PTR = (1 << 3), 393 CONFIG5_FIFO_ADDR_PTR = (1 << 3), 394 394 /** Powersave if cable is disconnected */ 395 CONFIG5_LINK_DOWN_POWERSAVE = (1 << 2), 395 CONFIG5_LINK_DOWN_POWERSAVE = (1 << 2), 396 396 397 397 CONFIG5_LAN_WAKE = (1 << 1), /**< LANWake signal enabled */ … … 411 411 CONFIG4_RxFIFOAutoClr = (1 << 7), /**< Automatic RxFIFO owerflow clear */ 412 412 CONFIG4_AnaOff = (1 << 6), /**< Analog poweroff */ 413 CONFIG4_LongWF = (1 << 5), /**< Long wakeup frame 414 * (2xCRC8 + 3xCRC16) 413 CONFIG4_LongWF = (1 << 5), /**< Long wakeup frame 414 * (2xCRC8 + 3xCRC16) 415 415 */ 416 416 CONFIG4_LWPME = (1 << 4), /**< LWAKE and PMEB assertion */ … … 450 450 451 451 LOOPBACK_SHIFT = 17, /**< Loopback mode shift */ 452 LOOPBACK_SIZE = 2, /**< Loopback mode size 453 * 00 = normal, 11 = loopback 452 LOOPBACK_SIZE = 2, /**< Loopback mode size 453 * 00 = normal, 11 = loopback 454 454 */ 455 455 … … 462 462 TX_RETRY_COUNT_SIZE = 4, /**< Retries before aborting size */ 463 463 464 CLEAR_ABORT = 1 << 0 /**< Retransmit aborted frame at the last 465 * transmitted descriptor 464 CLEAR_ABORT = 1 << 0 /**< Retransmit aborted frame at the last 465 * transmitted descriptor 466 466 */ 467 467 }; … … 500 500 #define RTL8139_RXFLAGS_SIZE_64 3 501 501 502 /** Get the buffer initial size without 16B padding 502 /** Get the buffer initial size without 16B padding 503 503 * Size is (8 + 2^flags) kB (^ in mean power) 504 504 * -
uspace/drv/nic/rtl8139/driver.c
rdf6ded8 r1b20da0 154 154 uint32_t rcr = rtl8139->rcr_data.rcr_base | rtl8139->rcr_data.ucast_mask 155 155 | rtl8139->rcr_data.mcast_mask | rtl8139->rcr_data.bcast_mask 156 | rtl8139->rcr_data.defect_mask | 156 | rtl8139->rcr_data.defect_mask | 157 157 (RXBUF_SIZE_FLAGS << RCR_RBLEN_SHIFT); 158 158 … … 288 288 nic_channel_mode_t duplex, nic_role_t); 289 289 290 static errno_t rtl8139_pause_get(ddf_fun_t*, nic_result_t*, nic_result_t*, 290 static errno_t rtl8139_pause_get(ddf_fun_t*, nic_result_t*, nic_result_t*, 291 291 uint16_t *); 292 292 static errno_t rtl8139_pause_set(ddf_fun_t*, int, int, uint16_t); … … 295 295 static errno_t rtl8139_autoneg_disable(ddf_fun_t *fun); 296 296 static errno_t rtl8139_autoneg_probe(ddf_fun_t *fun, uint32_t *our_advertisement, 297 uint32_t *their_advertisement, nic_result_t *result, 297 uint32_t *their_advertisement, nic_result_t *result, 298 298 nic_result_t *their_result); 299 299 static errno_t rtl8139_autoneg_restart(ddf_fun_t *fun); … … 501 501 * @param rtl8139 controller private data 502 502 */ 503 static void rtl8139_rx_reset(rtl8139_t *rtl8139) 503 static void rtl8139_rx_reset(rtl8139_t *rtl8139) 504 504 { 505 505 /* Disable receiver, update offset and enable receiver again */ … … 511 511 write_barrier(); 512 512 pio_write_32(rtl8139->io_port + CAPR, 0); 513 pio_write_32(rtl8139->io_port + RBSTART, 513 pio_write_32(rtl8139->io_port + RBSTART, 514 514 PTR2U32(rtl8139->rx_buff_phys)); 515 515 … … 680 680 while (tx_used != tx_next) { 681 681 size_t desc_to_check = tx_used % TX_BUFF_COUNT; 682 void * tsd_to_check = rtl8139->io_port + TSD0 682 void * tsd_to_check = rtl8139->io_port + TSD0 683 683 + desc_to_check * sizeof(uint32_t); 684 684 uint32_t tsd_value = pio_read_32(tsd_to_check); … … 1386 1386 1387 1387 if (rtl8139->hw_version < RTL8139_VER_COUNT) { 1388 str_cpy(info->model_name, NIC_MODEL_MAX_LENGTH, 1388 str_cpy(info->model_name, NIC_MODEL_MAX_LENGTH, 1389 1389 model_names[rtl8139->hw_version]); 1390 1390 } else { … … 1465 1465 }; 1466 1466 1467 /** Check if pause frame operations are valid in current situation 1467 /** Check if pause frame operations are valid in current situation 1468 1468 * 1469 1469 * @param rtl8139 RTL8139 private structure … … 1502 1502 * @return EOK if succeed 1503 1503 */ 1504 static errno_t rtl8139_pause_get(ddf_fun_t *fun, nic_result_t *we_send, 1504 static errno_t rtl8139_pause_get(ddf_fun_t *fun, nic_result_t *we_send, 1505 1505 nic_result_t *we_receive, uint16_t *time) 1506 1506 { … … 1537 1537 * @return EOK if succeed, INVAL if the pause frame has no sence 1538 1538 */ 1539 static errno_t rtl8139_pause_set(ddf_fun_t *fun, int allow_send, int allow_receive, 1539 static errno_t rtl8139_pause_set(ddf_fun_t *fun, int allow_send, int allow_receive, 1540 1540 uint16_t time) 1541 1541 { … … 2091 2091 rtl8139->int_mask = INT_TIME_OUT; 2092 2092 2093 /* Force timer interrupt start be writing nonzero value to timer 2093 /* Force timer interrupt start be writing nonzero value to timer 2094 2094 * interrutp register (should be small to prevent big delay) 2095 2095 * Read TCTR to reset timer counter -
uspace/drv/nic/rtl8139/general.c
rdf6ded8 r1b20da0 72 72 } 73 73 74 /** Initialize the timer register structures 74 /** Initialize the timer register structures 75 75 * 76 * The structure will be initialized to the state that the first call of 76 * The structure will be initialized to the state that the first call of 77 77 * rtl8139_timer_act_step function will be the period expiration 78 78 * … … 84 84 */ 85 85 errno_t rtl8139_timer_act_init(rtl8139_timer_act_t * ta, uint32_t timer_freq, 86 const struct timeval *time) 86 const struct timeval *time) 87 87 { 88 88 if (!ta || timer_freq == 0 || !time) -
uspace/drv/nic/rtl8169/driver.c
rdf6ded8 r1b20da0 59 59 static errno_t rtl8169_set_operation_mode(ddf_fun_t *fun, int speed, 60 60 nic_channel_mode_t duplex, nic_role_t role); 61 static errno_t rtl8169_pause_get(ddf_fun_t *fun, nic_result_t *we_send, 61 static errno_t rtl8169_pause_get(ddf_fun_t *fun, nic_result_t *we_send, 62 62 nic_result_t *we_receive, uint16_t *time); 63 static errno_t rtl8169_pause_set(ddf_fun_t *fun, int allow_send, int allow_receive, 63 static errno_t rtl8169_pause_set(ddf_fun_t *fun, int allow_send, int allow_receive, 64 64 uint16_t time); 65 65 static errno_t rtl8169_autoneg_enable(ddf_fun_t *fun, uint32_t advertisement); … … 237 237 /* Allocate TX ring */ 238 238 rtl8169->tx_ring = AS_AREA_ANY; 239 rc = dmamem_map_anonymous(TX_RING_SIZE, DMAMEM_4GiB, 239 rc = dmamem_map_anonymous(TX_RING_SIZE, DMAMEM_4GiB, 240 240 AS_AREA_READ | AS_AREA_WRITE, 0, &rtl8169->tx_ring_phys, 241 241 (void **)&rtl8169->tx_ring); … … 251 251 /* Allocate RX ring */ 252 252 rtl8169->rx_ring = AS_AREA_ANY; 253 rc = dmamem_map_anonymous(RX_RING_SIZE, DMAMEM_4GiB, 253 rc = dmamem_map_anonymous(RX_RING_SIZE, DMAMEM_4GiB, 254 254 AS_AREA_READ | AS_AREA_WRITE, 0, &rtl8169->rx_ring_phys, 255 255 (void **)&rtl8169->rx_ring); … … 265 265 /* Allocate TX buffers */ 266 266 rtl8169->tx_buff = AS_AREA_ANY; 267 rc = dmamem_map_anonymous(TX_BUFFERS_SIZE, DMAMEM_4GiB, 267 rc = dmamem_map_anonymous(TX_BUFFERS_SIZE, DMAMEM_4GiB, 268 268 AS_AREA_READ | AS_AREA_WRITE, 0, &rtl8169->tx_buff_phys, 269 269 &rtl8169->tx_buff); … … 277 277 /* Allocate RX buffers */ 278 278 rtl8169->rx_buff = AS_AREA_ANY; 279 rc = dmamem_map_anonymous(RX_BUFFERS_SIZE, DMAMEM_4GiB, 279 rc = dmamem_map_anonymous(RX_BUFFERS_SIZE, DMAMEM_4GiB, 280 280 AS_AREA_READ | AS_AREA_WRITE, 0, &rtl8169->rx_buff_phys, 281 281 &rtl8169->rx_buff); … … 594 594 } 595 595 596 static errno_t rtl8169_pause_get(ddf_fun_t *fun, nic_result_t *we_send, 596 static errno_t rtl8169_pause_get(ddf_fun_t *fun, nic_result_t *we_send, 597 597 nic_result_t *we_receive, uint16_t *time) 598 598 { … … 600 600 } 601 601 602 static errno_t rtl8169_pause_set(ddf_fun_t *fun, int allow_send, int allow_receive, 602 static errno_t rtl8169_pause_set(ddf_fun_t *fun, int allow_send, int allow_receive, 603 603 uint16_t time) 604 604 {
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