Index: kernel/arch/ia64/include/arch/barrier.h
===================================================================
--- kernel/arch/ia64/include/arch/barrier.h	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/barrier.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64	
+/** @addtogroup ia64
  * @{
  */
@@ -52,5 +52,5 @@
 
 #define fc_i(a)			\
-	asm volatile ("fc.i %0\n" :: "r" ((a)) : "memory")  
+	asm volatile ("fc.i %0\n" :: "r" ((a)) : "memory")
 #define sync_i()		\
 	asm volatile (";; sync.i\n" ::: "memory")
Index: kernel/arch/ia64/include/arch/context_struct.ag
===================================================================
--- kernel/arch/ia64/include/arch/context_struct.ag	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/context_struct.ag	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -1,3 +1,3 @@
-# Copyright (c) 2014 Jakub Jermar 
+# Copyright (c) 2014 Jakub Jermar
 # All rights reserved.
 #
Index: kernel/arch/ia64/include/arch/drivers/it.h
===================================================================
--- kernel/arch/ia64/include/arch/drivers/it.h	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/drivers/it.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64	
+/** @addtogroup ia64
  * @{
  */
Index: kernel/arch/ia64/include/arch/drivers/kbd.h
===================================================================
--- kernel/arch/ia64/include/arch/drivers/kbd.h	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/drivers/kbd.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia6464	
+/** @addtogroup ia6464
  * @{
  */
Index: kernel/arch/ia64/include/arch/fpu_context.h
===================================================================
--- kernel/arch/ia64/include/arch/fpu_context.h	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/fpu_context.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64	
+/** @addtogroup ia64
  * @{
  */
Index: kernel/arch/ia64/include/arch/interrupt.h
===================================================================
--- kernel/arch/ia64/include/arch/interrupt.h	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/interrupt.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -58,5 +58,5 @@
 #define INR_COUNT  256
 
-#define IVT_ITEMS  128 
+#define IVT_ITEMS  128
 #define IVT_FIRST  0
 
Index: kernel/arch/ia64/include/arch/istate_struct.ag
===================================================================
--- kernel/arch/ia64/include/arch/istate_struct.ag	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/istate_struct.ag	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -1,3 +1,3 @@
-# Copyright (c) 2014 Jakub Jermar 
+# Copyright (c) 2014 Jakub Jermar
 # All rights reserved.
 #
Index: kernel/arch/ia64/include/arch/legacyio.h
===================================================================
--- kernel/arch/ia64/include/arch/legacyio.h	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/legacyio.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -41,5 +41,5 @@
 
 /* Legacy I/O space - static uspace address, FIXME */
-#define LEGACYIO_USER_BASE	0x0001000000000000ULL 
+#define LEGACYIO_USER_BASE	0x0001000000000000ULL
 
 #define LEGACYIO_PAGE_WIDTH		26	/* 64M */
Index: kernel/arch/ia64/include/arch/mm/asid.h
===================================================================
--- kernel/arch/ia64/include/arch/mm/asid.h	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/mm/asid.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64mm	
+/** @addtogroup ia64mm
  * @{
  */
@@ -48,5 +48,5 @@
  * Number of ia64 RIDs (Region Identifiers) per kernel ASID.
  * Note that some architectures may support more bits,
- * but those extra bits are not used by the kernel. 
+ * but those extra bits are not used by the kernel.
  */
 #define RIDS_PER_ASID		8
Index: kernel/arch/ia64/include/arch/mm/vhpt.h
===================================================================
--- kernel/arch/ia64/include/arch/mm/vhpt.h	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/mm/vhpt.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64mm	
+/** @addtogroup ia64mm
  * @{
  */
@@ -41,5 +41,5 @@
 uintptr_t vhpt_set_up(void);
 
-static inline vhpt_entry_t tlb_entry_t2vhpt_entry_t(tlb_entry_t tentry) 
+static inline vhpt_entry_t tlb_entry_t2vhpt_entry_t(tlb_entry_t tentry)
 {
 	vhpt_entry_t ventry;
Index: kernel/arch/ia64/include/arch/pal/pal.h
===================================================================
--- kernel/arch/ia64/include/arch/pal/pal.h	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/pal/pal.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64	
+/** @addtogroup ia64
  * @{
  */
Index: kernel/arch/ia64/include/arch/stack.h
===================================================================
--- kernel/arch/ia64/include/arch/stack.h	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/include/arch/stack.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64	
+/** @addtogroup ia64
  * @{
  */
Index: kernel/arch/ia64/src/asm.S
===================================================================
--- kernel/arch/ia64/src/asm.S	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/src/asm.S	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -65,5 +65,5 @@
 	1:
 	
-		add r14 = r16, in1 
+		add r14 = r16, in1
 		add r15 = r16, in0
 		adds r17 = 1, r17 ;;
@@ -113,5 +113,5 @@
 		add in0 = r14, in0
 		adds r15 = -1, r15
-		add r17 = r14, in1 
+		add r17 = r14, in1
 		(p6) br.cond.dpnt 2b ;;
 		mov ar.lc = r15
Index: kernel/arch/ia64/src/context.S
===================================================================
--- kernel/arch/ia64/src/context.S	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/src/context.S	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -44,5 +44,5 @@
 	 */
 	flushrs
-	mov loc4 = ar.bsp	
+	mov loc4 = ar.bsp
 	
 	/*
@@ -240,5 +240,5 @@
 	ld8 loc6 = [loc15]	/* load ar.lc */
 	
-	.auto	
+	.auto
 
 	/*
@@ -286,5 +286,5 @@
 	ld8.fill r13 = [loc22] ;;
 
-	/* 
+	/*
 	 * Restore branch registers
 	 */
Index: kernel/arch/ia64/src/fpu_context.c
===================================================================
--- kernel/arch/ia64/src/fpu_context.c	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/src/fpu_context.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64	
+/** @addtogroup ia64
  * @{
  */
@@ -71,5 +71,5 @@
 		"stf.spill %[f60] = f60\n"
 		"stf.spill %[f61] = f61\n"
-		: 
+		:
 		[f32] "=m" (fctx->fr[0]),
 		[f33] "=m" (fctx->fr[1]),
@@ -102,5 +102,5 @@
 		[f60] "=m" (fctx->fr[28]),
 		[f61] "=m" (fctx->fr[29])
-	); 
+	);
 	
 	asm volatile (
@@ -313,5 +313,5 @@
 		[f60] "m" (fctx->fr[28]),
 		[f61] "m" (fctx->fr[29])
-	); 
+	);
 	
 	asm volatile (
Index: kernel/arch/ia64/src/ia64.c
===================================================================
--- kernel/arch/ia64/src/ia64.c	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/src/ia64.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -114,5 +114,5 @@
 	myeid = ia64_get_cpu_eid();
 
-	for (i = 0; i < 16; i++) { 
+	for (i = 0; i < 16; i++) {
 		if (i == 2)
 			continue;	 /* Disable Cascade interrupt */
@@ -140,5 +140,5 @@
 		irq_init(INR_COUNT, INR_COUNT);
 	}
-	it_init();	
+	it_init();
 }
 
Index: kernel/arch/ia64/src/interrupt.c
===================================================================
--- kernel/arch/ia64/src/interrupt.c	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/src/interrupt.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -320,5 +320,5 @@
 	    vector_to_string(EXC_INST_A_BIT_FAULT), true,
 	    instruction_access_bit_fault);
-	exc_register(EXC_DATA_A_BIT_FAULT, 
+	exc_register(EXC_DATA_A_BIT_FAULT,
 	    vector_to_string(EXC_DATA_A_BIT_FAULT), true,
 	    data_access_bit_fault);
Index: kernel/arch/ia64/src/ivt.S
===================================================================
--- kernel/arch/ia64/src/ivt.S	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/src/ivt.S	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -48,5 +48,5 @@
 
 /* Speculation vector handler */
-.macro SPECULATION_VECTOR_HANDLER vector 
+.macro SPECULATION_VECTOR_HANDLER vector
     .org ivt + \vector * 0x100
 
@@ -111,5 +111,5 @@
 	/* Set up FPU as in interrupted context. */
 	mov r24 = psr
-	mov r25 = cr.ipsr 
+	mov r25 = cr.ipsr
 	mov r26 = PSR_DFH_MASK
 	mov r27 = ~PSR_DFH_MASK ;;
@@ -175,5 +175,5 @@
 (p6)	st8 [r31] = r38, -STACK_ITEM_SIZE ;;	/* save in6 */
 (p6)	st8 [r31] = r37, -STACK_ITEM_SIZE ;;	/* save in5 */
-(p6)	st8 [r31] = r36, -STACK_ITEM_SIZE ;;	/* save in4 */	
+(p6)	st8 [r31] = r36, -STACK_ITEM_SIZE ;;	/* save in4 */
 (p6)	st8 [r31] = r35, -STACK_ITEM_SIZE ;;	/* save in3 */
 (p6) 	st8 [r31] = r34, -STACK_ITEM_SIZE ;;	/* save in2 */
@@ -182,5 +182,5 @@
 (p5)	add r31 = -(7 * STACK_ITEM_SIZE), r31 ;;
     
-	st8 [r31] = r30, -STACK_ITEM_SIZE ;;	/* save old stack pointer */ 
+	st8 [r31] = r30, -STACK_ITEM_SIZE ;;	/* save old stack pointer */
 	
 	st8 [r31] = r29, -STACK_ITEM_SIZE ;;	/* save predicate registers */
@@ -250,5 +250,5 @@
 	mov r24 = ar.rsc ;;
 	and r30 = ~3, r24 ;;
-	or  r24 = r30 , r27 ;;     
+	or  r24 = r30 , r27 ;;
 	mov ar.rsc = r24 ;;		/* place RSE in enforced lazy mode */
 
@@ -264,10 +264,10 @@
 
 	mov ar.pfs = r25		/* (step 6) */
-	mov cr.ifs = r26	
+	mov cr.ifs = r26
 
 	mov ar.rsc = r24		/* (step 7) */
 
     /* 17. restore interruption state from memory stack */
-	ld8 r28 = [r31], +STACK_ITEM_SIZE ;;	/* load cr.ifa */		
+	ld8 r28 = [r31], +STACK_ITEM_SIZE ;;	/* load cr.ifa */
 	ld8 r27 = [r31], +STACK_ITEM_SIZE ;;	/* load cr.isr */
 	ld8 r26 = [r31], +STACK_ITEM_SIZE ;;	/* load cr.iipa */
@@ -294,5 +294,5 @@
 	
     /* 19. return from interruption */
-    	ld8 r12 = [r31]				/* load stack pointer */ 
+    	ld8 r12 = [r31]				/* load stack pointer */
 	rfi ;;
 
@@ -391,5 +391,5 @@
 	stf.spill [r31] = f15, 8 * FLOAT_ITEM_SIZE ;;
 
-	stf.spill [r24] = f16, 8 * FLOAT_ITEM_SIZE 
+	stf.spill [r24] = f16, 8 * FLOAT_ITEM_SIZE
 	stf.spill [r25] = f17, 8 * FLOAT_ITEM_SIZE
 	stf.spill [r26] = f18, 8 * FLOAT_ITEM_SIZE
@@ -503,5 +503,5 @@
 	mov r24 = loc39
 	mov r25 = loc40
-	mov r26 = loc41 
+	mov r26 = loc41
 	mov r27 = loc42
 	mov r28 = loc43
@@ -575,5 +575,5 @@
 	HEAVYWEIGHT_HANDLER 0x5b
 	HEAVYWEIGHT_HANDLER 0x5c
-	HEAVYWEIGHT_HANDLER 0x5d 
+	HEAVYWEIGHT_HANDLER 0x5d
 	HEAVYWEIGHT_HANDLER 0x5e
 	HEAVYWEIGHT_HANDLER 0x5f
Index: kernel/arch/ia64/src/mm/km.c
===================================================================
--- kernel/arch/ia64/src/mm/km.c	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/src/mm/km.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -40,5 +40,5 @@
 {
 	config.identity_base = KM_IA64_IDENTITY_START;
-	config.identity_size = KM_IA64_IDENTITY_SIZE;	
+	config.identity_size = KM_IA64_IDENTITY_SIZE;
 }
 
Index: kernel/arch/ia64/src/mm/page.c
===================================================================
--- kernel/arch/ia64/src/mm/page.c	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/src/mm/page.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -85,5 +85,5 @@
 	}
 
-#ifdef CONFIG_VHPT	
+#ifdef CONFIG_VHPT
 	vhpt_base = vhpt_set_up();
 #endif
@@ -193,5 +193,5 @@
 	srlz_d();
 
-	return match;		
+	return match;
 }
 
@@ -247,5 +247,5 @@
 	v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
 	v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
-	v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0; 
+	v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
 	v->present.ppn = frame >> PPN_SHIFT;
 	v->present.ed = false;  /* exception not deffered */
Index: kernel/arch/ia64/src/mm/tlb.c
===================================================================
--- kernel/arch/ia64/src/mm/tlb.c	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/src/mm/tlb.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -593,5 +593,5 @@
 		if (va < end_of_identity) {
 			/*
-			 * Create kernel identity mapping for low memory. 
+			 * Create kernel identity mapping for low memory.
 			 */
 			dtlb_kernel_mapping_insert(va, KA2PA(va), false, 0);
Index: kernel/arch/ia64/src/start.S
===================================================================
--- kernel/arch/ia64/src/start.S	(revision 38b0ae2913b97fd6187fb83fbd73a39c7517ae23)
+++ kernel/arch/ia64/src/start.S	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -122,7 +122,7 @@
 	# (i.e. location of interruption vector table)
 	#
-	movl r8 = ivt ;; 
+	movl r8 = ivt ;;
 	mov cr.iva = r8
-	srlz.d ;;	
+	srlz.d ;;
 
 	
