Index: kernel/arch/arm32/include/arch/asm.h
===================================================================
--- kernel/arch/arm32/include/arch/asm.h	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/include/arch/asm.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -107,5 +107,5 @@
 	
 	asm volatile (
-		"and %[v], sp, %[size]\n" 
+		"and %[v], sp, %[size]\n"
 		: [v] "=r" (v)
 		: [size] "r" (~(STACK_SIZE - 1))
Index: kernel/arch/arm32/include/arch/barrier.h
===================================================================
--- kernel/arch/arm32/include/arch/barrier.h	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/include/arch/barrier.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -78,5 +78,5 @@
 #define memory_barrier()  CP15DSB_write(0)
 #endif
-#define read_barrier()    CP15DSB_write(0) 
+#define read_barrier()    CP15DSB_write(0)
 #define write_barrier()   read_barrier()
 #if defined(PROCESSOR_ARCH_armv6) || defined(PROCESSOR_ARCH_armv7_a)
Index: kernel/arch/arm32/include/arch/context_struct.ag
===================================================================
--- kernel/arch/arm32/include/arch/context_struct.ag	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/include/arch/context_struct.ag	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -1,3 +1,3 @@
-# Copyright (c) 2014 Jakub Jermar 
+# Copyright (c) 2014 Jakub Jermar
 # All rights reserved.
 #
Index: kernel/arch/arm32/include/arch/fpu_context.h
===================================================================
--- kernel/arch/arm32/include/arch/fpu_context.h	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/include/arch/fpu_context.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup arm32	
+/** @addtogroup arm32
  * @{
  */
Index: kernel/arch/arm32/include/arch/istate_struct.ag
===================================================================
--- kernel/arch/arm32/include/arch/istate_struct.ag	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/include/arch/istate_struct.ag	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -1,3 +1,3 @@
-# Copyright (c) 2014 Jakub Jermar 
+# Copyright (c) 2014 Jakub Jermar
 # All rights reserved.
 #
Index: kernel/arch/arm32/include/arch/mm/as.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/as.h	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/include/arch/mm/as.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup arm32mm	
+/** @addtogroup arm32mm
  * @{
  */
Index: kernel/arch/arm32/include/arch/mm/asid.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/asid.h	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/include/arch/mm/asid.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup arm32mm	
+/** @addtogroup arm32mm
  * @{
  */
@@ -51,5 +51,5 @@
 #define asid_get()		(ASID_START + 1)
 
-#define asid_put(asid) 
+#define asid_put(asid)
 
 #endif
Index: kernel/arch/arm32/include/arch/stack.h
===================================================================
--- kernel/arch/arm32/include/arch/stack.h	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/include/arch/stack.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup arm32	
+/** @addtogroup arm32
  * @{
  */
Index: kernel/arch/arm32/src/atomic.c
===================================================================
--- kernel/arch/arm32/src/atomic.c	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/src/atomic.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -46,5 +46,5 @@
 void * __sync_val_compare_and_swap_4(void **ptr, void *expected, void *new_val)
 {
-	/* 
+	/*
 	 * Using an interrupt disabling spinlock might still lead to deadlock
 	 * if CAS() is used in an exception handler. Eg. if a CAS() results
Index: kernel/arch/arm32/src/context.S
===================================================================
--- kernel/arch/arm32/src/context.S	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/src/context.S	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -29,5 +29,5 @@
 #include <abi/asmtool.h>
 
-.text   
+.text
 
 FUNCTION_BEGIN(context_save_arch)
Index: kernel/arch/arm32/src/exc_handler.S
===================================================================
--- kernel/arch/arm32/src/exc_handler.S	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/src/exc_handler.S	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -29,5 +29,5 @@
 #include <abi/asmtool.h>
 
-.text   
+.text
 
 # Switches to kernel stack and saves all registers there.
Index: kernel/arch/arm32/src/interrupt.c
===================================================================
--- kernel/arch/arm32/src/interrupt.c	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/src/interrupt.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -73,5 +73,5 @@
 {
 	current_status_reg_control_write(
-	    (current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) | 
+	    (current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) |
 	    (ipl & STATUS_REG_IRQ_DISABLED_BIT));
 }
Index: kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
===================================================================
--- kernel/arch/arm32/src/mach/integratorcp/integratorcp.c	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/src/mach/integratorcp/integratorcp.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -113,5 +113,5 @@
 
 /** Masks interrupt.
- * 
+ *
  * @param irq interrupt number
  */
@@ -123,5 +123,5 @@
 
 /** Unmasks interrupt.
- * 
+ *
  * @param irq interrupt number
  */
Index: kernel/arch/arm32/src/mm/as.c
===================================================================
--- kernel/arch/arm32/src/mm/as.c	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/src/mm/as.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -43,5 +43,5 @@
 
 /** Architecture dependent address space init.
- *  
+ *
  *  Since ARM supports page tables, #as_pt_operations are used.
  */
Index: kernel/arch/arm32/src/mm/tlb.c
===================================================================
--- kernel/arch/arm32/src/mm/tlb.c	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/src/mm/tlb.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup arm32mm	
+/** @addtogroup arm32mm
  * @{
  */
Index: kernel/arch/arm32/src/ras.c
===================================================================
--- kernel/arch/arm32/src/ras.c	(revision fec0240ef06fc1a62210bc1e0e106291c3ed64fb)
+++ kernel/arch/arm32/src/ras.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
@@ -59,5 +59,5 @@
 	    PAGE_SIZE, PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);
 	
-	memsetb(ras_page, PAGE_SIZE, 0); 
+	memsetb(ras_page, PAGE_SIZE, 0);
 	ras_page[RAS_START] = 0;
 	ras_page[RAS_END] = 0xffffffff;