Index: kernel/arch/ppc32/src/mm/tlb.c
===================================================================
--- kernel/arch/ppc32/src/mm/tlb.c	(revision a35b458e9db1ca95e679799dc7c1b12c83359ca3)
+++ kernel/arch/ppc32/src/mm/tlb.c	(revision 1abcf1db7c2a8071caaf9983f1571b2ef88e1be6)
@@ -44,10 +44,10 @@
 
 	asm volatile (
-		"mfspr %[tlbmiss], 980\n"
-		"mfspr %[ptehi], 981\n"
-		"mfspr %[ptelo], 982\n"
-		: [tlbmiss] "=r" (tlbmiss),
-		  [ptehi] "=r" (ptehi),
-		  [ptelo] "=r" (ptelo)
+	    "mfspr %[tlbmiss], 980\n"
+	    "mfspr %[ptehi], 981\n"
+	    "mfspr %[ptelo], 982\n"
+	    : [tlbmiss] "=r" (tlbmiss),
+	      [ptehi] "=r" (ptehi),
+	      [ptelo] "=r" (ptelo)
 	);
 
@@ -64,11 +64,11 @@
 	uint32_t index = 0;
 	asm volatile (
-		"mtspr 981, %[ptehi]\n"
-		"mtspr 982, %[ptelo]\n"
-		"tlbld %[index]\n"
-		"tlbli %[index]\n"
-		: [index] "=r" (index)
-		: [ptehi] "r" (ptehi),
-		  [ptelo] "r" (ptelo)
+	    "mtspr 981, %[ptehi]\n"
+	    "mtspr 982, %[ptelo]\n"
+	    "tlbld %[index]\n"
+	    "tlbli %[index]\n"
+	    : [index] "=r" (index)
+	    : [ptehi] "r" (ptehi),
+	      [ptelo] "r" (ptelo)
 	);
 }
@@ -82,18 +82,18 @@
 {
 	asm volatile (
-		"sync\n"
+	    "sync\n"
 	);
 
 	for (unsigned int i = 0; i < 0x00040000; i += 0x00001000) {
 		asm volatile (
-			"tlbie %[i]\n"
-			:: [i] "r" (i)
+		    "tlbie %[i]\n"
+		    :: [i] "r" (i)
 		);
 	}
 
 	asm volatile (
-		"eieio\n"
-		"tlbsync\n"
-		"sync\n"
+	    "eieio\n"
+	    "tlbsync\n"
+	    "sync\n"
 	);
 }