Index: kernel/arch/arm32/src/cpu/cpu.c
===================================================================
--- kernel/arch/arm32/src/cpu/cpu.c	(revision 904814776fa1f5c5e2e62cdf2515e241c35dcf1b)
+++ kernel/arch/arm32/src/cpu/cpu.c	(revision 1a2a6e7fe539dc0c3c10afeaf20a054d6132d99a)
@@ -322,5 +322,33 @@
 void icache_invalidate(void)
 {
+#if defined(PROCESSOR_ARCH_armv7_a)
 	ICIALLU_write(0);
+#else
+	ICIALL_write(0);
+#endif
+}
+
+#if !defined(PROCESSOR_ARCH_armv7_a)
+static bool cache_is_unified(void)
+{
+	if (MIDR_read() != CTR_read()) {
+		/* We have the CTR register */
+		return (CTR_read() & CTR_SEP_FLAG) != CTR_SEP_FLAG;
+	} else {
+		panic("Unknown cache type");
+	}
+}
+#endif
+
+void dcache_clean_mva_pou(uintptr_t mva)
+{
+#if defined(PROCESSOR_ARCH_armv7_a)
+	DCCMVAU_write(mva);
+#else
+	if (cache_is_unified())
+		CCMVA_write(mva);
+	else
+		DCCMVA_write(mva);
+#endif
 }