Changeset 19b3cc6 in mainline for kernel/genarch/src/drivers/pl011/pl011.c
- Timestamp:
- 2014-01-17T23:12:10Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e26a9d95
- Parents:
- fddffb2 (diff), facc34d (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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links above to see all the changes relative to each parent. - File:
-
- 1 moved
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kernel/genarch/src/drivers/pl011/pl011.c
rfddffb2 r19b3cc6 32 32 /** 33 33 * @file 34 * @brief ARM 926 on-chip UART (PrimeCell UART, PL011)driver.34 * @brief ARM PrimeCell PL011 UART driver. 35 35 */ 36 36 37 #include <genarch/drivers/ arm926_uart/arm926_uart.h>37 #include <genarch/drivers/pl011/pl011.h> 38 38 #include <console/chardev.h> 39 39 #include <console/console.h> … … 46 46 #include <str.h> 47 47 48 static void arm926_uart_sendb(arm926_uart_t *uart, uint8_t byte)48 static void pl011_uart_sendb(pl011_uart_t *uart, uint8_t byte) 49 49 { 50 50 /* Wait for space becoming available in Tx FIFO. */ 51 51 // TODO make pio_read accept consts pointers and remove the cast 52 while ((pio_read_32((ioport32_t*)&uart->regs->flag) & ARM926_UART_FLAG_TXFF_FLAG) != 0)52 while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_TXFF_FLAG) != 0) 53 53 ; 54 54 … … 56 56 } 57 57 58 static void arm926_uart_putchar(outdev_t *dev, wchar_t ch)58 static void pl011_uart_putchar(outdev_t *dev, wchar_t ch) 59 59 { 60 arm926_uart_t *uart = dev->data;60 pl011_uart_t *uart = dev->data; 61 61 62 62 if (!ascii_check(ch)) { 63 arm926_uart_sendb(uart, U_SPECIAL);63 pl011_uart_sendb(uart, U_SPECIAL); 64 64 } else { 65 65 if (ch == '\n') 66 arm926_uart_sendb(uart, (uint8_t) '\r');67 arm926_uart_sendb(uart, (uint8_t) ch);66 pl011_uart_sendb(uart, (uint8_t) '\r'); 67 pl011_uart_sendb(uart, (uint8_t) ch); 68 68 } 69 69 } 70 70 71 static outdev_operations_t arm926_uart_ops = {72 .write = arm926_uart_putchar,71 static outdev_operations_t pl011_uart_ops = { 72 .write = pl011_uart_putchar, 73 73 .redraw = NULL, 74 74 }; 75 75 76 static irq_ownership_t arm926_uart_claim(irq_t *irq)76 static irq_ownership_t pl011_uart_claim(irq_t *irq) 77 77 { 78 78 return IRQ_ACCEPT; 79 79 } 80 80 81 static void arm926_uart_irq_handler(irq_t *irq)81 static void pl011_uart_irq_handler(irq_t *irq) 82 82 { 83 arm926_uart_t *uart = irq->instance;83 pl011_uart_t *uart = irq->instance; 84 84 85 85 // TODO make pio_read accept const pointers and remove the cast 86 while ((pio_read_32((ioport32_t*)&uart->regs->flag) & ARM926_UART_FLAG_RXFE_FLAG) == 0) {86 while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_RXFE_FLAG) == 0) { 87 87 /* We ignore all error flags here */ 88 88 const uint8_t data = pio_read_32(&uart->regs->data); … … 91 91 } 92 92 /* Ack interrupts */ 93 pio_write_32(&uart->regs->interrupt_clear, ARM926_UART_INTERRUPT_ALL);93 pio_write_32(&uart->regs->interrupt_clear, PL011_UART_INTERRUPT_ALL); 94 94 } 95 95 96 bool arm926_uart_init( 97 arm926_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size) 96 bool pl011_uart_init(pl011_uart_t *uart, inr_t interrupt, uintptr_t addr) 98 97 { 99 98 ASSERT(uart); 100 uart->regs = (void*)km_map(addr, size , PAGE_NOT_CACHEABLE);101 99 uart->regs = (void*)km_map(addr, sizeof(pl011_uart_regs_t), 100 PAGE_NOT_CACHEABLE); 102 101 ASSERT(uart->regs); 103 102 103 /* Disable UART */ 104 uart->regs->control &= ~ PL011_UART_CONTROL_UARTEN_FLAG; 105 104 106 /* Enable hw flow control */ 105 uart->regs->control = 0 | 106 ARM926_UART_CONTROL_UARTEN_FLAG | 107 ARM926_UART_CONTROL_RTSE_FLAG | 108 ARM926_UART_CONTROL_CTSE_FLAG; 107 uart->regs->control |= 108 PL011_UART_CONTROL_RTSE_FLAG | 109 PL011_UART_CONTROL_CTSE_FLAG; 109 110 110 111 /* Mask all interrupts */ 111 112 uart->regs->interrupt_mask = 0; 113 /* Clear interrupts */ 114 uart->regs->interrupt_clear = PL011_UART_INTERRUPT_ALL; 115 /* Enable UART, TX and RX */ 116 uart->regs->control |= 117 PL011_UART_CONTROL_UARTEN_FLAG | 118 PL011_UART_CONTROL_TXE_FLAG | 119 PL011_UART_CONTROL_RXE_FLAG; 112 120 113 outdev_initialize(" arm926_uart_dev", &uart->outdev, &arm926_uart_ops);121 outdev_initialize("pl011_uart_dev", &uart->outdev, &pl011_uart_ops); 114 122 uart->outdev.data = uart; 115 123 116 124 /* Initialize IRQ */ 117 125 irq_initialize(&uart->irq); 118 119 120 uart->irq.claim = arm926_uart_claim;121 uart->irq.handler = arm926_uart_irq_handler;122 126 uart->irq.devno = device_assign_devno(); 127 uart->irq.inr = interrupt; 128 uart->irq.claim = pl011_uart_claim; 129 uart->irq.handler = pl011_uart_irq_handler; 130 uart->irq.instance = uart; 123 131 124 132 return true; 125 133 } 126 134 127 void arm926_uart_input_wire(arm926_uart_t *uart, indev_t *indev)135 void pl011_uart_input_wire(pl011_uart_t *uart, indev_t *indev) 128 136 { 129 137 ASSERT(uart); … … 132 140 uart->indev = indev; 133 141 irq_register(&uart->irq); 134 /* Enable receive interrupt */ 135 uart->regs->interrupt_mask |= ARM926_UART_INTERRUPT_RX_FLAG; 142 /* Enable receive interrupts */ 143 uart->regs->interrupt_mask |= 144 PL011_UART_INTERRUPT_RX_FLAG | 145 PL011_UART_INTERRUPT_RT_FLAG; 136 146 } 137 147
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