Changeset 19b3cc6 in mainline for kernel/arch/ppc32/src/interrupt.c
- Timestamp:
- 2014-01-17T23:12:10Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e26a9d95
- Parents:
- fddffb2 (diff), facc34d (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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- 1 edited
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kernel/arch/ppc32/src/interrupt.c
rfddffb2 r19b3cc6 44 44 #include <arch/mm/pht.h> 45 45 #include <print.h> 46 #include <log.h> 46 47 47 48 void start_decrementer(void) … … 55 56 void istate_decode(istate_t *istate) 56 57 { 57 printf("r0 =%0#10" PRIx32 "\tr1 =%0#10" PRIx32 "\t"58 log_printf("r0 =%0#10" PRIx32 "\tr1 =%0#10" PRIx32 "\t" 58 59 "r2 =%0#10" PRIx32 "\n", istate->r0, istate->sp, istate->r2); 59 60 60 printf("r3 =%0#10" PRIx32 "\tr4 =%0#10" PRIx32 "\t"61 log_printf("r3 =%0#10" PRIx32 "\tr4 =%0#10" PRIx32 "\t" 61 62 "r5 =%0#10" PRIx32 "\n", istate->r3, istate->r4, istate->r5); 62 63 63 printf("r6 =%0#10" PRIx32 "\tr7 =%0#10" PRIx32 "\t"64 log_printf("r6 =%0#10" PRIx32 "\tr7 =%0#10" PRIx32 "\t" 64 65 "r8 =%0#10" PRIx32 "\n", istate->r6, istate->r7, istate->r8); 65 66 66 printf("r9 =%0#10" PRIx32 "\tr10=%0#10" PRIx32 "\t"67 log_printf("r9 =%0#10" PRIx32 "\tr10=%0#10" PRIx32 "\t" 67 68 "r11=%0#10" PRIx32 "\n", istate->r9, istate->r10, istate->r11); 68 69 69 printf("r12=%0#10" PRIx32 "\tr13=%0#10" PRIx32 "\t"70 log_printf("r12=%0#10" PRIx32 "\tr13=%0#10" PRIx32 "\t" 70 71 "r14=%0#10" PRIx32 "\n", istate->r12, istate->r13, istate->r14); 71 72 72 printf("r15=%0#10" PRIx32 "\tr16=%0#10" PRIx32 "\t"73 log_printf("r15=%0#10" PRIx32 "\tr16=%0#10" PRIx32 "\t" 73 74 "r17=%0#10" PRIx32 "\n", istate->r15, istate->r16, istate->r17); 74 75 75 printf("r18=%0#10" PRIx32 "\tr19=%0#10" PRIx32 "\t"76 log_printf("r18=%0#10" PRIx32 "\tr19=%0#10" PRIx32 "\t" 76 77 "r20=%0#10" PRIx32 "\n", istate->r18, istate->r19, istate->r20); 77 78 78 printf("r21=%0#10" PRIx32 "\tr22=%0#10" PRIx32 "\t"79 log_printf("r21=%0#10" PRIx32 "\tr22=%0#10" PRIx32 "\t" 79 80 "r23=%0#10" PRIx32 "\n", istate->r21, istate->r22, istate->r23); 80 81 81 printf("r24=%0#10" PRIx32 "\tr25=%0#10" PRIx32 "\t"82 log_printf("r24=%0#10" PRIx32 "\tr25=%0#10" PRIx32 "\t" 82 83 "r26=%0#10" PRIx32 "\n", istate->r24, istate->r25, istate->r26); 83 84 84 printf("r27=%0#10" PRIx32 "\tr28=%0#10" PRIx32 "\t"85 log_printf("r27=%0#10" PRIx32 "\tr28=%0#10" PRIx32 "\t" 85 86 "r29=%0#10" PRIx32 "\n", istate->r27, istate->r28, istate->r29); 86 87 87 printf("r30=%0#10" PRIx32 "\tr31=%0#10" PRIx32 "\n",88 log_printf("r30=%0#10" PRIx32 "\tr31=%0#10" PRIx32 "\n", 88 89 istate->r30, istate->r31); 89 90 90 printf("cr =%0#10" PRIx32 "\tpc =%0#10" PRIx32 "\t"91 log_printf("cr =%0#10" PRIx32 "\tpc =%0#10" PRIx32 "\t" 91 92 "lr =%0#10" PRIx32 "\n", istate->cr, istate->pc, istate->lr); 92 93 93 printf("ctr=%0#10" PRIx32 "\txer=%0#10" PRIx32 "\t"94 log_printf("ctr=%0#10" PRIx32 "\txer=%0#10" PRIx32 "\t" 94 95 "dar=%0#10" PRIx32 "\n", istate->ctr, istate->xer, istate->dar); 95 96 96 printf("srr1=%0#10" PRIx32 "\n", istate->srr1);97 log_printf("srr1=%0#10" PRIx32 "\n", istate->srr1); 97 98 } 98 99 … … 130 131 */ 131 132 #ifdef CONFIG_DEBUG 132 printf("cpu%u: spurious interrupt (inum=%" PRIu8 ")\n",133 CPU->id, inum);133 log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious interrupt" 134 " (inum=%" PRIu8 ")", CPU->id, inum); 134 135 #endif 135 136 }
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