Index: uspace/drv/fb/amdm37x_dispc/amdm37x_dispc.c
===================================================================
--- uspace/drv/fb/amdm37x_dispc/amdm37x_dispc.c	(revision af604092e35e8e60ad875a2e327638358cf3caf1)
+++ uspace/drv/fb/amdm37x_dispc/amdm37x_dispc.c	(revision 18b6a8849d630cc3bca153fb21bd225eebb16f4c)
@@ -126,14 +126,22 @@
 	visual_t visual = VISUAL_BGR_8_8_8;
 	switch (CONFIG_BFB_BPP)	{
-	case 8: visual = VISUAL_INDIRECT_8; break;
-	case 16: visual = VISUAL_RGB_5_6_5_LE; break;
-	case 24: visual = VISUAL_BGR_8_8_8; break;
-	case 32: visual = VISUAL_RGB_8_8_8_0; break;
+	case 8:
+		visual = VISUAL_INDIRECT_8;
+		break;
+	case 16:
+		visual = VISUAL_RGB_5_6_5_LE;
+		break;
+	case 24:
+		visual = VISUAL_BGR_8_8_8;
+		break;
+	case 32:
+		visual = VISUAL_RGB_8_8_8_0;
+		break;
 	default:
 		return EINVAL;
 	}
 
-	errno_t ret = pio_enable((void*)AMDM37x_DISPC_BASE_ADDRESS,
-	    AMDM37x_DISPC_SIZE, (void**)&instance->regs);
+	errno_t ret = pio_enable((void *)AMDM37x_DISPC_BASE_ADDRESS,
+	    AMDM37x_DISPC_SIZE, (void **)&instance->regs);
 	if (ret != EOK) {
 		return EIO;
@@ -170,6 +178,5 @@
 	uint32_t attrib_pixel_format = 0;
 	uint32_t control_data_lanes = 0;
-	switch (bpp)
-	{
+	switch (bpp) {
 	case 32:
 		attrib_pixel_format = AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGBX;
@@ -190,8 +197,8 @@
 	/* Prepare sizes */
 	const uint32_t size_reg =
-	    (((x - 1) & AMDM37X_DISPC_SIZE_WIDTH_MASK)
-	        << AMDM37X_DISPC_SIZE_WIDTH_SHIFT) |
-	    (((y - 1) & AMDM37X_DISPC_SIZE_HEIGHT_MASK)
-	        << AMDM37X_DISPC_SIZE_HEIGHT_SHIFT);
+	    (((x - 1) & AMDM37X_DISPC_SIZE_WIDTH_MASK) <<
+	    AMDM37X_DISPC_SIZE_WIDTH_SHIFT) |
+	    (((y - 1) & AMDM37X_DISPC_SIZE_HEIGHT_MASK) <<
+	    AMDM37X_DISPC_SIZE_HEIGHT_SHIFT);
 
 	/* modes taken from u-boot, for 1024x768 */
@@ -212,13 +219,13 @@
 	/* Setup control register */
 	uint32_t control = 0 |
-		AMDM37X_DISPC_CONTROL_PCKFREEENABLE_FLAG |
-		(control_data_lanes << AMDM37X_DISPC_CONTROL_TFTDATALINES_SHIFT) |
-		AMDM37X_DISPC_CONTROL_GPOUT0_FLAG |
-		AMDM37X_DISPC_CONTROL_GPOUT1_FLAG;
+	    AMDM37X_DISPC_CONTROL_PCKFREEENABLE_FLAG |
+	    (control_data_lanes << AMDM37X_DISPC_CONTROL_TFTDATALINES_SHIFT) |
+	    AMDM37X_DISPC_CONTROL_GPOUT0_FLAG |
+	    AMDM37X_DISPC_CONTROL_GPOUT1_FLAG;
 	regs->control = control;
 
 	/* No gamma stuff only data */
-	uint32_t config = (AMDM37X_DISPC_CONFIG_LOADMODE_DATAEVERYFRAME
-	            << AMDM37X_DISPC_CONFIG_LOADMODE_SHIFT);
+	uint32_t config = (AMDM37X_DISPC_CONFIG_LOADMODE_DATAEVERYFRAME <<
+	    AMDM37X_DISPC_CONFIG_LOADMODE_SHIFT);
 	regs->config = config;
 
@@ -272,5 +279,5 @@
 	const unsigned x = mode.screen_width;
 	const unsigned y = mode.screen_height;
-	ddf_log_note("Setting mode: %ux%ux%u\n", x, y, bpp*8);
+	ddf_log_note("Setting mode: %ux%ux%u\n", x, y, bpp * 8);
 	const size_t size = ALIGN_UP(x * y * bpp, PAGE_SIZE);
 	uintptr_t pa;
@@ -286,5 +293,5 @@
 
 	dispc->fb_data = buffer;
-	amdm37x_dispc_setup_fb(dispc->regs, x, y, bpp *8, (uint32_t)pa);
+	amdm37x_dispc_setup_fb(dispc->regs, x, y, bpp * 8, (uint32_t)pa);
 	dispc->active_fb.idx = mode.index;
 	dispc->active_fb.width = x;
@@ -326,6 +333,6 @@
 				    dispc->fb_data + FB_POS(x, y),
 				    *pixelmap_pixel_at(map,
-				        (x + x_offset) % map->width,
-				        (y + y_offset) % map->height));
+				    (x + x_offset) % map->width,
+				    (y + y_offset) % map->height));
 			}
 		}