Index: kernel/arch/amd64/include/arch/asm.h
===================================================================
--- kernel/arch/amd64/include/arch/asm.h	(revision 1433ecda9b732f3f185f902feb26826ec2496e03)
+++ kernel/arch/amd64/include/arch/asm.h	(revision 18b6a8849d630cc3bca153fb21bd225eebb16f4c)
@@ -55,7 +55,7 @@
 
 	asm volatile (
-		"andq %%rsp, %[v]\n"
-		: [v] "=r" (v)
-		: "0" (~((uint64_t) STACK_SIZE - 1))
+	    "andq %%rsp, %[v]\n"
+	    : [v] "=r" (v)
+	    : "0" (~((uint64_t) STACK_SIZE - 1))
 	);
 
@@ -66,5 +66,5 @@
 {
 	asm volatile (
-		"hlt\n"
+	    "hlt\n"
 	);
 }
@@ -74,5 +74,5 @@
 	while (true) {
 		asm volatile (
-			"hlt\n"
+		    "hlt\n"
 		);
 	}
@@ -93,7 +93,7 @@
 
 		asm volatile (
-			"inb %w[port], %b[val]\n"
-			: [val] "=a" (val)
-			: [port] "d" (port)
+		    "inb %w[port], %b[val]\n"
+		    : [val] "=a" (val)
+		    : [port] "d" (port)
 		);
 
@@ -117,7 +117,7 @@
 
 		asm volatile (
-			"inw %w[port], %w[val]\n"
-			: [val] "=a" (val)
-			: [port] "d" (port)
+		    "inw %w[port], %w[val]\n"
+		    : [val] "=a" (val)
+		    : [port] "d" (port)
 		);
 
@@ -141,7 +141,7 @@
 
 		asm volatile (
-			"inl %w[port], %[val]\n"
-			: [val] "=a" (val)
-			: [port] "d" (port)
+		    "inl %w[port], %[val]\n"
+		    : [val] "=a" (val)
+		    : [port] "d" (port)
 		);
 
@@ -163,6 +163,6 @@
 	if (port < (ioport8_t *) IO_SPACE_BOUNDARY) {
 		asm volatile (
-			"outb %b[val], %w[port]\n"
-			:: [val] "a" (val), [port] "d" (port)
+		    "outb %b[val], %w[port]\n"
+		    :: [val] "a" (val), [port] "d" (port)
 		);
 	} else
@@ -182,6 +182,6 @@
 	if (port < (ioport16_t *) IO_SPACE_BOUNDARY) {
 		asm volatile (
-			"outw %w[val], %w[port]\n"
-			:: [val] "a" (val), [port] "d" (port)
+		    "outw %w[val], %w[port]\n"
+		    :: [val] "a" (val), [port] "d" (port)
 		);
 	} else
@@ -201,6 +201,6 @@
 	if (port < (ioport32_t *) IO_SPACE_BOUNDARY) {
 		asm volatile (
-			"outl %[val], %w[port]\n"
-			:: [val] "a" (val), [port] "d" (port)
+		    "outl %[val], %w[port]\n"
+		    :: [val] "a" (val), [port] "d" (port)
 		);
 	} else
@@ -213,7 +213,7 @@
 
 	asm volatile (
-		"pushfq\n"
-		"popq %[v]\n"
-		: [v] "=r" (rflags)
+	    "pushfq\n"
+	    "popq %[v]\n"
+	    : [v] "=r" (rflags)
 	);
 
@@ -224,7 +224,7 @@
 {
 	asm volatile (
-		"pushq %[v]\n"
-		"popfq\n"
-		:: [v] "r" (rflags)
+	    "pushq %[v]\n"
+	    "popfq\n"
+	    :: [v] "r" (rflags)
 	);
 }
@@ -300,8 +300,8 @@
 {
 	asm volatile (
-		"wrmsr\n"
-		:: "c" (msr),
-		   "a" ((uint32_t) (value)),
-		   "d" ((uint32_t) (value >> 32))
+	    "wrmsr\n"
+	    :: "c" (msr),
+	      "a" ((uint32_t) (value)),
+	      "d" ((uint32_t) (value >> 32))
 	);
 }
@@ -312,7 +312,7 @@
 
 	asm volatile (
-		"rdmsr\n"
-		: "=a" (ax), "=d" (dx)
-		: "c" (msr)
+	    "rdmsr\n"
+	    : "=a" (ax), "=d" (dx)
+	    : "c" (msr)
 	);
 
@@ -328,6 +328,6 @@
 {
 	asm volatile (
-		"invlpg %[addr]\n"
-		:: [addr] "m" (*((sysarg_t *) addr))
+	    "invlpg %[addr]\n"
+	    :: [addr] "m" (*((sysarg_t *) addr))
 	);
 }
@@ -341,6 +341,6 @@
 {
 	asm volatile (
-		"lgdtq %[gdtr_reg]\n"
-		:: [gdtr_reg] "m" (*gdtr_reg)
+	    "lgdtq %[gdtr_reg]\n"
+	    :: [gdtr_reg] "m" (*gdtr_reg)
 	);
 }
@@ -354,6 +354,6 @@
 {
 	asm volatile (
-		"sgdtq %[gdtr_reg]\n"
-		:: [gdtr_reg] "m" (*gdtr_reg)
+	    "sgdtq %[gdtr_reg]\n"
+	    :: [gdtr_reg] "m" (*gdtr_reg)
 	);
 }
@@ -367,6 +367,6 @@
 {
 	asm volatile (
-		"lidtq %[idtr_reg]\n"
-		:: [idtr_reg] "m" (*idtr_reg));
+	    "lidtq %[idtr_reg]\n"
+	    :: [idtr_reg] "m" (*idtr_reg));
 }
 
@@ -379,6 +379,6 @@
 {
 	asm volatile (
-		"ltr %[sel]"
-		:: [sel] "r" (sel)
+	    "ltr %[sel]"
+	    :: [sel] "r" (sel)
 	);
 }