Index: uspace/drv/bus/isa/i8237.c
===================================================================
--- uspace/drv/bus/isa/i8237.c	(revision 6fd365db255d6c7fdfedc757e774c4e07fe05940)
+++ uspace/drv/bus/isa/i8237.c	(revision 186494827b235405c63bfe0c7f5b4b0c2fdb7d8d)
@@ -429,4 +429,39 @@
 }
 
+extern int dma_channel_remain(unsigned channel, uint16_t *size)
+{
+	assert(size);
+	if ((channel == 0) || (channel == 4))
+		return ENOTSUP;
+	
+	if (channel > 7)
+		return ENOENT;
+	
+	fibril_mutex_lock(&guard);
+	if (!controller_8237.initialized) {
+		fibril_mutex_unlock(&guard);
+		return EIO;
+	}
+
+	const dma_channel_t dma_channel = controller_8237.channels[channel];
+	/* Get size - reset flip-flop */
+	pio_write_8(dma_channel.flip_flop_address, 0);
+	
+	/* Low byte */
+	const uint8_t value_low = pio_read_8(dma_channel.size_reg_address);
+	ddf_msg(LVL_DEBUG2, "Read size low byte: %p:%zx.",
+	    dma_channel.size_reg_address, value_low);
+	
+	/* High byte */
+	const uint8_t value_high = pio_read_8(dma_channel.size_reg_address);
+	ddf_msg(LVL_DEBUG2, "Read size high byte: %p:%zx.",
+	    dma_channel.size_reg_address, value_high);
+	fibril_mutex_unlock(&guard);
+
+	const int remain = (value_high << 8 | value_low) + 1;
+	/* 16 bit DMA size is in words */
+	*size =  channel >= 4 ? remain << 1 : remain;
+	return EOK;
+}
 /**
  * @}
Index: uspace/drv/bus/isa/i8237.h
===================================================================
--- uspace/drv/bus/isa/i8237.h	(revision 6fd365db255d6c7fdfedc757e774c4e07fe05940)
+++ uspace/drv/bus/isa/i8237.h	(revision 186494827b235405c63bfe0c7f5b4b0c2fdb7d8d)
@@ -39,4 +39,5 @@
 
 extern int dma_channel_setup(unsigned, uint32_t, uint16_t, uint8_t);
+extern int dma_channel_remain(unsigned, uint16_t *);
 
 #endif
Index: uspace/drv/bus/isa/isa.c
===================================================================
--- uspace/drv/bus/isa/isa.c	(revision 6fd365db255d6c7fdfedc757e774c4e07fe05940)
+++ uspace/drv/bus/isa/isa.c	(revision 186494827b235405c63bfe0c7f5b4b0c2fdb7d8d)
@@ -169,8 +169,32 @@
 }
 
+static int isa_fun_remain_dma(ddf_fun_t *fnode,
+    unsigned channel, uint16_t *size)
+{
+	assert(size);
+	assert(fnode);
+	isa_fun_t *isa_fun = fnode->driver_data;
+	assert(isa_fun);
+	const hw_resource_list_t *res = &isa_fun->hw_resources;
+	assert(res);
+	
+	for (size_t i = 0; i < res->count; ++i) {
+		/* Check for assigned channel */
+		if (((res->resources[i].type == DMA_CHANNEL_16) &&
+		    (res->resources[i].res.dma_channel.dma16 == channel)) ||
+		    ((res->resources[i].type == DMA_CHANNEL_8) &&
+		    (res->resources[i].res.dma_channel.dma8 == channel))) {
+			return dma_channel_remain(channel, size);
+		}
+	}
+	
+	return EINVAL;
+}
+
 static hw_res_ops_t isa_fun_hw_res_ops = {
 	.get_resource_list = isa_fun_get_resources,
 	.enable_interrupt = isa_fun_enable_interrupt,
 	.dma_channel_setup = isa_fun_setup_dma,
+	.dma_channel_remain = isa_fun_remain_dma,
 };