Index: uspace/drv/ehci-hcd/pci.c
===================================================================
--- uspace/drv/ehci-hcd/pci.c	(revision 89864128256491f600079ac9523dd30bc0833056)
+++ uspace/drv/ehci-hcd/pci.c	(revision 180255fbf234649700144c2f9bd2b18bd7fc92de)
@@ -186,5 +186,6 @@
 	CHECK_RET_HANGUP_RETURN(ret, "Failed(%d) to read PCI config space.\n",
 	    ret);
-	usb_log_info("Register space BAR at %p:%" PRIxn ".\n", (void *) address, value);
+	usb_log_info("Register space BAR at %p:%" PRIxn ".\n",
+	    (void *) address, value);
 
 	/* clear lower byte, it's not part of the BASE address */
Index: uspace/drv/ohci/hc.c
===================================================================
--- uspace/drv/ohci/hc.c	(revision 89864128256491f600079ac9523dd30bc0833056)
+++ uspace/drv/ohci/hc.c	(revision 180255fbf234649700144c2f9bd2b18bd7fc92de)
@@ -45,4 +45,6 @@
 #include "hcd_endpoint.h"
 
+#define OHCI_USED_INTERRUPTS \
+    (I_SO | I_WDH | I_UE | I_RHSC)
 static int interrupt_emulator(hc_t *instance);
 static void hc_gain_control(hc_t *instance);
@@ -285,12 +287,12 @@
 {
 	assert(instance);
-	if ((status & ~IS_SF) == 0) /* ignore sof status */
+	usb_log_debug("OHCI interrupt: %x.\n", status);
+	if ((status & ~I_SF) == 0) /* ignore sof status */
 		return;
-	if (status & IS_RHSC)
+	if (status & I_RHSC)
 		rh_interrupt(&instance->rh);
 
-	usb_log_debug("OHCI interrupt: %x.\n", status);
-
-	if (status & IS_WDH) {
+
+	if (status & I_WDH) {
 		fibril_mutex_lock(&instance->guard);
 		usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
@@ -421,11 +423,14 @@
 	    instance->registers->control);
 
-	/* Disable interrupts */
-	instance->registers->interrupt_disable = I_SF | I_OC;
-	usb_log_debug2("Disabling interrupts: %x.\n",
-	    instance->registers->interrupt_disable);
-	instance->registers->interrupt_disable = I_MI;
+	/* Enable interrupts */
+	instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
 	usb_log_debug2("Enabled interrupts: %x.\n",
 	    instance->registers->interrupt_enable);
+	instance->registers->interrupt_enable = I_MI;
+	/* Disable interrupts */
+//	instance->registers->interrupt_disable = I_SF | I_OC;
+//	usb_log_debug2("Disabling interrupts: %x.\n",
+//	    instance->registers->interrupt_disable);
+//	instance->registers->interrupt_disable = I_MI;
 
 	/* Set periodic start to 90% */
@@ -492,4 +497,37 @@
 	    instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
 
+	/* Init interrupt code */
+	instance->interrupt_code.cmds = instance->interrupt_commands;
+	{
+		/* Read status register */
+		instance->interrupt_commands[0].cmd = CMD_MEM_READ_32;
+		instance->interrupt_commands[0].dstarg = 1;
+		instance->interrupt_commands[0].addr = (void*)
+		    addr_to_phys((void*)&instance->registers->interrupt_status);
+
+		/* Test whether we are the interrupt cause */
+		instance->interrupt_commands[1].cmd = CMD_BTEST;
+		instance->interrupt_commands[1].value =
+		    OHCI_USED_INTERRUPTS;
+		instance->interrupt_commands[1].srcarg = 1;
+		instance->interrupt_commands[1].dstarg = 2;
+
+		/* Predicate cleaning and accepting */
+		instance->interrupt_commands[2].cmd = CMD_PREDICATE;
+		instance->interrupt_commands[2].value = 2;
+		instance->interrupt_commands[2].srcarg = 2;
+
+		/* Write clean status register */
+		instance->interrupt_commands[3].cmd = CMD_PIO_WRITE_A_32;
+		instance->interrupt_commands[3].srcarg = 1;
+		instance->interrupt_commands[3].addr = (void*)
+		    addr_to_phys((void*)&instance->registers->interrupt_status);
+
+		/* Accept interrupt */
+		instance->interrupt_commands[4].cmd = CMD_ACCEPT;
+
+		instance->interrupt_code.cmdcount = OHCI_NEEDED_IRQ_COMMANDS;
+	}
+
 	return EOK;
 }
Index: uspace/drv/ohci/hc.h
===================================================================
--- uspace/drv/ohci/hc.h	(revision 89864128256491f600079ac9523dd30bc0833056)
+++ uspace/drv/ohci/hc.h	(revision 180255fbf234649700144c2f9bd2b18bd7fc92de)
@@ -51,4 +51,6 @@
 #include "hw_struct/hcca.h"
 
+#define OHCI_NEEDED_IRQ_COMMANDS 5
+
 typedef struct hc {
 	ohci_regs_t *registers;
@@ -65,4 +67,10 @@
 	fid_t interrupt_emulator;
 	fibril_mutex_t guard;
+
+	/** Code to be executed in kernel interrupt handler */
+	irq_code_t interrupt_code;
+
+	/** Commands that form interrupt code */
+	irq_cmd_t interrupt_commands[OHCI_NEEDED_IRQ_COMMANDS];
 } hc_t;
 
Index: uspace/drv/ohci/ohci.c
===================================================================
--- uspace/drv/ohci/ohci.c	(revision 89864128256491f600079ac9523dd30bc0833056)
+++ uspace/drv/ohci/ohci.c	(revision 180255fbf234649700144c2f9bd2b18bd7fc92de)
@@ -202,5 +202,6 @@
 
 	/* It does no harm if we register this on polling */
-	ret = register_interrupt_handler(device, irq, irq_handler, NULL);
+	ret = register_interrupt_handler(device, irq, irq_handler,
+	    &instance->hc.interrupt_code);
 	CHECK_RET_FINI_RETURN(ret,
 	    "Failed(%d) to register interrupt handler.\n", ret);
Index: uspace/drv/ohci/ohci_regs.h
===================================================================
--- uspace/drv/ohci/ohci_regs.h	(revision 89864128256491f600079ac9523dd30bc0833056)
+++ uspace/drv/ohci/ohci_regs.h	(revision 180255fbf234649700144c2f9bd2b18bd7fc92de)
@@ -72,16 +72,9 @@
 #define CS_SOC_SHIFT (16)
 
+	/** Interupt enable/disable/status,
+	 * reads give the same value,
+	 * writing causes enable/disable,
+	 * status is write-clean (writing 1 clears the bit*/
 	volatile uint32_t interrupt_status;
-#define IS_SO   (1 << 0)  /* Scheduling overrun */
-#define IS_WDH  (1 << 1)  /* Write-back done head */
-#define IS_SF   (1 << 2)  /* Start of frame */
-#define IS_RD   (1 << 3)  /* Resume detected */
-#define IS_UE   (1 << 4)  /* Unrecoverable error */
-#define IS_FNO  (1 << 5)  /* Frame number overflow */
-#define IS_RHSC (1 << 6)  /* Root hub status change */
-#define IS_OC   (1 << 30) /* Ownership change */
-
-	/** Interupt enable/disable, reads give the same value, writing causes
-	 * enable/disable */
 	volatile uint32_t interrupt_enable;
 	volatile uint32_t interrupt_disable;
Index: uspace/drv/ohci/pci.c
===================================================================
--- uspace/drv/ohci/pci.c	(revision 89864128256491f600079ac9523dd30bc0833056)
+++ uspace/drv/ohci/pci.c	(revision 180255fbf234649700144c2f9bd2b18bd7fc92de)
@@ -146,5 +146,4 @@
 int pci_enable_interrupts(ddf_dev_t *device)
 {
-	return ENOTSUP;
 	int parent_phone =
 	    devman_parent_device_connect(device->handle, IPC_FLAG_BLOCKING);
