Index: kernel/arch/ia32/include/arch/cpu.h
===================================================================
--- kernel/arch/ia32/include/arch/cpu.h	(revision 95e370f88ddd131bc637e55642805b5db53b4e99)
+++ kernel/arch/ia32/include/arch/cpu.h	(revision 17d214e84d0bf032323fead19f3f008cfd033208)
@@ -41,5 +41,6 @@
 #define EFLAGS_RF       (1 << 16)
 
-#define CR4_OSFXSR_MASK (1<<9)
+#define CR4_OSFXSR_MASK      (1 << 9)
+#define CR4_OSXMMEXCPT_MASK  (1 << 10)
 
 /* Support for SYSENTER and SYSEXIT */
@@ -59,6 +60,6 @@
 	unsigned int model;
 	unsigned int stepping;
-	cpuid_feature_info fi;
-
+	cpuid_feature_info_t fi;
+	
 	tss_t *tss;
 	
Index: kernel/arch/ia32/include/arch/cpuid.h
===================================================================
--- kernel/arch/ia32/include/arch/cpuid.h	(revision 95e370f88ddd131bc637e55642805b5db53b4e99)
+++ kernel/arch/ia32/include/arch/cpuid.h	(revision 17d214e84d0bf032323fead19f3f008cfd033208)
@@ -50,36 +50,36 @@
 	uint32_t cpuid_ecx;
 	uint32_t cpuid_edx;
-} __attribute__ ((packed)) cpu_info_t;
+} __attribute__((packed)) cpu_info_t;
 
-struct __cpuid_extended_feature_info {
-	unsigned sse3 :  1;
-	unsigned      : 31;
-} __attribute__ ((packed));
+struct cpuid_extended_feature_info {
+	unsigned int sse3 : 1;
+	unsigned int : 31;
+} __attribute__((packed));
 
-typedef union cpuid_extended_feature_info {
-	struct __cpuid_extended_feature_info bits;
+typedef union {
+	struct cpuid_extended_feature_info bits;
 	uint32_t word;
-} cpuid_extended_feature_info;
+} cpuid_extended_feature_info_t;
 
-struct __cpuid_feature_info {
-	unsigned      : 11;
-	unsigned sep  :  1;
-	unsigned      : 11;
-	unsigned mmx  :  1;
-	unsigned fxsr :  1;
-	unsigned sse  :  1;
-	unsigned sse2 :  1;
-	unsigned      :  5;
-} __attribute__ ((packed));
+struct cpuid_feature_info {
+	unsigned int : 11;
+	unsigned int sep  : 1;
+	unsigned int : 11;
+	unsigned int mmx  : 1;
+	unsigned int fxsr : 1;
+	unsigned int sse  : 1;
+	unsigned int sse2 : 1;
+	unsigned int : 5;
+} __attribute__((packed));
 
-typedef union cpuid_feature_info {
-	struct __cpuid_feature_info bits;
+typedef union {
+	struct cpuid_feature_info bits;
 	uint32_t word;
-} cpuid_feature_info;
-
+} cpuid_feature_info_t;
 
 static inline uint32_t has_cpuid(void)
 {
-	uint32_t val, ret;
+	uint32_t val;
+	uint32_t ret;
 	
 	asm volatile (
Index: kernel/arch/ia32/src/cpu/cpu.c
===================================================================
--- kernel/arch/ia32/src/cpu/cpu.c	(revision 95e370f88ddd131bc637e55642805b5db53b4e99)
+++ kernel/arch/ia32/src/cpu/cpu.c	(revision 17d214e84d0bf032323fead19f3f008cfd033208)
@@ -115,8 +115,8 @@
 			"mov %[help], %%cr4\n"
 			: [help] "+r" (help)
-			: [mask] "i" (CR4_OSFXSR_MASK | (1 << 10))
+			: [mask] "i" (CR4_OSFXSR_MASK | CR4_OSXMMEXCPT_MASK)
 		);
 	}
-
+	
 #ifndef PROCESSOR_i486
 	if (CPU->arch.fi.bits.sep) {
Index: kernel/arch/ia32/src/fpu_context.c
===================================================================
--- kernel/arch/ia32/src/fpu_context.c	(revision 95e370f88ddd131bc637e55642805b5db53b4e99)
+++ kernel/arch/ia32/src/fpu_context.c	(revision 17d214e84d0bf032323fead19f3f008cfd033208)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia32	
+/** @addtogroup ia32
  * @{
  */
@@ -37,5 +37,4 @@
 #include <arch.h>
 #include <cpu.h>
-
 
 /** x87 FPU scr values (P3+ MMX2) */
@@ -60,12 +59,12 @@
 	X87_DENORMAL_EXC_FLAG = (1 << 1),
 	X87_INVALID_OP_EXC_FLAG = (1 << 0),
-
+	
 	X87_ALL_MASK = X87_PRECISION_MASK | X87_UNDERFLOW_MASK | X87_OVERFLOW_MASK | X87_ZERO_DIV_MASK | X87_DENORMAL_OP_MASK | X87_INVALID_OP_MASK,
 };
 
-
 typedef void (*fpu_context_function)(fpu_context_t *fctx);
 
-static fpu_context_function fpu_save, fpu_restore;
+static fpu_context_function fpu_save;
+static fpu_context_function fpu_restore;
 
 static void fpu_context_f_save(fpu_context_t *fctx)
@@ -104,6 +103,6 @@
 void fpu_fxsr(void)
 {
-	fpu_save=fpu_context_fx_save;
-	fpu_restore=fpu_context_fx_restore;
+	fpu_save = fpu_context_fx_save;
+	fpu_restore = fpu_context_fx_restore;
 }