Index: uspace/srv/hw/char/s3c24xx_uart/s3c24xx_uart.c
===================================================================
--- uspace/srv/hw/char/s3c24xx_uart/s3c24xx_uart.c	(revision 3d9d948e378b0a89cdfe85faff72342bf5b81f1e)
+++ uspace/srv/hw/char/s3c24xx_uart/s3c24xx_uart.c	(revision 1720cf99a344d8198c24a88d92b1469cab43f376)
@@ -162,5 +162,5 @@
 	while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_RX_COUNT) != 0) {
 		uint32_t data = pio_read_32(&uart->io->urxh) & 0xff;
-		pio_read_32(&uart->io->uerstat);
+		uint32_t status = pio_read_32(&uart->io->uerstat);
 
 		if (uart->client_phone != -1) {
@@ -168,4 +168,7 @@
 			    data);
 		}
+
+		if (status & 0x0f)
+			printf(NAME ": Error status 0x%x\n", status);
 	}
 }
@@ -198,7 +201,6 @@
 	ipc_register_irq(inr, device_assign_devno(), 0, &uart_irq_code);
 
-	/* Disable FIFO */
-	pio_write_32(&uart->io->ufcon,
-	    pio_read_32(&uart->io->ufcon) & ~0x01);
+	/* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */
+	pio_write_32(&uart->io->ufcon, 0x01);
 
 	/* Set RX interrupt to pulse mode */