Index: boot/arch/arm32/include/asm.h
===================================================================
--- boot/arch/arm32/include/asm.h	(revision 827aae522e4a488f1290f802e7f30a5b84733dda)
+++ boot/arch/arm32/include/asm.h	(revision 163bc23131cbe01da4aa19cc6475db87c051ebb2)
@@ -49,5 +49,5 @@
  *
  */
-extern void jump_to_kernel(void *entry, void *bootinfo)
+extern void jump_to_kernel(void *entry, void *bootinfo, void *kernel_end)
     __attribute__((noreturn));
 
Index: boot/arch/arm32/src/asm.S
===================================================================
--- boot/arch/arm32/src/asm.S	(revision 827aae522e4a488f1290f802e7f30a5b84733dda)
+++ boot/arch/arm32/src/asm.S	(revision 163bc23131cbe01da4aa19cc6475db87c051ebb2)
@@ -61,4 +61,52 @@
 	#
 
+	#
+	# r0 is kernel entry point
+	# r1 is pointer to the bootinfo structure
+	# r2 is a kernel text end
+
+	# make sure kernel is flushed and available in memory
+	# Disable I-cache and D-cache before the kernel is started.
+	# TODO disabling DCache should not be necessary...
+#define CP15_C1_IC		12
+#define CP15_C1_DC		2
+	mrc	p15, 0, r4, c1, c0, 0
+	bic	r4, r4, #(1 << CP15_C1_DC)
+	bic	r4, r4, #(1 << CP15_C1_IC)
+	mcr	p15, 0, r4, c1, c0, 0
+
+	# use r4 as a moving pointer
+	mov r4, r0
+3:
+	# DCCMVAC (flush by virt address, to the point of coherence)
+	mcr p15, 0, r4, c7, c10, 1
+	# TODO: it would be better to use cacheline size
+	add r4, r4, #4
+	# are we there yet?
+	cmp r4, r2
+	blt 3b
+	nop
+	mov r4, #0
+	
+	#Wait for the operations to complete
+#ifdef PROCESSOR_ARCH_armv7_a
+	dsb
+#else
+	#cp15 dsb, r4 is ignored (should be zero)
+	mcr p15, 0, r4, c7, c10, 4
+#endif
+	
+	# Clean ICache and BPredictors, r4 ignored (SBZ)
+	mcr p15, 0, r4, c7, c5, 0
+
+	#Wait for the operations to complete
+#ifdef PROCESSOR_ARCH_armv7_a
+	isb
+#else
+	# cp15 isb
+	mcr p15, 0, r4, c7, c5, 4
+#endif
+	
+
 #if defined(MACHINE_gta02)
 
Index: boot/arch/arm32/src/main.c
===================================================================
--- boot/arch/arm32/src/main.c	(revision 827aae522e4a488f1290f802e7f30a5b84733dda)
+++ boot/arch/arm32/src/main.c	(revision 163bc23131cbe01da4aa19cc6475db87c051ebb2)
@@ -115,6 +115,7 @@
 	printf(".\n");
 	
-	printf("Booting the kernel... \n");
-	jump_to_kernel((void *) PA2KA(BOOT_OFFSET), &bootinfo);
+	void *kernel_end = (void *) PA2KA(BOOT_OFFSET + components[0].inflated);
+	printf("Booting the kernel...\n");
+	jump_to_kernel((void *) PA2KA(BOOT_OFFSET), &bootinfo, kernel_end);
 }
 
Index: boot/arch/arm32/src/mm.c
===================================================================
--- boot/arch/arm32/src/mm.c	(revision 827aae522e4a488f1290f802e7f30a5b84733dda)
+++ boot/arch/arm32/src/mm.c	(revision 163bc23131cbe01da4aa19cc6475db87c051ebb2)
@@ -59,5 +59,5 @@
 	const unsigned long address = section << PTE_SECTION_SHIFT;
 	if (address >= BBXM_RAM_START && address < BBXM_RAM_END)
-		return 0;
+		return 1;
 #endif
 	return 0;