Index: boot/arch/arm32/src/asm.S
===================================================================
--- boot/arch/arm32/src/asm.S	(revision 66cb7a2fd40f97d52852a9c005fe3ac3c5ade316)
+++ boot/arch/arm32/src/asm.S	(revision 13dfda8f3ef4d6bd00994732e0cd8934dceeedce)
@@ -71,6 +71,8 @@
 	mrc	p15, 0, r4, c1, c0, 0
 	bic	r4, r4, #(1 << CP15_C1_DC)
+#ifndef PROCESSOR_ARCH_armv7_a
 	bic	r4, r4, #(1 << CP15_C1_IC)
 	bic	r4, r4, #(1 << CP15_C1_BP)
+#endif
 	mcr	p15, 0, r4, c1, c0, 0
 
Index: boot/arch/arm32/src/main.c
===================================================================
--- boot/arch/arm32/src/main.c	(revision 66cb7a2fd40f97d52852a9c005fe3ac3c5ade316)
+++ boot/arch/arm32/src/main.c	(revision 13dfda8f3ef4d6bd00994732e0cd8934dceeedce)
@@ -63,6 +63,6 @@
 {
 	const uintptr_t addr = (uintptr_t)address;
-	/* DCIMVAC - invalidate by address to the point of coherence */
 	for (uintptr_t a = addr; a < addr + size; a += 4) {
+		/* DCIMVAC - invalidate by address to the point of coherence */
 		asm volatile ("mcr p15, 0, %[a], c7, c6, 1\n" :: [a]"r"(a) : );
 	}
@@ -72,6 +72,6 @@
 {
 	const uintptr_t addr = (uintptr_t)address;
-	/* DCCMVAC - clean by address to the point of coherence */
 	for (uintptr_t a = addr; a < addr + size; a += 4) {
+		/* DCCMVAC - clean by address to the point of coherence */
 		asm volatile ("mcr p15, 0, %[a], c7, c10, 1\n" :: [a]"r"(a) : );
 	}
@@ -82,5 +82,5 @@
 void bootstrap(void)
 {
-	/* Make sure  we run in memory code when caches are enabled,
+	/* Make sure we run in memory code when caches are enabled,
 	 * make sure we read memory data too. This part is ARMv7 specific as
 	 * ARMv7 no longer invalidates caches on restart.
@@ -105,4 +105,5 @@
 		    components[i].start, components[i].name, components[i].inflated,
 		    components[i].size);
+		/* Make sure there is no cache garbage in read locations */
 		invalidate_dcache(components[i].start, components[i].size);
 	}
@@ -148,4 +149,5 @@
 			halt();
 		}
+		/* Make sure data are in the memory, ICache will need them */
 		clean_dcache_poc(dest[i - 1], components[i - 1].inflated);
 	}
