Index: kernel/arch/arm32/src/atomic.c
===================================================================
--- kernel/arch/arm32/src/atomic.c	(revision 78f0422c88ca476b4d86af8d7938c9291d9589c8)
+++ kernel/arch/arm32/src/atomic.c	(revision 133461cfb3c6b9057bc80b370c39a3e1d20202c2)
@@ -38,6 +38,8 @@
 #include <arch/asm.h>
 
-unsigned __atomic_fetch_add_4(volatile unsigned *mem, unsigned val, int model)
+unsigned __atomic_fetch_add_4(volatile void *mem0, unsigned val, int model)
 {
+	volatile unsigned *mem = mem0;
+
 	/*
 	 * This implementation is for UP pre-ARMv6 systems where we do not have
@@ -51,6 +53,8 @@
 }
 
-unsigned __atomic_fetch_sub_4(volatile unsigned *mem, unsigned val, int model)
+unsigned __atomic_fetch_sub_4(volatile void *mem0, unsigned val, int model)
 {
+	volatile unsigned *mem = mem0;
+
 	ipl_t ipl = interrupts_disable();
 	unsigned ret = *mem;
@@ -67,6 +71,9 @@
  * returns the previous value of \a *ptr.
  */
-void *__sync_val_compare_and_swap_4(void **ptr, void *expected, void *new_val)
+unsigned __sync_val_compare_and_swap_4(volatile void *ptr0, unsigned expected,
+    unsigned new_val)
 {
+	volatile unsigned *ptr = ptr0;
+
 	/*
 	 * Using an interrupt disabling spinlock might still lead to deadlock
@@ -78,5 +85,5 @@
 	irq_spinlock_lock(&cas_lock, true);
 
-	void *cur_val = *ptr;
+	unsigned cur_val = *ptr;
 
 	if (cur_val == expected) {
@@ -96,12 +103,15 @@
 /* Naive implementations of the newer intrinsics. */
 
-_Bool __atomic_compare_exchange_4(void **mem, void **expected, void *desired, _Bool weak, int success, int failure)
+_Bool __atomic_compare_exchange_4(volatile void *mem, void *expected0,
+    unsigned desired, _Bool weak, int success, int failure)
 {
+	unsigned *expected = expected0;
+
 	(void) weak;
 	(void) success;
 	(void) failure;
 
-	void *old = *expected;
-	void *new = __sync_val_compare_and_swap_4(mem, old, desired);
+	unsigned old = *expected;
+	unsigned new = __sync_val_compare_and_swap_4(mem, old, desired);
 	if (old == new) {
 		return 1;
@@ -112,10 +122,12 @@
 }
 
-void *__atomic_exchange_4(void **mem, void *val, int model)
+unsigned __atomic_exchange_4(volatile void *mem0, unsigned val, int model)
 {
+	volatile unsigned *mem = mem0;
+
 	(void) model;
 
 	irq_spinlock_lock(&cas_lock, true);
-	void *old = *mem;
+	unsigned old = *mem;
 	*mem = val;
 	irq_spinlock_unlock(&cas_lock, true);
Index: uspace/lib/c/arch/arm32/src/atomic.c
===================================================================
--- uspace/lib/c/arch/arm32/src/atomic.c	(revision 78f0422c88ca476b4d86af8d7938c9291d9589c8)
+++ uspace/lib/c/arch/arm32/src/atomic.c	(revision 133461cfb3c6b9057bc80b370c39a3e1d20202c2)
@@ -38,6 +38,10 @@
 volatile unsigned *ras_page;
 
-bool __atomic_compare_exchange_4(volatile unsigned *mem, unsigned *expected, unsigned desired, bool weak, int success, int failure)
+bool __atomic_compare_exchange_4(volatile void *mem0, void *expected0,
+    unsigned desired, bool weak, int success, int failure)
 {
+	volatile unsigned *mem = mem0;
+	unsigned *expected = expected0;
+
 	(void) success;
 	(void) failure;
@@ -82,6 +86,9 @@
 }
 
-unsigned short __atomic_fetch_add_2(volatile unsigned short *mem, unsigned short val, int model)
+unsigned short __atomic_fetch_add_2(volatile void *mem0, unsigned short val,
+    int model)
 {
+	volatile unsigned short *mem = mem0;
+
 	(void) model;
 
@@ -116,6 +123,8 @@
 }
 
-unsigned __atomic_fetch_add_4(volatile unsigned *mem, unsigned val, int model)
+unsigned __atomic_fetch_add_4(volatile void *mem0, unsigned val, int model)
 {
+	volatile unsigned *mem = mem0;
+
 	(void) model;
 
@@ -150,5 +159,5 @@
 }
 
-unsigned __atomic_fetch_sub_4(volatile unsigned *mem, unsigned val, int model)
+unsigned __atomic_fetch_sub_4(volatile void *mem, unsigned val, int model)
 {
 	return __atomic_fetch_add_4(mem, -val, model);
