Changeset 133461c in mainline
- Timestamp:
- 2023-10-22T17:49:28Z (14 months ago)
- Branches:
- master, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 1c6c3e1d, cc73f6d4
- Parents:
- 78f0422c
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2023-10-22 17:44:39)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2023-10-22 17:49:28)
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/atomic.c
r78f0422c r133461c 38 38 #include <arch/asm.h> 39 39 40 unsigned __atomic_fetch_add_4(volatile unsigned *mem, unsigned val, int model)40 unsigned __atomic_fetch_add_4(volatile void *mem0, unsigned val, int model) 41 41 { 42 volatile unsigned *mem = mem0; 43 42 44 /* 43 45 * This implementation is for UP pre-ARMv6 systems where we do not have … … 51 53 } 52 54 53 unsigned __atomic_fetch_sub_4(volatile unsigned *mem, unsigned val, int model)55 unsigned __atomic_fetch_sub_4(volatile void *mem0, unsigned val, int model) 54 56 { 57 volatile unsigned *mem = mem0; 58 55 59 ipl_t ipl = interrupts_disable(); 56 60 unsigned ret = *mem; … … 67 71 * returns the previous value of \a *ptr. 68 72 */ 69 void *__sync_val_compare_and_swap_4(void **ptr, void *expected, void *new_val) 73 unsigned __sync_val_compare_and_swap_4(volatile void *ptr0, unsigned expected, 74 unsigned new_val) 70 75 { 76 volatile unsigned *ptr = ptr0; 77 71 78 /* 72 79 * Using an interrupt disabling spinlock might still lead to deadlock … … 78 85 irq_spinlock_lock(&cas_lock, true); 79 86 80 void *cur_val = *ptr;87 unsigned cur_val = *ptr; 81 88 82 89 if (cur_val == expected) { … … 96 103 /* Naive implementations of the newer intrinsics. */ 97 104 98 _Bool __atomic_compare_exchange_4(void **mem, void **expected, void *desired, _Bool weak, int success, int failure) 105 _Bool __atomic_compare_exchange_4(volatile void *mem, void *expected0, 106 unsigned desired, _Bool weak, int success, int failure) 99 107 { 108 unsigned *expected = expected0; 109 100 110 (void) weak; 101 111 (void) success; 102 112 (void) failure; 103 113 104 void *old = *expected;105 void *new = __sync_val_compare_and_swap_4(mem, old, desired);114 unsigned old = *expected; 115 unsigned new = __sync_val_compare_and_swap_4(mem, old, desired); 106 116 if (old == new) { 107 117 return 1; … … 112 122 } 113 123 114 void *__atomic_exchange_4(void **mem, void *val, int model)124 unsigned __atomic_exchange_4(volatile void *mem0, unsigned val, int model) 115 125 { 126 volatile unsigned *mem = mem0; 127 116 128 (void) model; 117 129 118 130 irq_spinlock_lock(&cas_lock, true); 119 void *old = *mem;131 unsigned old = *mem; 120 132 *mem = val; 121 133 irq_spinlock_unlock(&cas_lock, true); -
uspace/lib/c/arch/arm32/src/atomic.c
r78f0422c r133461c 38 38 volatile unsigned *ras_page; 39 39 40 bool __atomic_compare_exchange_4(volatile unsigned *mem, unsigned *expected, unsigned desired, bool weak, int success, int failure) 40 bool __atomic_compare_exchange_4(volatile void *mem0, void *expected0, 41 unsigned desired, bool weak, int success, int failure) 41 42 { 43 volatile unsigned *mem = mem0; 44 unsigned *expected = expected0; 45 42 46 (void) success; 43 47 (void) failure; … … 82 86 } 83 87 84 unsigned short __atomic_fetch_add_2(volatile unsigned short *mem, unsigned short val, int model) 88 unsigned short __atomic_fetch_add_2(volatile void *mem0, unsigned short val, 89 int model) 85 90 { 91 volatile unsigned short *mem = mem0; 92 86 93 (void) model; 87 94 … … 116 123 } 117 124 118 unsigned __atomic_fetch_add_4(volatile unsigned *mem, unsigned val, int model)125 unsigned __atomic_fetch_add_4(volatile void *mem0, unsigned val, int model) 119 126 { 127 volatile unsigned *mem = mem0; 128 120 129 (void) model; 121 130 … … 150 159 } 151 160 152 unsigned __atomic_fetch_sub_4(volatile unsigned *mem, unsigned val, int model)161 unsigned __atomic_fetch_sub_4(volatile void *mem, unsigned val, int model) 153 162 { 154 163 return __atomic_fetch_add_4(mem, -val, model);
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