Index: boot/arch/arm32/src/main.c
===================================================================
--- boot/arch/arm32/src/main.c	(revision f288d85e3e9c267eea05c097de761199f08ce773)
+++ boot/arch/arm32/src/main.c	(revision 12d6c984367491a333f4e1724f2e966246811839)
@@ -53,20 +53,4 @@
 extern void *bdata_end;
 
-
-static inline void invalidate_icache(void)
-{
-	/* ICIALLU Invalidate entire ICache */
-	asm volatile ("mov r0, #0\n" "mcr p15, 0, r0, c7, c5, 0\n" ::: "r0" );
-}
-
-static inline void invalidate_dcache(void *address, size_t size)
-{
-	const uintptr_t addr = (uintptr_t)address;
-	for (uintptr_t a = addr; a < addr + size; a += 4) {
-		/* DCIMVAC - invalidate by address to the point of coherence */
-		asm volatile ("mcr p15, 0, %[a], c7, c6, 1\n" :: [a]"r"(a) : );
-	}
-}
-
 static inline void clean_dcache_poc(void *address, size_t size)
 {
@@ -82,11 +66,4 @@
 void bootstrap(void)
 {
-	/* Make sure we run in memory code when caches are enabled,
-	 * make sure we read memory data too. This part is ARMv7 specific as
-	 * ARMv7 no longer invalidates caches on restart.
-	 * See chapter B2.2.2 of ARM Architecture Reference Manual p. B2-1263*/
-	invalidate_icache();
-	invalidate_dcache(&bdata_start, &bdata_end - &bdata_start);
-
 	/* Enable MMU and caches */
 	mmu_start();
@@ -105,6 +82,4 @@
 		    components[i].start, components[i].name, components[i].inflated,
 		    components[i].size);
-		/* Make sure there is no cache garbage in read locations */
-		invalidate_dcache(components[i].start, components[i].size);
 	}