Index: arch/amd64/include/asm.h
===================================================================
--- arch/amd64/include/asm.h	(revision 040e4e960e3a23fb69c3cf9e7c8ae7112d7bf526)
+++ arch/amd64/include/asm.h	(revision 11928d5ea4de28b59bb306148834413475d2daf6)
@@ -208,5 +208,5 @@
 static inline void gdtr_load(struct ptr_16_64 *gdtr_reg)
 {
-	__asm__ volatile ("lgdt %0\n" : : "m" (*gdtr_reg));
+	__asm__ volatile ("lgdtq %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -217,5 +217,5 @@
 static inline void gdtr_store(struct ptr_16_64 *gdtr_reg)
 {
-	__asm__ volatile ("sgdt %0\n" : : "m" (*gdtr_reg));
+	__asm__ volatile ("sgdtq %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -226,5 +226,5 @@
 static inline void idtr_load(struct ptr_16_64 *idtr_reg)
 {
-	__asm__ volatile ("lidt %0\n" : : "m" (*idtr_reg));
+	__asm__ volatile ("lidtq %0\n" : : "m" (*idtr_reg));
 }
 
Index: arch/amd64/src/pm.c
===================================================================
--- arch/amd64/src/pm.c	(revision 040e4e960e3a23fb69c3cf9e7c8ae7112d7bf526)
+++ arch/amd64/src/pm.c	(revision 11928d5ea4de28b59bb306148834413475d2daf6)
@@ -214,5 +214,5 @@
 	
 	gdt_tss_setbase(&gdt_p[TSS_DES], (__address) tss_p);
-	gdt_tss_setlimit(&gdt_p[TSS_DES], sizeof(tss_t) - 1);
+	gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
 
 	gdtr_load(&gdtr);
Index: arch/ia32/include/asm.h
===================================================================
--- arch/ia32/include/asm.h	(revision 040e4e960e3a23fb69c3cf9e7c8ae7112d7bf526)
+++ arch/ia32/include/asm.h	(revision 11928d5ea4de28b59bb306148834413475d2daf6)
@@ -259,5 +259,5 @@
 static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
 {
-	__asm__ volatile ("lgdt %0\n" : : "m" (*gdtr_reg));
+	__asm__ volatile ("lgdtl %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -268,5 +268,5 @@
 static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
 {
-	__asm__ volatile ("sgdt %0\n" : : "m" (*gdtr_reg));
+	__asm__ volatile ("sgdtl %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -277,5 +277,5 @@
 static inline void idtr_load(ptr_16_32_t *idtr_reg)
 {
-	__asm__ volatile ("lidt %0\n" : : "m" (*idtr_reg));
+	__asm__ volatile ("lidtl %0\n" : : "m" (*idtr_reg));
 }
 
Index: arch/ia32/include/smp/apic.h
===================================================================
--- arch/ia32/include/smp/apic.h	(revision 040e4e960e3a23fb69c3cf9e7c8ae7112d7bf526)
+++ arch/ia32/include/smp/apic.h	(revision 11928d5ea4de28b59bb306148834413475d2daf6)
@@ -128,5 +128,5 @@
 typedef struct icr icr_t;
 
-/* End Of Interrupt */
+/* End Of Interrupt. */
 #define EOI		(0x0b0/sizeof(__u32))
 
@@ -252,5 +252,5 @@
 typedef union l_apic_id l_apic_id_t;
 
-/* Local APIC Version Register */
+/** Local APIC Version Register */
 #define LAVR		(0x030/sizeof(__u32))
 #define LAVR_Mask	0xff
@@ -264,5 +264,5 @@
 	__u32 value;
 	struct {
-		unsigned : 24;		/**< Reserver. */
+		unsigned : 24;		/**< Reserved. */
 		__u8 id;		/**< Logical APIC ID. */
 	} __attribute__ ((packed));
@@ -320,5 +320,5 @@
 		struct {
 			unsigned : 24;			/**< Reserved. */
-			__u8 dest : 8;		/**< Destination Field. */
+			__u8 dest : 8;			/**< Destination Field. */
 		} __attribute__ ((packed));
 	};
Index: arch/ia32/src/pm.c
===================================================================
--- arch/ia32/src/pm.c	(revision 040e4e960e3a23fb69c3cf9e7c8ae7112d7bf526)
+++ arch/ia32/src/pm.c	(revision 11928d5ea4de28b59bb306148834413475d2daf6)
@@ -200,8 +200,8 @@
 	gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
 	gdt_p[TSS_DES].special = 1;
-	gdt_p[TSS_DES].granularity = 1;
+	gdt_p[TSS_DES].granularity = 0;
 	
 	gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p);
-	gdt_setlimit(&gdt_p[TSS_DES], sizeof(tss_t) - 1);
+	gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
 
 	/*
@@ -211,5 +211,5 @@
 	tr_load(selector(TSS_DES));
 	
-	clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels */
+	clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels and clear NT flag. */
 	clean_AM_flag();          /* Disable alignment check */
 }
Index: arch/ia32/src/proc/scheduler.c
===================================================================
--- arch/ia32/src/proc/scheduler.c	(revision 040e4e960e3a23fb69c3cf9e7c8ae7112d7bf526)
+++ arch/ia32/src/proc/scheduler.c	(revision 11928d5ea4de28b59bb306148834413475d2daf6)
@@ -37,4 +37,5 @@
 #include <arch/asm.h>
 #include <adt/bitmap.h>
+#include <print.h>
 
 /** Perform ia32 specific tasks needed before the new task is run.
@@ -56,5 +57,5 @@
 	if ((bits = TASK->arch.iomap.bits)) {
 		bitmap_t iomap;
-
+	
 		ASSERT(TASK->arch.iomap.map);
 		bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
Index: generic/include/adt/bitmap.h
===================================================================
--- generic/include/adt/bitmap.h	(revision 040e4e960e3a23fb69c3cf9e7c8ae7112d7bf526)
+++ generic/include/adt/bitmap.h	(revision 11928d5ea4de28b59bb306148834413475d2daf6)
@@ -33,5 +33,5 @@
 #include <typedefs.h>
 
-#define BITS2BYTES(bits)	((((bits)-1)>>3)+1)
+#define BITS2BYTES(bits)	(bits ? ((((bits)-1)>>3)+1) : 0)
 
 typedef struct {