Index: kernel/arch/sparc64/Makefile.inc =================================================================== --- kernel/arch/sparc64/Makefile.inc (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/Makefile.inc (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,94 @@ +# +# Copyright (C) 2005 Martin Decky +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +## Toolchain configuration +# + +BFD_NAME = elf64-sparc +BFD_ARCH = sparc +BFD = binary +TARGET = sparc64-linux-gnu +TOOLCHAIN_DIR = /usr/local/sparc64/bin + +## Make some default assumptions +# + +CFLAGS += -mcpu=ultrasparc -m64 +LFLAGS += -no-check-sections -N + +DEFS += -D__64_BITS__ + +## Own configuration directives +# + +CONFIG_OFW = y + +## Compile with page hash table support. +# + +CONFIG_PAGE_HT = y +DEFS += -DCONFIG_PAGE_HT + +## Compile with support for address space identifiers. +# + +CONFIG_ASID = y +CONFIG_ASID_FIFO = y + +## Compile with support for framebuffer. +# + +CONFIG_FB = y + +## Compile with support for i8042 controller. +# + +CONFIG_I8042 = y + +ARCH_SOURCES = \ + arch/$(ARCH)/src/cpu/cpu.c \ + arch/$(ARCH)/src/asm.S \ + arch/$(ARCH)/src/panic.S \ + arch/$(ARCH)/src/console.c \ + arch/$(ARCH)/src/context.S \ + arch/$(ARCH)/src/dummy.s \ + arch/$(ARCH)/src/mm/as.c \ + arch/$(ARCH)/src/mm/frame.c \ + arch/$(ARCH)/src/mm/page.c \ + arch/$(ARCH)/src/mm/tlb.c \ + arch/$(ARCH)/src/mm/memory_init.c \ + arch/$(ARCH)/src/sparc64.c \ + arch/$(ARCH)/src/start.S \ + arch/$(ARCH)/src/proc/scheduler.c \ + arch/$(ARCH)/src/trap/trap_table.S \ + arch/$(ARCH)/src/trap/trap.c \ + arch/$(ARCH)/src/trap/exception.c \ + arch/$(ARCH)/src/trap/interrupt.c \ + arch/$(ARCH)/src/ddi/ddi.c \ + arch/$(ARCH)/src/drivers/tick.c \ + arch/$(ARCH)/src/drivers/i8042.c Index: kernel/arch/sparc64/_link.ld.in =================================================================== --- kernel/arch/sparc64/_link.ld.in (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/_link.ld.in (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,49 @@ +/** SPARC64 linker script + * + * It is ELF format, but its only section looks like this: + * kernel text + * kernel data + * + */ + +#define __ASM__ +#include + +ENTRY(kernel_image_start) + +SECTIONS { + .image VMA: AT (LMA) { + ktext_start = .; + *(K_TEXT_START) + *(.text); + ktext_end = .; + + kdata_start = .; + *(K_DATA_START) + *(.rodata); + *(.rodata.*); + *(.data); /* initialized data */ + *(.sdata); + *(.sdata2); + *(.sbss); + hardcoded_ktext_size = .; + QUAD(ktext_end - ktext_start); + hardcoded_kdata_size = .; + QUAD(kdata_end - kdata_start); + hardcoded_load_address = .; + QUAD(VMA); + *(.bss); /* uninitialized static variables */ + *(COMMON); /* global variables */ + + symbol_table = .; + *(symtab.*); /* Symbol table, must be LAST symbol!*/ + + kdata_end = .; + } + + /DISCARD/ : { + *(.comment); + *(.note*); + } + +} Index: kernel/arch/sparc64/include/arch.h =================================================================== --- kernel/arch/sparc64/include/arch.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/arch.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_ARCH_H__ +#define __sparc64_ARCH_H__ + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/arg.h =================================================================== --- kernel/arch/sparc64/include/arg.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/arg.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_ARG_H__ +#define __sparc64_ARG_H__ + +#include + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/asm.h =================================================================== --- kernel/arch/sparc64/include/asm.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/asm.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,314 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_ASM_H_ +#define KERN_sparc64_ASM_H_ + +#include +#include +#include +#include + +/** Read Processor State register. + * + * @return Value of PSTATE register. + */ +static inline uint64_t pstate_read(void) +{ + uint64_t v; + + __asm__ volatile ("rdpr %%pstate, %0\n" : "=r" (v)); + + return v; +} + +/** Write Processor State register. + * + * @param v New value of PSTATE register. + */ +static inline void pstate_write(uint64_t v) +{ + __asm__ volatile ("wrpr %0, %1, %%pstate\n" : : "r" (v), "i" (0)); +} + +/** Read TICK_compare Register. + * + * @return Value of TICK_comapre register. + */ +static inline uint64_t tick_compare_read(void) +{ + uint64_t v; + + __asm__ volatile ("rd %%tick_cmpr, %0\n" : "=r" (v)); + + return v; +} + +/** Write TICK_compare Register. + * + * @param v New value of TICK_comapre register. + */ +static inline void tick_compare_write(uint64_t v) +{ + __asm__ volatile ("wr %0, %1, %%tick_cmpr\n" : : "r" (v), "i" (0)); +} + +/** Read TICK Register. + * + * @return Value of TICK register. + */ +static inline uint64_t tick_read(void) +{ + uint64_t v; + + __asm__ volatile ("rdpr %%tick, %0\n" : "=r" (v)); + + return v; +} + +/** Write TICK Register. + * + * @param v New value of TICK register. + */ +static inline void tick_write(uint64_t v) +{ + __asm__ volatile ("wrpr %0, %1, %%tick\n" : : "r" (v), "i" (0)); +} + +/** Read SOFTINT Register. + * + * @return Value of SOFTINT register. + */ +static inline uint64_t softint_read(void) +{ + uint64_t v; + + __asm__ volatile ("rd %%softint, %0\n" : "=r" (v)); + + return v; +} + +/** Write SOFTINT Register. + * + * @param v New value of SOFTINT register. + */ +static inline void softint_write(uint64_t v) +{ + __asm__ volatile ("wr %0, %1, %%softint\n" : : "r" (v), "i" (0)); +} + +/** Write CLEAR_SOFTINT Register. + * + * Bits set in CLEAR_SOFTINT register will be cleared in SOFTINT register. + * + * @param v New value of CLEAR_SOFTINT register. + */ +static inline void clear_softint_write(uint64_t v) +{ + __asm__ volatile ("wr %0, %1, %%clear_softint\n" : : "r" (v), "i" (0)); +} + +/** Enable interrupts. + * + * Enable interrupts and return previous + * value of IPL. + * + * @return Old interrupt priority level. + */ +static inline ipl_t interrupts_enable(void) { + pstate_reg_t pstate; + uint64_t value; + + value = pstate_read(); + pstate.value = value; + pstate.ie = true; + pstate_write(pstate.value); + + return (ipl_t) value; +} + +/** Disable interrupts. + * + * Disable interrupts and return previous + * value of IPL. + * + * @return Old interrupt priority level. + */ +static inline ipl_t interrupts_disable(void) { + pstate_reg_t pstate; + uint64_t value; + + value = pstate_read(); + pstate.value = value; + pstate.ie = false; + pstate_write(pstate.value); + + return (ipl_t) value; +} + +/** Restore interrupt priority level. + * + * Restore IPL. + * + * @param ipl Saved interrupt priority level. + */ +static inline void interrupts_restore(ipl_t ipl) { + pstate_reg_t pstate; + + pstate.value = pstate_read(); + pstate.ie = ((pstate_reg_t) ipl).ie; + pstate_write(pstate.value); +} + +/** Return interrupt priority level. + * + * Return IPL. + * + * @return Current interrupt priority level. + */ +static inline ipl_t interrupts_read(void) { + return (ipl_t) pstate_read(); +} + +/** Return base address of current stack. + * + * Return the base address of the current stack. + * The stack is assumed to be STACK_SIZE bytes long. + * The stack must start on page boundary. + */ +static inline uintptr_t get_stack_base(void) +{ + uintptr_t v; + + __asm__ volatile ("and %%sp, %1, %0\n" : "=r" (v) : "r" (~(STACK_SIZE-1))); + + return v; +} + +/** Read Version Register. + * + * @return Value of VER register. + */ +static inline uint64_t ver_read(void) +{ + uint64_t v; + + __asm__ volatile ("rdpr %%ver, %0\n" : "=r" (v)); + + return v; +} + +/** Read Trap Base Address register. + * + * @return Current value in TBA. + */ +static inline uint64_t tba_read(void) +{ + uint64_t v; + + __asm__ volatile ("rdpr %%tba, %0\n" : "=r" (v)); + + return v; +} + +/** Read Trap Program Counter register. + * + * @return Current value in TPC. + */ +static inline uint64_t tpc_read(void) +{ + uint64_t v; + + __asm__ volatile ("rdpr %%tpc, %0\n" : "=r" (v)); + + return v; +} + +/** Read Trap Level register. + * + * @return Current value in TL. + */ +static inline uint64_t tl_read(void) +{ + uint64_t v; + + __asm__ volatile ("rdpr %%tl, %0\n" : "=r" (v)); + + return v; +} + +/** Write Trap Base Address register. + * + * @param v New value of TBA. + */ +static inline void tba_write(uint64_t v) +{ + __asm__ volatile ("wrpr %0, %1, %%tba\n" : : "r" (v), "i" (0)); +} + +/** Load uint64_t from alternate space. + * + * @param asi ASI determining the alternate space. + * @param va Virtual address within the ASI. + * + * @return Value read from the virtual address in the specified address space. + */ +static inline uint64_t asi_u64_read(asi_t asi, uintptr_t va) +{ + uint64_t v; + + __asm__ volatile ("ldxa [%1] %2, %0\n" : "=r" (v) : "r" (va), "i" (asi)); + + return v; +} + +/** Store uint64_t to alternate space. + * + * @param asi ASI determining the alternate space. + * @param va Virtual address within the ASI. + * @param v Value to be written. + */ +static inline void asi_u64_write(asi_t asi, uintptr_t va, uint64_t v) +{ + __asm__ volatile ("stxa %0, [%1] %2\n" : : "r" (v), "r" (va), "i" (asi) : "memory"); +} + +void cpu_halt(void); +void cpu_sleep(void); +void asm_delay_loop(uint32_t t); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/atomic.h =================================================================== --- kernel/arch/sparc64/include/atomic.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/atomic.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_ATOMIC_H__ +#define __sparc64_ATOMIC_H__ + +#include +#include + +/** Atomic add operation. + * + * Use atomic compare and swap operation to atomically add signed value. + * + * @param val Atomic variable. + * @param i Signed value to be added. + * + * @return Value of the atomic variable as it existed before addition. + */ +static inline long atomic_add(atomic_t *val, int i) +{ + uint64_t a, b; + volatile uint64_t x = (uint64_t) &val->count; + + __asm__ volatile ( + "0:\n" + "ldx %0, %1\n" + "add %1, %3, %2\n" + "casx %0, %1, %2\n" + "cmp %1, %2\n" + "bne 0b\n" /* The operation failed and must be attempted again if a != b. */ + "nop\n" + : "=m" (*((uint64_t *)x)), "=r" (a), "=r" (b) + : "r" (i) + ); + + return a; +} + +static inline long atomic_preinc(atomic_t *val) +{ + return atomic_add(val, 1) + 1; +} + +static inline long atomic_postinc(atomic_t *val) +{ + return atomic_add(val, 1); +} + +static inline long atomic_predec(atomic_t *val) +{ + return atomic_add(val, -1) - 1; +} + +static inline long atomic_postdec(atomic_t *val) +{ + return atomic_add(val, -1); +} + +static inline void atomic_inc(atomic_t *val) +{ + (void) atomic_add(val, 1); +} + +static inline void atomic_dec(atomic_t *val) +{ + (void) atomic_add(val, -1); +} + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/barrier.h =================================================================== --- kernel/arch/sparc64/include/barrier.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/barrier.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,73 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_BARRIER_H__ +#define __sparc64_BARRIER_H__ + +/* + * TODO: Implement true SPARC V9 memory barriers for macros below. + */ +#define CS_ENTER_BARRIER() __asm__ volatile ("" ::: "memory") +#define CS_LEAVE_BARRIER() __asm__ volatile ("" ::: "memory") + +#define memory_barrier() +#define read_barrier() +#define write_barrier() + +/** Flush Instruction Memory instruction. */ +static inline void flush(void) +{ + /* + * The FLUSH instruction takes address parameter. + * As such, it may trap if the address is not found in DTLB. + * However, JPS1 implementations are free to ignore the trap. + */ + + /* + * %i7 should provide address that is always mapped in DTLB + * as it is a pointer to kernel code. + */ + __asm__ volatile ("flush %i7\n"); +} + +/** Memory Barrier instruction. */ +static inline void membar(void) +{ + __asm__ volatile ("membar #Sync\n"); +} + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/boot/boot.h =================================================================== --- kernel/arch/sparc64/include/boot/boot.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/boot/boot.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_BOOT_H__ +#define __sparc64_BOOT_H__ + +#define VMA 0x400000 +#define LMA VMA + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/byteorder.h =================================================================== --- kernel/arch/sparc64/include/byteorder.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/byteorder.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_BYTEORDER_H__ +#define __sparc64_BYTEORDER_H__ + +#include +#include + +static inline uint64_t uint64_t_le2host(uint64_t n) +{ + return uint64_t_byteorder_swap(n); +} + +static inline unative_t unative_t_le2host(unative_t n) +{ + return uint64_t_byteorder_swap(n); +} + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/console.h =================================================================== --- kernel/arch/sparc64/include/console.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/console.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_CONSOLE_H_ +#define KERN_sparc64_CONSOLE_H_ + +extern void kkbdpoll(void *arg); +extern void ofw_sparc64_console_init(void); +extern void standalone_sparc64_console_init(void); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/context.h =================================================================== --- kernel/arch/sparc64/include/context.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/context.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_CONTEXT_H__ +#define __sparc64_CONTEXT_H__ + +#ifndef __sparc64_STACK_H__ +# include +#endif + +#ifndef __sparc64_TYPES_H__ +# include +#endif + +#ifndef __ALIGN_H__ +# include +#endif + +#define SP_DELTA STACK_WINDOW_SAVE_AREA_SIZE + +#ifdef context_set +#undef context_set +#endif + +#define context_set(c, _pc, stack, size) \ + (c)->pc = ((uintptr_t) _pc) - 8; \ + (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - (STACK_BIAS + SP_DELTA); \ + (c)->fp = -STACK_BIAS; \ + (c)->cleanwin = 0 + + +/* + * Only save registers that must be preserved across + * function calls. + */ +struct context { + uintptr_t sp; /* %o6 */ + uintptr_t pc; /* %o7 */ + uint64_t i0; + uint64_t i1; + uint64_t i2; + uint64_t i3; + uint64_t i4; + uint64_t i5; + uintptr_t fp; /* %i6 */ + uintptr_t i7; + uint64_t l0; + uint64_t l1; + uint64_t l2; + uint64_t l3; + uint64_t l4; + uint64_t l5; + uint64_t l6; + uint64_t l7; + ipl_t ipl; + uint64_t cleanwin; +}; + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/context_offset.h =================================================================== --- kernel/arch/sparc64/include/context_offset.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/context_offset.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,25 @@ +/* This file is automatically generated by gencontext.c. */ +/* struct context */ +#define OFFSET_SP 0x0 +#define OFFSET_PC 0x8 +#define OFFSET_I0 0x10 +#define OFFSET_I1 0x18 +#define OFFSET_I2 0x20 +#define OFFSET_I3 0x28 +#define OFFSET_I4 0x30 +#define OFFSET_I5 0x38 +#define OFFSET_FP 0x40 +#define OFFSET_I7 0x48 +#define OFFSET_L0 0x50 +#define OFFSET_L1 0x58 +#define OFFSET_L2 0x60 +#define OFFSET_L3 0x68 +#define OFFSET_L4 0x70 +#define OFFSET_L5 0x78 +#define OFFSET_L6 0x80 +#define OFFSET_L7 0x88 +#define OFFSET_CLEANWIN 0x98 + + /** @} + */ + Index: kernel/arch/sparc64/include/cpu.h =================================================================== --- kernel/arch/sparc64/include/cpu.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/cpu.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_CPU_H__ +#define __sparc64_CPU_H__ + +#include + +#define MANUF_FUJITSU 0x04 +#define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ +#define MANUF_SUN 0x3e + +#define IMPL_ULTRASPARCI 0x10 +#define IMPL_ULTRASPARCII 0x11 +#define IMPL_ULTRASPARCII_I 0x12 +#define IMPL_ULTRASPARCII_E 0x13 +#define IMPL_ULTRASPARCIII 0x15 +#define IMPL_ULTRASPARCIV_PLUS 0x19 + +#define IMPL_SPARC64V 0x5 + +struct cpu_arch { + ver_reg_t ver; +}; + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/debug.h =================================================================== --- kernel/arch/sparc64/include/debug.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/debug.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2005 + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64debug + * @{ + */ +/** @file + */ + +#ifndef __sparc64_DEBUG_H__ +#define __sparc64_DEBUG_H__ + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/drivers/fb.h =================================================================== --- kernel/arch/sparc64/include/drivers/fb.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/drivers/fb.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_FB_H_ +#define KERN_sparc64_FB_H_ + +#define FB_PHYS_ADDRESS 0x1c901000000ULL + +#define FB_X_RES 1152 +#define FB_Y_RES 900 + +#define FB_COLOR_DEPTH 8 + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/drivers/i8042.h =================================================================== --- kernel/arch/sparc64/include/drivers/i8042.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/drivers/i8042.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_I8042_H_ +#define KERN_sparc64_I8042_H_ + +#include + +#define KBD_PHYS_ADDRESS 0x1fff8904000ULL + +#define STATUS_REG 4 +#define COMMAND_REG 4 +#define DATA_REG 6 + +#define LAST_REG DATA_REG + +extern volatile uint8_t *kbd_virt_address; + +static inline void i8042_data_write(uint8_t data) +{ + kbd_virt_address[DATA_REG] = data; +} + +static inline uint8_t i8042_data_read(void) +{ + return kbd_virt_address[DATA_REG]; +} + +static inline uint8_t i8042_status_read(void) +{ + return kbd_virt_address[STATUS_REG]; +} + +static inline void i8042_command_write(uint8_t command) +{ + kbd_virt_address[COMMAND_REG] = command; +} + +extern void kbd_init(void); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/drivers/tick.h =================================================================== --- kernel/arch/sparc64/include/drivers/tick.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/drivers/tick.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_TICK_H__ +#define __sparc64_TICK_H__ + +#include + +#define TICK_DELTA 500000 + +extern void tick_init(void); +extern void tick_interrupt(int n, istate_t *istate); + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/elf.h =================================================================== --- kernel/arch/sparc64/include/elf.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/elf.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_ELF_H__ +#define __sparc64_ELF_H__ + +#define ELF_MACHINE EM_SPARCV9 +#define ELF_DATA_ENCODING ELFDATA2MSB +#define ELF_CLASS ELFCLASS64 + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/faddr.h =================================================================== --- kernel/arch/sparc64/include/faddr.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/faddr.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_FADDR_H__ +#define __sparc64_FADDR_H__ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/fpu_context.h =================================================================== --- kernel/arch/sparc64/include/fpu_context.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/fpu_context.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_FPU_CONTEXT_H__ +#define __sparc64_FPU_CONTEXT_H__ + +#include + +struct fpu_context { +}; + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/interrupt.h =================================================================== --- kernel/arch/sparc64/include/interrupt.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/interrupt.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64interrupt sparc64 + * @ingroup interrupt + * @{ + */ +/** @file + */ + +#ifndef __sparc64_INTERRUPT_H__ +#define __sparc64_INTERRUPT_H__ + +#include +#include + +#define IRQ_COUNT 1 /* TODO */ + +#define IVT_ITEMS 15 +#define IVT_FIRST 1 + +/* Dummy macros. */ +#define IRQ_KBD 2 +#define VECTOR_KBD IRQ_KBD + +#define trap_virtual_enable_irqs(x) +#define trap_virtual_eoi() + +struct istate { +}; + +static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr) +{ + /* TODO */ +} +static inline int istate_from_uspace(istate_t *istate) +{ + /* TODO */ + return 0; +} +static inline unative_t istate_get_pc(istate_t *istate) +{ + /* TODO */ + return 0; +} + + +extern void interrupt_register(int n, const char *name, iroutine f); + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/memstr.h =================================================================== --- kernel/arch/sparc64/include/memstr.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/memstr.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2005 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_MEMSTR_H__ +#define __sparc64_MEMSTR_H__ + +#define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) + +extern void memsetw(uintptr_t dst, size_t cnt, uint16_t x); +extern void memsetb(uintptr_t dst, size_t cnt, uint8_t x); + +extern int memcmp(uintptr_t src, uintptr_t dst, int cnt); + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/mm/as.h =================================================================== --- kernel/arch/sparc64/include/mm/as.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/mm/as.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef __sparc64_AS_H__ +#define __sparc64_AS_H__ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 1 + +#define KERNEL_ADDRESS_SPACE_START_ARCH (unsigned long) 0x0000000000000000 +#define KERNEL_ADDRESS_SPACE_END_ARCH (unsigned long) 0xffffffffffffffff +#define USER_ADDRESS_SPACE_START_ARCH (unsigned long) 0x0000000000000000 +#define USER_ADDRESS_SPACE_END_ARCH (unsigned long) 0xffffffffffffffff + +#define USTACK_ADDRESS_ARCH (0x7fffffffffffffff-(PAGE_SIZE-1)) + +#define as_install_arch(as) + +extern void as_arch_init(void); + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/mm/asid.h =================================================================== --- kernel/arch/sparc64/include/mm/asid.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/mm/asid.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef __sparc64_ASID_H__ +#define __sparc64_ASID_H__ + +#include + +/* + * On SPARC, Context means the same thing as ASID trough out the kernel. + */ +typedef uint16_t asid_t; + +#define ASID_MAX_ARCH 8191 /* 2^13 - 1 */ + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/mm/frame.h =================================================================== --- kernel/arch/sparc64/include/mm/frame.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/mm/frame.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef __sparc64_FRAME_H__ +#define __sparc64_FRAME_H__ + +#define FRAME_WIDTH 13 /* 8K */ +#define FRAME_SIZE (1< + +union frame_address { + uintptr_t address; + struct { + unsigned : 23; + uint64_t pfn : 28; /**< Physical Frame Number. */ + unsigned offset : 13; /**< Offset. */ + } __attribute__ ((packed)); +}; + +typedef union frame_address frame_address_t; + +extern void frame_arch_init(void); + +#endif +#endif + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/mm/memory_init.h =================================================================== --- kernel/arch/sparc64/include/mm/memory_init.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/mm/memory_init.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef __sparc64_MEMORY_INIT_H__ +#define __sparc64_MEMORY_INIT_H__ + +#include + +extern size_t get_memory_size(void); + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/mm/mmu.h =================================================================== --- kernel/arch/sparc64/include/mm/mmu.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/mm/mmu.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,137 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef __sparc64_MMU_H__ +#define __sparc64_MMU_H__ + +#include +#include +#include +#include + +/** LSU Control Register ASI. */ +#define ASI_LSU_CONTROL_REG 0x45 /**< Load/Store Unit Control Register. */ + +/** I-MMU ASIs. */ +#define ASI_IMMU 0x50 +#define ASI_IMMU_TSB_8KB_PTR_REG 0x51 +#define ASI_IMMU_TSB_64KB_PTR_REG 0x52 +#define ASI_ITLB_DATA_IN_REG 0x54 +#define ASI_ITLB_DATA_ACCESS_REG 0x55 +#define ASI_ITLB_TAG_READ_REG 0x56 +#define ASI_IMMU_DEMAP 0x57 + +/** Virtual Addresses within ASI_IMMU. */ +#define VA_IMMU_TAG_TARGET 0x0 /**< IMMU tag target register. */ +#define VA_IMMU_SFSR 0x18 /**< IMMU sync fault status register. */ +#define VA_IMMU_TSB_BASE 0x28 /**< IMMU TSB base register. */ +#define VA_IMMU_TAG_ACCESS 0x30 /**< IMMU TLB tag access register. */ + +/** D-MMU ASIs. */ +#define ASI_DMMU 0x58 +#define ASI_DMMU_TSB_8KB_PTR_REG 0x59 +#define ASI_DMMU_TSB_64KB_PTR_REG 0x5a +#define ASI_DMMU_TSB_DIRECT_PTR_REG 0x5b +#define ASI_DTLB_DATA_IN_REG 0x5c +#define ASI_DTLB_DATA_ACCESS_REG 0x5d +#define ASI_DTLB_TAG_READ_REG 0x5e +#define ASI_DMMU_DEMAP 0x5f + +/** Virtual Addresses within ASI_DMMU. */ +#define VA_DMMU_TAG_TARGET 0x0 /**< DMMU tag target register. */ +#define VA_PRIMARY_CONTEXT_REG 0x8 /**< DMMU primary context register. */ +#define VA_SECONDARY_CONTEXT_REG 0x10 /**< DMMU secondary context register. */ +#define VA_DMMU_SFSR 0x18 /**< DMMU sync fault status register. */ +#define VA_DMMU_SFAR 0x20 /**< DMMU sync fault address register. */ +#define VA_DMMU_TSB_BASE 0x28 /**< DMMU TSB base register. */ +#define VA_DMMU_TAG_ACCESS 0x30 /**< DMMU TLB tag access register. */ +#define VA_DMMU_VA_WATCHPOINT_REG 0x38 /**< DMMU VA data watchpoint register. */ +#define VA_DMMU_PA_WATCHPOINT_REG 0x40 /**< DMMU PA data watchpoint register. */ + + +/** LSU Control Register. */ +union lsu_cr_reg { + uint64_t value; + struct { + unsigned : 23; + unsigned pm : 8; + unsigned vm : 8; + unsigned pr : 1; + unsigned pw : 1; + unsigned vr : 1; + unsigned vw : 1; + unsigned : 1; + unsigned fm : 16; + unsigned dm : 1; /**< D-MMU enable. */ + unsigned im : 1; /**< I-MMU enable. */ + unsigned dc : 1; /**< D-Cache enable. */ + unsigned ic : 1; /**< I-Cache enable. */ + + } __attribute__ ((packed)); +}; +typedef union lsu_cr_reg lsu_cr_reg_t; + + +#define immu_enable() immu_set(true) +#define immu_disable() immu_set(false) +#define dmmu_enable() dmmu_set(true) +#define dmmu_disable() dmmu_set(false) + +/** Disable or Enable IMMU. */ +static inline void immu_set(bool enable) +{ + lsu_cr_reg_t cr; + + cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0); + cr.im = enable; + asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value); + membar(); +} + +/** Disable or Enable DMMU. */ +static inline void dmmu_set(bool enable) +{ + lsu_cr_reg_t cr; + + cr.value = asi_u64_read(ASI_LSU_CONTROL_REG, 0); + cr.dm = enable; + asi_u64_write(ASI_LSU_CONTROL_REG, 0, cr.value); + membar(); +} + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/mm/page.h =================================================================== --- kernel/arch/sparc64/include/mm/page.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/mm/page.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,70 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef __sparc64_PAGE_H__ +#define __sparc64_PAGE_H__ + +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#ifdef KERNEL + +#include +#include +#include + +#define KA2PA(x) ((uintptr_t) (x)) +#define PA2KA(x) ((uintptr_t) (x)) + +union page_address { + uintptr_t address; + struct { + uint64_t vpn : 51; /**< Virtual Page Number. */ + unsigned offset : 13; /**< Offset. */ + } __attribute__ ((packed)); +}; + +typedef union page_address page_address_t; + +extern void page_arch_init(void); + +#endif /* KERNEL */ + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/mm/tlb.h =================================================================== --- kernel/arch/sparc64/include/mm/tlb.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/mm/tlb.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,423 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef __sparc64_TLB_H__ +#define __sparc64_TLB_H__ + +#include +#include +#include +#include +#include +#include +#include + +#define ITLB_ENTRY_COUNT 64 +#define DTLB_ENTRY_COUNT 64 + +/** Page sizes. */ +#define PAGESIZE_8K 0 +#define PAGESIZE_64K 1 +#define PAGESIZE_512K 2 +#define PAGESIZE_4M 3 + +/** Bit width of the TLB-locked portion of kernel address space. */ +#define KERNEL_PAGE_WIDTH 22 /* 4M */ + +union tlb_context_reg { + uint64_t v; + struct { + unsigned long : 51; + unsigned context : 13; /**< Context/ASID. */ + } __attribute__ ((packed)); +}; +typedef union tlb_context_reg tlb_context_reg_t; + +/** I-/D-TLB Data In/Access Register type. */ +typedef tte_data_t tlb_data_t; + +/** I-/D-TLB Data Access Address in Alternate Space. */ +union tlb_data_access_addr { + uint64_t value; + struct { + uint64_t : 55; + unsigned tlb_entry : 6; + unsigned : 3; + } __attribute__ ((packed)); +}; +typedef union tlb_data_access_addr tlb_data_access_addr_t; +typedef union tlb_data_access_addr tlb_tag_read_addr_t; + +/** I-/D-TLB Tag Read Register. */ +union tlb_tag_read_reg { + uint64_t value; + struct { + uint64_t vpn : 51; /**< Virtual Address bits 63:13. */ + unsigned context : 13; /**< Context identifier. */ + } __attribute__ ((packed)); +}; +typedef union tlb_tag_read_reg tlb_tag_read_reg_t; +typedef union tlb_tag_read_reg tlb_tag_access_reg_t; + +/** TLB Demap Operation types. */ +#define TLB_DEMAP_PAGE 0 +#define TLB_DEMAP_CONTEXT 1 + +/** TLB Demap Operation Context register encodings. */ +#define TLB_DEMAP_PRIMARY 0 +#define TLB_DEMAP_SECONDARY 1 +#define TLB_DEMAP_NUCLEUS 2 + +/** TLB Demap Operation Address. */ +union tlb_demap_addr { + uint64_t value; + struct { + uint64_t vpn: 51; /**< Virtual Address bits 63:13. */ + unsigned : 6; /**< Ignored. */ + unsigned type : 1; /**< The type of demap operation. */ + unsigned context : 2; /**< Context register selection. */ + unsigned : 4; /**< Zero. */ + } __attribute__ ((packed)); +}; +typedef union tlb_demap_addr tlb_demap_addr_t; + +/** TLB Synchronous Fault Status Register. */ +union tlb_sfsr_reg { + uint64_t value; + struct { + unsigned long : 39; /**< Implementation dependent. */ + unsigned nf : 1; /**< Nonfaulting load. */ + unsigned asi : 8; /**< ASI. */ + unsigned tm : 1; /**< TLB miss. */ + unsigned : 1; + unsigned ft : 7; /**< Fault type. */ + unsigned e : 1; /**< Side-effect bit. */ + unsigned ct : 2; /**< Context Register selection. */ + unsigned pr : 1; /**< Privilege bit. */ + unsigned w : 1; /**< Write bit. */ + unsigned ow : 1; /**< Overwrite bit. */ + unsigned fv : 1; /**< Fault Valid bit. */ + } __attribute__ ((packed)); +}; +typedef union tlb_sfsr_reg tlb_sfsr_reg_t; + +/** Read MMU Primary Context Register. + * + * @return Current value of Primary Context Register. + */ +static inline uint64_t mmu_primary_context_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_PRIMARY_CONTEXT_REG); +} + +/** Write MMU Primary Context Register. + * + * @param v New value of Primary Context Register. + */ +static inline void mmu_primary_context_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v); + flush(); +} + +/** Read MMU Secondary Context Register. + * + * @return Current value of Secondary Context Register. + */ +static inline uint64_t mmu_secondary_context_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_SECONDARY_CONTEXT_REG); +} + +/** Write MMU Primary Context Register. + * + * @param v New value of Primary Context Register. + */ +static inline void mmu_secondary_context_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v); + flush(); +} + +/** Read IMMU TLB Data Access Register. + * + * @param entry TLB Entry index. + * + * @return Current value of specified IMMU TLB Data Access Register. + */ +static inline uint64_t itlb_data_access_read(index_t entry) +{ + tlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_entry = entry; + return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value); +} + +/** Write IMMU TLB Data Access Register. + * + * @param entry TLB Entry index. + * @param value Value to be written. + */ +static inline void itlb_data_access_write(index_t entry, uint64_t value) +{ + tlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_entry = entry; + asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value); + flush(); +} + +/** Read DMMU TLB Data Access Register. + * + * @param entry TLB Entry index. + * + * @return Current value of specified DMMU TLB Data Access Register. + */ +static inline uint64_t dtlb_data_access_read(index_t entry) +{ + tlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_entry = entry; + return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value); +} + +/** Write DMMU TLB Data Access Register. + * + * @param entry TLB Entry index. + * @param value Value to be written. + */ +static inline void dtlb_data_access_write(index_t entry, uint64_t value) +{ + tlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_entry = entry; + asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value); + flush(); +} + +/** Read IMMU TLB Tag Read Register. + * + * @param entry TLB Entry index. + * + * @return Current value of specified IMMU TLB Tag Read Register. + */ +static inline uint64_t itlb_tag_read_read(index_t entry) +{ + tlb_tag_read_addr_t tag; + + tag.value = 0; + tag.tlb_entry = entry; + return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value); +} + +/** Read DMMU TLB Tag Read Register. + * + * @param entry TLB Entry index. + * + * @return Current value of specified DMMU TLB Tag Read Register. + */ +static inline uint64_t dtlb_tag_read_read(index_t entry) +{ + tlb_tag_read_addr_t tag; + + tag.value = 0; + tag.tlb_entry = entry; + return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value); +} + +/** Write IMMU TLB Tag Access Register. + * + * @param v Value to be written. + */ +static inline void itlb_tag_access_write(uint64_t v) +{ + asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v); + flush(); +} + +/** Read IMMU TLB Tag Access Register. + * + * @return Current value of IMMU TLB Tag Access Register. + */ +static inline uint64_t itlb_tag_access_read(void) +{ + return asi_u64_read(ASI_IMMU, VA_IMMU_TAG_ACCESS); +} + +/** Write DMMU TLB Tag Access Register. + * + * @param v Value to be written. + */ +static inline void dtlb_tag_access_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v); + flush(); +} + +/** Read DMMU TLB Tag Access Register. + * + * @return Current value of DMMU TLB Tag Access Register. + */ +static inline uint64_t dtlb_tag_access_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_DMMU_TAG_ACCESS); +} + + +/** Write IMMU TLB Data in Register. + * + * @param v Value to be written. + */ +static inline void itlb_data_in_write(uint64_t v) +{ + asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v); + flush(); +} + +/** Write DMMU TLB Data in Register. + * + * @param v Value to be written. + */ +static inline void dtlb_data_in_write(uint64_t v) +{ + asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v); + flush(); +} + +/** Read ITLB Synchronous Fault Status Register. + * + * @return Current content of I-SFSR register. + */ +static inline uint64_t itlb_sfsr_read(void) +{ + return asi_u64_read(ASI_IMMU, VA_IMMU_SFSR); +} + +/** Write ITLB Synchronous Fault Status Register. + * + * @param v New value of I-SFSR register. + */ +static inline void itlb_sfsr_write(uint64_t v) +{ + asi_u64_write(ASI_IMMU, VA_IMMU_SFSR, v); + flush(); +} + +/** Read DTLB Synchronous Fault Status Register. + * + * @return Current content of D-SFSR register. + */ +static inline uint64_t dtlb_sfsr_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_DMMU_SFSR); +} + +/** Write DTLB Synchronous Fault Status Register. + * + * @param v New value of D-SFSR register. + */ +static inline void dtlb_sfsr_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_DMMU_SFSR, v); + flush(); +} + +/** Read DTLB Synchronous Fault Address Register. + * + * @return Current content of D-SFAR register. + */ +static inline uint64_t dtlb_sfar_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_DMMU_SFAR); +} + +/** Perform IMMU TLB Demap Operation. + * + * @param type Selects between context and page demap. + * @param context_encoding Specifies which Context register has Context ID for demap. + * @param page Address which is on the page to be demapped. + */ +static inline void itlb_demap(int type, int context_encoding, uintptr_t page) +{ + tlb_demap_addr_t da; + page_address_t pg; + + da.value = 0; + pg.address = page; + + da.type = type; + da.context = context_encoding; + da.vpn = pg.vpn; + + asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); + flush(); +} + +/** Perform DMMU TLB Demap Operation. + * + * @param type Selects between context and page demap. + * @param context_encoding Specifies which Context register has Context ID for demap. + * @param page Address which is on the page to be demapped. + */ +static inline void dtlb_demap(int type, int context_encoding, uintptr_t page) +{ + tlb_demap_addr_t da; + page_address_t pg; + + da.value = 0; + pg.address = page; + + da.type = type; + da.context = context_encoding; + da.vpn = pg.vpn; + + asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); + flush(); +} + +extern void fast_instruction_access_mmu_miss(void); +extern void fast_data_access_mmu_miss(void); +extern void fast_data_access_protection(void); + +extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable); + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/mm/tte.h =================================================================== --- kernel/arch/sparc64/include/mm/tte.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/mm/tte.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef __sparc64_TTE_H__ +#define __sparc64_TTE_H__ + +#include + +/** Translation Table Entry - Tag. */ +union tte_tag { + uint64_t value; + struct { + unsigned g : 1; /**< Global. */ + unsigned : 2; /**< Reserved. */ + unsigned context : 13; /**< Context identifier. */ + unsigned : 6; /**< Reserved. */ + uint64_t va_tag : 42; /**< Virtual Address Tag, bits 63:22. */ + } __attribute__ ((packed)); +}; + +typedef union tte_tag tte_tag_t; + +/** Translation Table Entry - Data. */ +union tte_data { + uint64_t value; + struct { + unsigned v : 1; /**< Valid. */ + unsigned size : 2; /**< Page size of this entry. */ + unsigned nfo : 1; /**< No-Fault-Only. */ + unsigned ie : 1; /**< Invert Endianness. */ + unsigned soft2 : 9; /**< Software defined field. */ + unsigned diag : 9; /**< Diagnostic data. */ + unsigned pfn : 28; /**< Physical Address bits, bits 40:13. */ + unsigned soft : 6; /**< Software defined field. */ + unsigned l : 1; /**< Lock. */ + unsigned cp : 1; /**< Cacheable in physically indexed cache. */ + unsigned cv : 1; /**< Cacheable in virtually indexed cache. */ + unsigned e : 1; /**< Side-effect. */ + unsigned p : 1; /**< Privileged. */ + unsigned w : 1; /**< Writable. */ + unsigned g : 1; /**< Global. */ + } __attribute__ ((packed)); +}; + +typedef union tte_data tte_data_t; + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/proc/task.h =================================================================== --- kernel/arch/sparc64/include/proc/task.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/proc/task.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64proc + * @{ + */ +/** @file + */ + +#ifndef __sparc64_TASK_H__ +#define __sparc64_TASK_H__ + +typedef struct { +} task_arch_t; + +#define task_create_arch(t) +#define task_destroy_arch(t) + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/proc/thread.h =================================================================== --- kernel/arch/sparc64/include/proc/thread.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/proc/thread.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64proc + * @{ + */ +/** @file + */ + +#ifndef __sparc64_THREAD_H__ +#define __sparc64_THREAD_H__ + +typedef struct { +} thread_arch_t; + +#define thread_create_arch(t) + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/include/register.h =================================================================== --- kernel/arch/sparc64/include/register.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/register.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,117 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_REGISTER_H_ +#define KERN_sparc64_REGISTER_H_ + +#ifdef __ASM__ +#define PSTATE_IE_BIT 2 +#define PSTATE_AM_BIT 8 +#else + +#include + +/** Version Register. */ +union ver_reg { + uint64_t value; + struct { + uint16_t manuf; /**< Manufacturer code. */ + uint16_t impl; /**< Implementation code. */ + uint8_t mask; /**< Mask set revision. */ + unsigned : 8; + uint8_t maxtl; + unsigned : 3; + unsigned maxwin : 5; + } __attribute__ ((packed)); +}; +typedef union ver_reg ver_reg_t; + +/** Processor State Register. */ +union pstate_reg { + uint64_t value; + struct { + uint64_t : 52; + unsigned ig : 1; /**< Interrupt Globals. */ + unsigned mg : 1; /**< MMU Globals. */ + unsigned cle : 1; /**< Current Little Endian. */ + unsigned tle : 1; /**< Trap Little Endian. */ + unsigned mm : 2; /**< Memory Model. */ + unsigned red : 1; /**< RED state. */ + unsigned pef : 1; /**< Enable floating-point. */ + unsigned am : 1; /**< 32-bit Address Mask. */ + unsigned priv : 1; /**< Privileged Mode. */ + unsigned ie : 1; /**< Interrupt Enable. */ + unsigned ag : 1; /**< Alternate Globals*/ + } __attribute__ ((packed)); +}; +typedef union pstate_reg pstate_reg_t; + +/** TICK Register. */ +union tick_reg { + uint64_t value; + struct { + unsigned npt : 1; /**< Non-privileged Trap enable. */ + uint64_t counter : 63; /**< Elapsed CPU clck cycle counter. */ + } __attribute__ ((packed)); +}; +typedef union tick_reg tick_reg_t; + +/** TICK_compare Register. */ +union tick_compare_reg { + uint64_t value; + struct { + unsigned int_dis : 1; /**< TICK_INT interrupt disabled flag. */ + uint64_t tick_cmpr : 63; /**< Compare value for TICK interrupts. */ + } __attribute__ ((packed)); +}; +typedef union tick_compare_reg tick_compare_reg_t; + +/** SOFTINT Register. */ +union softint_reg { + uint64_t value; + struct { + uint64_t : 47; + unsigned stick_int : 1; + unsigned int_level : 15; + unsigned tick_int : 1; + } __attribute__ ((packed)); +}; +typedef union softint_reg softint_reg_t; + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/stack.h =================================================================== --- kernel/arch/sparc64/include/stack.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/stack.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_STACK_H_ +#define KERN_sparc64_STACK_H_ + +#define STACK_ITEM_SIZE 8 + +/** According to SPARC Compliance Definition, every stack frame is 16-byte aligned. */ +#define STACK_ALIGNMENT 16 + +/** + * 16-extended-word save area for %i[0-7] and %l[0-7] registers. + */ +#define STACK_WINDOW_SAVE_AREA_SIZE (16*STACK_ITEM_SIZE) + +/** + * By convention, the actual top of the stack is %sp + STACK_BIAS. + */ +#define STACK_BIAS 2047 + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/trap/exception.h =================================================================== --- kernel/arch/sparc64/include/trap/exception.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/trap/exception.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + */ + +#ifndef __sparc64_EXCEPTION_H__ +#define __sparc64_EXCEPTION_H__ + +#define TT_INSTRUCTION_ACCESS_EXCEPTION 0x08 +#define TT_ILLEGAL_INSTRUCTION 0x10 +#define TT_DATA_ACCESS_ERROR 0x32 +#define TT_MEM_ADDRESS_NOT_ALIGNED 0x34 + +#ifndef __ASM__ +extern void do_instruction_access_exc(void); +extern void do_mem_address_not_aligned(void); +extern void do_data_access_error(void); +extern void do_illegal_instruction(void); +#endif /* !__ASM__ */ + +#endif + +/** @} + */ + Index: kernel/arch/sparc64/include/trap/interrupt.h =================================================================== --- kernel/arch/sparc64/include/trap/interrupt.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/trap/interrupt.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,80 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief This file contains interrupt vector trap handler. + */ + +#ifndef __sparc64_TRAP_INTERRUPT_H__ +#define __sparc64_TRAP_INTERRUPT_H__ + +#include +#include + +#define TT_INTERRUPT_LEVEL_1 0x41 +#define TT_INTERRUPT_LEVEL_2 0x42 +#define TT_INTERRUPT_LEVEL_3 0x43 +#define TT_INTERRUPT_LEVEL_4 0x44 +#define TT_INTERRUPT_LEVEL_5 0x45 +#define TT_INTERRUPT_LEVEL_6 0x46 +#define TT_INTERRUPT_LEVEL_7 0x47 +#define TT_INTERRUPT_LEVEL_8 0x48 +#define TT_INTERRUPT_LEVEL_9 0x49 +#define TT_INTERRUPT_LEVEL_10 0x4a +#define TT_INTERRUPT_LEVEL_11 0x4b +#define TT_INTERRUPT_LEVEL_12 0x4c +#define TT_INTERRUPT_LEVEL_13 0x4d +#define TT_INTERRUPT_LEVEL_14 0x4e +#define TT_INTERRUPT_LEVEL_15 0x4f + +#define TT_INTERRUPT_VECTOR_TRAP 0x60 + +#define INTERRUPT_LEVEL_N_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE +#define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE + +#ifdef __ASM__ +.macro INTERRUPT_LEVEL_N_HANDLER n + save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp + mov \n - 1, %o0 + mov %fp, %o1 + PREEMPTIBLE_HANDLER exc_dispatch +.endm + +.macro INTERRUPT_VECTOR_TRAP_HANDLER + retry +.endm +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/trap/mmu.h =================================================================== --- kernel/arch/sparc64/include/trap/mmu.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/trap/mmu.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief This file contains fast MMU trap handlers. + */ + +#ifndef __sparc64_MMU_TRAP_H__ +#define __sparc64_MMU_TRAP_H__ + +#include + +#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64 +#define TT_FAST_DATA_ACCESS_MMU_MISS 0x68 +#define TT_FAST_DATA_ACCESS_PROTECTION 0x6c + +#define FAST_MMU_HANDLER_SIZE 128 + +#ifdef __ASM__ +.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER + save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp + call fast_instruction_access_mmu_miss + nop + restore + retry +.endm + +.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER + save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp + call fast_data_access_mmu_miss + nop + restore + retry +.endm + +.macro FAST_DATA_ACCESS_PROTECTION_HANDLER + save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp + call fast_data_access_protection + nop + restore + retry +.endm +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/trap/regwin.h =================================================================== --- kernel/arch/sparc64/include/trap/regwin.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/trap/regwin.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,141 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief This file contains register window trap handlers. + */ + +#ifndef __sparc64_REGWIN_H__ +#define __sparc64_REGWIN_H__ + +#include + +#define TT_CLEAN_WINDOW 0x24 +#define TT_SPILL_0_NORMAL 0x80 +#define TT_FILL_0_NORMAL 0xc0 + +#define REGWIN_HANDLER_SIZE 128 + +#define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE +#define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE +#define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE + +/** Window Save Area offsets. */ +#define L0_OFFSET 0 +#define L1_OFFSET 8 +#define L2_OFFSET 16 +#define L3_OFFSET 24 +#define L4_OFFSET 32 +#define L5_OFFSET 40 +#define L6_OFFSET 48 +#define L7_OFFSET 56 +#define I0_OFFSET 64 +#define I1_OFFSET 72 +#define I2_OFFSET 80 +#define I3_OFFSET 88 +#define I4_OFFSET 96 +#define I5_OFFSET 104 +#define I6_OFFSET 112 +#define I7_OFFSET 120 + +#ifdef __ASM__ +.macro SPILL_NORMAL_HANDLER + stx %l0, [%sp + STACK_BIAS + L0_OFFSET] + stx %l1, [%sp + STACK_BIAS + L1_OFFSET] + stx %l2, [%sp + STACK_BIAS + L2_OFFSET] + stx %l3, [%sp + STACK_BIAS + L3_OFFSET] + stx %l4, [%sp + STACK_BIAS + L4_OFFSET] + stx %l5, [%sp + STACK_BIAS + L5_OFFSET] + stx %l6, [%sp + STACK_BIAS + L6_OFFSET] + stx %l7, [%sp + STACK_BIAS + L7_OFFSET] + stx %i0, [%sp + STACK_BIAS + I0_OFFSET] + stx %i1, [%sp + STACK_BIAS + I1_OFFSET] + stx %i2, [%sp + STACK_BIAS + I2_OFFSET] + stx %i3, [%sp + STACK_BIAS + I3_OFFSET] + stx %i4, [%sp + STACK_BIAS + I4_OFFSET] + stx %i5, [%sp + STACK_BIAS + I5_OFFSET] + stx %i6, [%sp + STACK_BIAS + I6_OFFSET] + stx %i7, [%sp + STACK_BIAS + I7_OFFSET] + saved + retry +.endm + +.macro FILL_NORMAL_HANDLER + ldx [%sp + STACK_BIAS + L0_OFFSET], %l0 + ldx [%sp + STACK_BIAS + L1_OFFSET], %l1 + ldx [%sp + STACK_BIAS + L2_OFFSET], %l2 + ldx [%sp + STACK_BIAS + L3_OFFSET], %l3 + ldx [%sp + STACK_BIAS + L4_OFFSET], %l4 + ldx [%sp + STACK_BIAS + L5_OFFSET], %l5 + ldx [%sp + STACK_BIAS + L6_OFFSET], %l6 + ldx [%sp + STACK_BIAS + L7_OFFSET], %l7 + ldx [%sp + STACK_BIAS + I0_OFFSET], %i0 + ldx [%sp + STACK_BIAS + I1_OFFSET], %i1 + ldx [%sp + STACK_BIAS + I2_OFFSET], %i2 + ldx [%sp + STACK_BIAS + I3_OFFSET], %i3 + ldx [%sp + STACK_BIAS + I4_OFFSET], %i4 + ldx [%sp + STACK_BIAS + I5_OFFSET], %i5 + ldx [%sp + STACK_BIAS + I6_OFFSET], %i6 + ldx [%sp + STACK_BIAS + I7_OFFSET], %i7 + restored + retry +.endm + +.macro CLEAN_WINDOW_HANDLER + rdpr %cleanwin, %l0 + add %l0, 1, %l0 + wrpr %l0, 0, %cleanwin + mov %r0, %l0 + mov %r0, %l1 + mov %r0, %l2 + mov %r0, %l3 + mov %r0, %l4 + mov %r0, %l5 + mov %r0, %l6 + mov %r0, %l7 + mov %r0, %o0 + mov %r0, %o1 + mov %r0, %o2 + mov %r0, %o3 + mov %r0, %o4 + mov %r0, %o5 + mov %r0, %o6 + mov %r0, %o7 + retry +.endm +#endif /* __ASM__ */ + +#endif + +/** @} + */ + Index: kernel/arch/sparc64/include/trap/trap.h =================================================================== --- kernel/arch/sparc64/include/trap/trap.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/trap/trap.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** @file + */ + +#ifndef __sparc64_TRAP_H__ +#define __sparc64_TRAP_H__ + +#include +#include + +/** Switch to in-kernel trap table. */ +static inline void trap_switch_trap_table(void) +{ + /* Point TBA to kernel copy of OFW's trap table. */ + tba_write((uint64_t) trap_table); +} + +extern void trap_init(void); + +#endif + +/** @} + */ + Index: kernel/arch/sparc64/include/trap/trap_table.h =================================================================== --- kernel/arch/sparc64/include/trap/trap_table.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/trap/trap_table.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,102 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** @file + */ + +#ifndef __sparc64_TRAP_TABLE_H__ +#define __sparc64_TRAP_TABLE_H__ + +#ifndef __ASM__ +#include +#endif /* __ASM__ */ + +#include + +#define TRAP_TABLE_ENTRY_COUNT 1024 +#define TRAP_TABLE_ENTRY_SIZE 32 +#define TRAP_TABLE_SIZE (TRAP_TABLE_ENTRY_COUNT*TRAP_TABLE_ENTRY_SIZE) + +#ifndef __ASM__ +struct trap_table_entry { + uint8_t octets[TRAP_TABLE_ENTRY_SIZE]; +} __attribute__ ((packed)); + +typedef struct trap_table_entry trap_table_entry_t; + +extern trap_table_entry_t trap_table[TRAP_TABLE_ENTRY_COUNT]; +extern trap_table_entry_t trap_table_save[TRAP_TABLE_ENTRY_COUNT]; +#endif /* !__ASM__ */ + +#ifdef __ASM__ +.macro SAVE_GLOBALS + mov %g1, %l1 + mov %g2, %l2 + mov %g3, %l3 + mov %g4, %l4 + mov %g5, %l5 + mov %g6, %l6 + mov %g7, %l7 +.endm + +.macro RESTORE_GLOBALS + mov %l1, %g1 + mov %l2, %g2 + mov %l3, %g3 + mov %l4, %g4 + mov %l5, %g5 + mov %l6, %g6 + mov %l7, %g7 +.endm + +#define PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE (STACK_WINDOW_SAVE_AREA_SIZE+(4*8)) +#define SAVED_TSTATE -(1*8) +#define SAVED_TPC -(2*8) +#define SAVED_TNPC -(3*8) +#define SAVED_PSTATE -(4*8) + +.macro PREEMPTIBLE_HANDLER f + set \f, %l0 + b preemptible_handler + nop +.endm + +.macro SIMPLE_HANDLER f + call \f + nop +.endm +#endif /* __ASM__ */ + +#endif + +/** @} + */ + Index: kernel/arch/sparc64/include/types.h =================================================================== --- kernel/arch/sparc64/include/types.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/include/types.h (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef __sparc64_TYPES_H__ +#define __sparc64_TYPES_H__ + +#define NULL 0 + +typedef signed char int8_t; +typedef signed short int16_t; +typedef signed int int32_t; +typedef signed long int64_t; + +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; +typedef unsigned int uint32_t; +typedef unsigned long uint64_t; + +typedef uint64_t uintptr_t; +typedef uint64_t pfn_t; + +typedef uint64_t ipl_t; + +typedef uint64_t unative_t; +typedef int64_t native_t; + +typedef struct pte pte_t; + +typedef uint8_t asi_t; + +#endif + + /** @} + */ + Index: kernel/arch/sparc64/src/asm.S =================================================================== --- kernel/arch/sparc64/src/asm.S (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/src/asm.S (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,74 @@ +# +# Copyright (C) 2005 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +#include +#include + +.text + +.global memcpy +.global memcpy_from_uspace +.global memcpy_to_uspace +.global memcpy_from_uspace_failover_address +.global memcpy_to_uspace_failover_address +.global memsetb + + +memcpy: +memcpy_from_uspace: +memcpy_to_uspace: + + b _memcpy + nop + +memcpy_from_uspace_failover_address: +memcpy_to_uspace_failover_address: + b memcpy_from_uspace_failover_address + nop + +memsetb: + b _memsetb + nop + +.global ofw +ofw: + save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp + set ofw_cif, %l0 + ldx [%l0], %l0 + + rdpr %pstate, %l1 + and %l1, ~PSTATE_AM_BIT, %l2 + wrpr %l2, 0, %pstate + + jmpl %l0, %o7 + mov %i0, %o0 + + wrpr %l1, 0, %pstate + + ret + restore %o0, 0, %o0 Index: kernel/arch/sparc64/src/console.c =================================================================== --- kernel/arch/sparc64/src/console.c (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/src/console.c (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,106 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define KEYBOARD_POLL_PAUSE 50000 /* 50ms */ + +static void ofw_sparc64_putchar(chardev_t *d, const char ch); + +static volatile int ofw_console_active; + +static chardev_t ofw_sparc64_console; +static chardev_operations_t ofw_sparc64_console_ops = { + .write = ofw_sparc64_putchar, +}; + +/** Initialize kernel console to use OpenFirmware services. */ +void ofw_sparc64_console_init(void) +{ + chardev_initialize("ofw_sparc64_console", &ofw_sparc64_console, &ofw_sparc64_console_ops); + stdin = NULL; + stdout = &ofw_sparc64_console; + ofw_console_active = 1; +} + +/** Initialize kernel console to use framebuffer and keyboard directly. */ +void standalone_sparc64_console_init(void) +{ + ofw_console_active = 0; + stdin = NULL; + + kbd_init(); + fb_init(FB_PHYS_ADDRESS, FB_X_RES, FB_Y_RES, FB_COLOR_DEPTH, FB_X_RES * FB_COLOR_DEPTH / 8); +} + +/** Write one character using OpenFirmware. + * + * @param d Character device (ignored). + * @param ch Character to be written. + */ +void ofw_sparc64_putchar(chardev_t *d, const char ch) +{ + if (ch == '\n') + ofw_putchar('\r'); + ofw_putchar(ch); +} + +/** Kernel thread for polling keyboard. + * + * @param arg Ignored. + */ +void kkbdpoll(void *arg) +{ + while (1) { + i8042_poll(); + thread_usleep(KEYBOARD_POLL_PAUSE); + } +} + +/** @} + */ Index: kernel/arch/sparc64/src/context.S =================================================================== --- kernel/arch/sparc64/src/context.S (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/src/context.S (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,108 @@ +# +# Copyright (C) 2005 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +#include +#include + +/** + * Both context_save_arch() and context_restore_arch() are + * leaf-optimized procedures. This kind of optimization + * is very important and prevents any implicit window + * spill/fill/clean traps in these very core kernel + * functions. + */ + +.text + +.global context_save_arch +.global context_restore_arch + +.macro CONTEXT_STORE r + stx %sp, [\r + OFFSET_SP] + stx %o7, [\r + OFFSET_PC] + stx %i0, [\r + OFFSET_I0] + stx %i1, [\r + OFFSET_I1] + stx %i2, [\r + OFFSET_I2] + stx %i3, [\r + OFFSET_I3] + stx %i4, [\r + OFFSET_I4] + stx %i5, [\r + OFFSET_I5] + stx %fp, [\r + OFFSET_FP] + stx %i7, [\r + OFFSET_I7] + stx %l0, [\r + OFFSET_L0] + stx %l1, [\r + OFFSET_L1] + stx %l2, [\r + OFFSET_L2] + stx %l3, [\r + OFFSET_L3] + stx %l4, [\r + OFFSET_L4] + stx %l5, [\r + OFFSET_L5] + stx %l6, [\r + OFFSET_L6] + stx %l7, [\r + OFFSET_L7] + rdpr %cleanwin, %g1 + stx %g1, [\r + OFFSET_CLEANWIN] +.endm + +.macro CONTEXT_LOAD r + ldx [\r + OFFSET_SP], %sp + ldx [\r + OFFSET_PC], %o7 + ldx [\r + OFFSET_I0], %i0 + ldx [\r + OFFSET_I1], %i1 + ldx [\r + OFFSET_I2], %i2 + ldx [\r + OFFSET_I3], %i3 + ldx [\r + OFFSET_I4], %i4 + ldx [\r + OFFSET_I5], %i5 + ldx [\r + OFFSET_FP], %fp + ldx [\r + OFFSET_I7], %i7 + ldx [\r + OFFSET_L0], %l0 + ldx [\r + OFFSET_L1], %l1 + ldx [\r + OFFSET_L2], %l2 + ldx [\r + OFFSET_L3], %l3 + ldx [\r + OFFSET_L4], %l4 + ldx [\r + OFFSET_L5], %l5 + ldx [\r + OFFSET_L6], %l6 + ldx [\r + OFFSET_L7], %l7 + ldx [\r + OFFSET_CLEANWIN], %g1 + wrpr %g1, %g0, %cleanwin +.endm + +context_save_arch: + CONTEXT_STORE %o0 + retl + mov 1, %o0 ! context_save_arch returns 1 + +context_restore_arch: + # + # Flush all active windows. + # This is essential, because CONTEXT_LOAD overwrites + # %sp of CWP - 1 with the value written to %fp of CWP. + # Flushing all active windows mitigates this problem + # as CWP - 1 becomes the overlap window. + # + flushw + + CONTEXT_LOAD %o0 + retl + xor %o0, %o0, %o0 ! context_restore_arch returns 0 Index: kernel/arch/sparc64/src/cpu/cpu.c =================================================================== --- kernel/arch/sparc64/src/cpu/cpu.c (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/src/cpu/cpu.c (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,100 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include + +void cpu_arch_init(void) +{ +} + +void cpu_identify(void) +{ + CPU->arch.ver.value = ver_read(); +} + +void cpu_print_report(cpu_t *m) +{ + char *manuf, *impl; + + switch (CPU->arch.ver.manuf) { + case MANUF_FUJITSU: + manuf = "Fujitsu"; + break; + case MANUF_ULTRASPARC: + manuf = "UltraSPARC"; + break; + case MANUF_SUN: + manuf = "Sun"; + break; + default: + manuf = "Unknown"; + break; + } + + switch (CPU->arch.ver.impl) { + case IMPL_ULTRASPARCI: + impl = "UltraSPARC I"; + break; + case IMPL_ULTRASPARCII: + impl = "UltraSPARC II"; + break; + case IMPL_ULTRASPARCII_I: + impl = "UltraSPARC IIi"; + break; + case IMPL_ULTRASPARCII_E: + impl = "UltraSPARC IIe"; + break; + case IMPL_ULTRASPARCIII: + impl = "UltraSPARC III"; + break; + case IMPL_ULTRASPARCIV_PLUS: + impl = "UltraSPARC IV+"; + break; + case IMPL_SPARC64V: + impl = "SPARC 64V"; + break; + default: + impl = "Unknown"; + break; + } + + printf("cpu%d: manuf=%s, impl=%s, mask=%d\n", CPU->id, manuf, impl, CPU->arch.ver.mask); +} + +/** @} + */ Index: kernel/arch/sparc64/src/ddi/ddi.c =================================================================== --- kernel/arch/sparc64/src/ddi/ddi.c (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/src/ddi/ddi.c (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64ddi + * @{ + */ +/** @file + */ + +#include +#include +#include +#include + +/** Enable I/O space range for task. + * + * Interrupts are disabled and task is locked. + * + * @param task Task. + * @param ioaddr Startign I/O space address. + * @param size Size of the enabled I/O range. + * + * @return 0 on success or an error code from errno.h. + */ +int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size) +{ + return 0; +} + + /** @} + */ + Index: kernel/arch/sparc64/src/drivers/i8042.c =================================================================== --- kernel/arch/sparc64/src/drivers/i8042.c (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/src/drivers/i8042.c (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#include +#include +#include +#include + +volatile uint8_t *kbd_virt_address = NULL; + +void kbd_init() +{ + kbd_virt_address = (uint8_t *) hw_map(KBD_PHYS_ADDRESS, LAST_REG); + i8042_init(); +} + +/** @} + */ Index: kernel/arch/sparc64/src/drivers/tick.c =================================================================== --- kernel/arch/sparc64/src/drivers/tick.c (revision 1167520724b9b526c27b67f2d4bc447ef626240c) +++ kernel/arch/sparc64/src/drivers/tick.c (revision 1167520724b9b526c27b67f2d4bc447ef626240c) @@ -0,0 +1,93 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include +#include