Index: kernel/arch/sparc64/include/arch.h
===================================================================
--- kernel/arch/sparc64/include/arch.h	(revision 94d614ef2057652d47a2a1df5f4c4809bbe31b2f)
+++ kernel/arch/sparc64/include/arch.h	(revision 10b890bd989b140b5238140ffa8ce961f23dd113)
@@ -27,5 +27,5 @@
  */
 
- /** @addtogroup sparc64	
+/** @addtogroup sparc64	
  * @{
  */
@@ -36,7 +36,11 @@
 #define __sparc64_ARCH_H__
 
+#include <arch/types.h>
+
+extern void take_over_tlb_and_tt(uintptr_t base);
+
 #endif
 
- /** @}
+/** @}
  */
 
Index: kernel/arch/sparc64/include/mm/asid.h
===================================================================
--- kernel/arch/sparc64/include/mm/asid.h	(revision 94d614ef2057652d47a2a1df5f4c4809bbe31b2f)
+++ kernel/arch/sparc64/include/mm/asid.h	(revision 10b890bd989b140b5238140ffa8ce961f23dd113)
@@ -27,5 +27,5 @@
  */
 
- /** @addtogroup sparc64mm	
+/** @addtogroup sparc64mm	
  * @{
  */
@@ -33,6 +33,6 @@
  */
 
-#ifndef __sparc64_ASID_H__
-#define __sparc64_ASID_H__
+#ifndef KERN_sparc64_ASID_H_
+#define KERN_sparc64_ASID_H_
 
 #include <arch/types.h>
@@ -47,5 +47,4 @@
 #endif
 
- /** @}
+/** @}
  */
-
Index: kernel/arch/sparc64/include/trap/trap.h
===================================================================
--- kernel/arch/sparc64/include/trap/trap.h	(revision 94d614ef2057652d47a2a1df5f4c4809bbe31b2f)
+++ kernel/arch/sparc64/include/trap/trap.h	(revision 10b890bd989b140b5238140ffa8ce961f23dd113)
@@ -42,5 +42,5 @@
 static inline void trap_switch_trap_table(void)
 {
-	/* Point TBA to kernel copy of OFW's trap table. */
+	/* Point TBA to kernel trap table. */
 	tba_write((uint64_t) trap_table);
 }
Index: kernel/arch/sparc64/src/mm/tlb.c
===================================================================
--- kernel/arch/sparc64/src/mm/tlb.c	(revision 94d614ef2057652d47a2a1df5f4c4809bbe31b2f)
+++ kernel/arch/sparc64/src/mm/tlb.c	(revision 10b890bd989b140b5238140ffa8ce961f23dd113)
@@ -27,5 +27,5 @@
  */
 
- /** @addtogroup sparc64mm	
+/** @addtogroup sparc64mm	
  * @{
  */
@@ -58,68 +58,6 @@
 };
 
-/** Initialize ITLB and DTLB.
- *
- * The goal of this function is to disable MMU
- * so that both TLBs can be purged and new
- * kernel 4M locked entry can be installed.
- * After TLB is initialized, MMU is enabled
- * again.
- *
- * Switching MMU off imposes the requirement for
- * the kernel to run in identity mapped environment.
- */
 void tlb_arch_init(void)
 {
-	tlb_tag_access_reg_t tag;
-	tlb_data_t data;
-	frame_address_t fr;
-	page_address_t pg;
-
-	fr.address = config.base;
-	pg.address = config.base;
-
-	immu_disable();
-	dmmu_disable();
-
-	/*
-	 * Demap everything, especially OpenFirmware.
-	 */
-	itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
-	dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
-	
-	/*
-	 * We do identity mapping of 4M-page at 4M.
-	 */
-	tag.value = ASID_KERNEL;
-	tag.vpn = pg.vpn;
-
-	itlb_tag_access_write(tag.value);
-	dtlb_tag_access_write(tag.value);
-
-	data.value = 0;
-	data.v = true;
-	data.size = PAGESIZE_4M;
-	data.pfn = fr.pfn;
-	data.l = true;
-	data.cp = 1;
-	data.cv = 1;
-	data.p = true;
-	data.w = true;
-	data.g = true;
-
-	itlb_data_in_write(data.value);
-	dtlb_data_in_write(data.value);
-
-	/*
-	 * Register window traps can occur before MMU is enabled again.
-	 * This ensures that any such traps will be handled from 
-	 * kernel identity mapped trap handler.
-	 */
-	trap_switch_trap_table();
-	
-	tlb_invalidate_all();
-
-	dmmu_enable();
-	immu_enable();
 }
 
@@ -280,5 +218,4 @@
 }
 
- /** @}
- */
-
+/** @}
+ */
Index: kernel/arch/sparc64/src/sparc64.c
===================================================================
--- kernel/arch/sparc64/src/sparc64.c	(revision 94d614ef2057652d47a2a1df5f4c4809bbe31b2f)
+++ kernel/arch/sparc64/src/sparc64.c	(revision 10b890bd989b140b5238140ffa8ce961f23dd113)
@@ -41,4 +41,7 @@
 #include <console/console.h>
 #include <arch/boot/boot.h>
+#include <arch/arch.h>
+#include <arch/mm/tlb.h>
+#include <mm/asid.h>
 
 bootinfo_t bootinfo;
@@ -89,4 +92,75 @@
 }
 
+/** Take over TLB and trap table.
+ *
+ * Initialize ITLB and DTLB and switch to kernel
+ * trap table.
+ *
+ * The goal of this function is to disable MMU
+ * so that both TLBs can be purged and new
+ * kernel 4M locked entry can be installed.
+ * After TLB is initialized, MMU is enabled
+ * again.
+ *
+ * Switching MMU off imposes the requirement for
+ * the kernel to run in identity mapped environment.
+ *
+ * @param base Base address that will be hardwired in both TLBs.
+ */
+void take_over_tlb_and_tt(uintptr_t base)
+{
+	tlb_tag_access_reg_t tag;
+	tlb_data_t data;
+	frame_address_t fr;
+	page_address_t pg;
+
+	fr.address = base;
+	pg.address = base;
+
+	immu_disable();
+	dmmu_disable();
+
+	/*
+	 * Demap everything, especially OpenFirmware.
+	 */
+	itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
+	dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
+	
+	/*
+	 * We do identity mapping of 4M-page at 4M.
+	 */
+	tag.value = ASID_KERNEL;
+	tag.vpn = pg.vpn;
+
+	itlb_tag_access_write(tag.value);
+	dtlb_tag_access_write(tag.value);
+
+	data.value = 0;
+	data.v = true;
+	data.size = PAGESIZE_4M;
+	data.pfn = fr.pfn;
+	data.l = true;
+	data.cp = 1;
+	data.cv = 1;
+	data.p = true;
+	data.w = true;
+	data.g = true;
+
+	itlb_data_in_write(data.value);
+	dtlb_data_in_write(data.value);
+
+	/*
+	 * Register window traps can occur before MMU is enabled again.
+	 * This ensures that any such traps will be handled from 
+	 * kernel identity mapped trap handler.
+	 */
+	trap_switch_trap_table();
+	
+	tlb_invalidate_all();
+
+	dmmu_enable();
+	immu_enable();
+}
+
 /** @}
  */
Index: kernel/arch/sparc64/src/start.S
===================================================================
--- kernel/arch/sparc64/src/start.S	(revision 94d614ef2057652d47a2a1df5f4c4809bbe31b2f)
+++ kernel/arch/sparc64/src/start.S	(revision 10b890bd989b140b5238140ffa8ce961f23dd113)
@@ -41,6 +41,12 @@
  * 
  * The registers are expected to be in this state:
- * %o0 bootinfo structure address
- * %o1 bootinfo structure size
+ * - %o0 bootinfo structure address
+ * - %o1 bootinfo structure size
+ *
+ * Moreover, we depend on boot having established the
+ * following environment:
+ * - TLBs are on
+ * - identity mapping for the kernel image
+ * - identity mapping for memory stack
  */
 
@@ -66,4 +72,15 @@
 	nop
 
+	/*
+	 * Take over control of identity mapping.
+	 * Take over control of trap table.
+	 *
+	 * After this call, the kernel is entirely self-sufficient
+	 * and independent on OpenFirmware.
+	 */
+	set kernel_image_start, %o0
+	call take_over_tlb_and_tt
+	nop
+
 	wrpr %r0, 0, %pil
 
