Changeset 0f74869 in mainline
- Timestamp:
- 2009-02-22T15:20:43Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f9f9a13
- Parents:
- e7abb0e
- Files:
-
- 1 deleted
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/console.c
re7abb0e r0f74869 163 163 #endif 164 164 switch (kbd_type) { 165 #ifdef CONFIG_Z8530166 case KBD_Z8530:167 z8530_grab();168 break;169 #endif170 #ifdef CONFIG_NS16550171 case KBD_NS16550:172 ns16550_grab();173 break;174 #endif175 165 #ifdef CONFIG_SGCN 176 166 case KBD_SGCN: … … 189 179 { 190 180 switch (kbd_type) { 191 #ifdef CONFIG_Z8530192 case KBD_Z8530:193 z8530_release();194 break;195 #endif196 #ifdef CONFIG_NS16550197 case KBD_NS16550:198 ns16550_release();199 break;200 #endif201 181 #ifdef CONFIG_SGCN 202 182 case KBD_SGCN: -
kernel/arch/sparc64/src/drivers/kbd.c
re7abb0e r0f74869 149 149 #ifdef CONFIG_Z8530 150 150 case KBD_Z8530: 151 z8530_init(device_assign_devno(), 152 hw_map(aligned_addr, offset + size) + offset, inr, cir, cir_arg); 151 (void) z8530_init((z8530_t *) hw_map(aligned_addr, 152 offset + size) + offset, device_assign_devno(), inr, cir, 153 cir_arg); 153 154 break; 154 155 #endif -
kernel/arch/sparc64/src/drivers/sgcn.c
re7abb0e r0f74869 382 382 383 383 if (*in_rdptr_ptr != *in_wrptr_ptr) { 384 if (sgcn_irq.notif_cfg.notify && sgcn_irq.notif_cfg.answerbox) { 385 ipc_irq_send_notif(&sgcn_irq); 386 spinlock_unlock(&sgcn_irq.lock); 387 interrupts_restore(ipl); 388 spinlock_unlock(&sgcn_input_lock); 389 return; 390 } 384 /* XXX: send notification to userspace */ 391 385 } 392 386 -
kernel/genarch/include/kbd/z8530.h
re7abb0e r0f74869 38 38 #define KERN_Z8530_H_ 39 39 40 #include <console/chardev.h>41 #include <ipc/irq.h>42 40 #include <ddi/irq.h> 41 #include <arch/types.h> 43 42 44 extern bool z8530_belongs_to_kernel; 43 #define WR0 0 44 #define WR1 1 45 #define WR2 2 46 #define WR3 3 47 #define WR4 4 48 #define WR5 5 49 #define WR6 6 50 #define WR7 7 51 #define WR8 8 52 #define WR9 9 53 #define WR10 10 54 #define WR11 11 55 #define WR12 12 56 #define WR13 13 57 #define WR14 14 58 #define WR15 15 45 59 46 extern void z8530_init(devno_t, uintptr_t, inr_t, cir_t, void *); 47 extern void z8530_poll(void); 48 extern void z8530_grab(void); 49 extern void z8530_release(void); 50 extern void z8530_interrupt(void); 51 extern char z8530_key_read(chardev_t *); 60 #define RR0 0 61 #define RR1 1 62 #define RR2 2 63 #define RR3 3 64 #define RR8 8 65 #define RR10 10 66 #define RR12 12 67 #define RR13 13 68 #define RR14 14 69 #define RR15 15 70 71 /** Reset pending TX interrupt. */ 72 #define WR0_TX_IP_RST (0x5 << 3) 73 #define WR0_ERR_RST (0x6 << 3) 74 75 /** Receive Interrupts Disabled. */ 76 #define WR1_RID (0x0 << 3) 77 /** Receive Interrupt on First Character or Special Condition. */ 78 #define WR1_RIFCSC (0x1 << 3) 79 /** Interrupt on All Receive Characters or Special Conditions. */ 80 #define WR1_IARCSC (0x2 << 3) 81 /** Receive Interrupt on Special Condition. */ 82 #define WR1_RISC (0x3 << 3) 83 /** Parity Is Special Condition. */ 84 #define WR1_PISC (0x1 << 2) 85 86 /** Rx Enable. */ 87 #define WR3_RX_ENABLE (0x1 << 0) 88 /** 8-bits per character. */ 89 #define WR3_RX8BITSCH (0x3 << 6) 90 91 /** Master Interrupt Enable. */ 92 #define WR9_MIE (0x1 << 3) 93 94 /** Receive Character Available. */ 95 #define RR0_RCA (0x1 << 0) 96 97 /** z8530's registers. */ 98 struct z8530 { 99 union { 100 ioport8_t ctl_b; 101 ioport8_t status_b; 102 } __attribute__ ((packed)); 103 uint8_t pad1; 104 ioport8_t data_b; 105 uint8_t pad2; 106 union { 107 ioport8_t ctl_a; 108 ioport8_t status_a; 109 } __attribute__ ((packed)); 110 uint8_t pad3; 111 ioport8_t data_a; 112 } __attribute__ ((packed)); 113 typedef struct z8530 z8530_t; 114 115 /** Structure representing the z8530 device. */ 116 typedef struct { 117 devno_t devno; 118 irq_t irq; 119 z8530_t *z8530; 120 } z8530_instance_t; 121 122 extern bool z8530_init(z8530_t *, devno_t, inr_t, cir_t, void *); 52 123 extern irq_ownership_t z8530_claim(irq_t *); 53 124 extern void z8530_irq_handler(irq_t *); -
kernel/genarch/src/kbd/z8530.c
re7abb0e r0f74869 32 32 /** 33 33 * @file 34 * @brief Zilog 8530 serial port / keyboarddriver.34 * @brief Zilog 8530 serial port driver. 35 35 */ 36 36 … … 39 39 #include <genarch/kbd/scanc.h> 40 40 #include <genarch/kbd/scanc_sun.h> 41 #include <arch/drivers/z8530.h> 41 #include <arch/drivers/kbd.h> 42 #include <console/console.h> 43 #include <console/chardev.h> 44 #include <sysinfo/sysinfo.h> 42 45 #include <ddi/irq.h> 43 #include <ipc/irq.h>44 #include <arch/interrupt.h>45 #include <arch/drivers/kbd.h>46 #include <cpu.h>47 46 #include <arch/asm.h> 48 #include <arch.h> 49 #include <console/chardev.h> 50 #include <console/console.h> 51 #include <interrupt.h> 52 #include <sysinfo/sysinfo.h> 53 #include <print.h> 47 #include <mm/slab.h> 48 49 static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val) 50 { 51 /* 52 * Registers 8-15 will automatically issue the Point High 53 * command as their bit 3 is 1. 54 */ 55 pio_write_8(ctl, reg); /* select register */ 56 pio_write_8(ctl, val); /* write value */ 57 } 58 59 static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg) 60 { 61 /* 62 * Registers 8-15 will automatically issue the Point High 63 * command as their bit 3 is 1. 64 */ 65 pio_write_8(ctl, reg); /* select register */ 66 return pio_read_8(ctl); 67 } 54 68 55 69 /* … … 57 71 */ 58 72 #define IGNORE_CODE 0x7f /* all keys up */ 59 60 static z8530_t z8530; /**< z8530 device structure. */61 static irq_t z8530_irq; /**< z8530's IRQ. */62 73 63 74 static void z8530_suspend(chardev_t *); … … 67 78 .suspend = z8530_suspend, 68 79 .resume = z8530_resume, 69 .read = z8530_key_read70 80 }; 71 81 72 /** Initialize keyboard and service interrupts using kernel routine. */ 73 void z8530_grab(void) 82 /** Initialize z8530. */ 83 bool 84 z8530_init(z8530_t *dev, devno_t devno, inr_t inr, cir_t cir, void *cir_arg) 74 85 { 75 ipl_t ipl = interrupts_disable();86 z8530_instance_t *instance; 76 87 77 (void) z8530_read_a(&z8530, RR8); 88 chardev_initialize("z8530_kbd", &kbrd, &ops); 89 stdin = &kbrd; 90 91 instance = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC); 92 if (!instance) 93 return false; 94 95 instance->devno = devno; 96 instance->z8530 = dev; 97 98 irq_initialize(&instance->irq); 99 instance->irq.devno = devno; 100 instance->irq.inr = inr; 101 instance->irq.claim = z8530_claim; 102 instance->irq.handler = z8530_irq_handler; 103 instance->irq.instance = instance; 104 instance->irq.cir = cir; 105 instance->irq.cir_arg = cir_arg; 106 irq_register(&instance->irq); 107 108 (void) z8530_read(&dev->ctl_a, RR8); 78 109 79 110 /* … … 81 112 * to set FHC UART interrupt state to idle. 82 113 */ 83 z8530_write _a(&z8530, WR0, WR0_TX_IP_RST);114 z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST); 84 115 85 116 /* interrupt on all characters */ 86 z8530_write _a(&z8530, WR1, WR1_IARCSC);117 z8530_write(&dev->ctl_a, WR1, WR1_IARCSC); 87 118 88 119 /* 8 bits per character and enable receiver */ 89 z8530_write _a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE);120 z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); 90 121 91 122 /* Master Interrupt Enable. */ 92 z8530_write_a(&z8530, WR9, WR9_MIE); 93 94 spinlock_lock(&z8530_irq.lock); 95 z8530_irq.notif_cfg.notify = false; 96 spinlock_unlock(&z8530_irq.lock); 97 interrupts_restore(ipl); 98 } 123 z8530_write(&dev->ctl_a, WR9, WR9_MIE); 99 124 100 /** Resume the former IPC notification behavior. */ 101 void z8530_release(void) 102 { 103 ipl_t ipl = interrupts_disable(); 104 spinlock_lock(&z8530_irq.lock); 105 if (z8530_irq.notif_cfg.answerbox) 106 z8530_irq.notif_cfg.notify = true; 107 spinlock_unlock(&z8530_irq.lock); 108 interrupts_restore(ipl); 109 } 110 111 /** Initialize z8530. */ 112 void 113 z8530_init(devno_t devno, uintptr_t vaddr, inr_t inr, cir_t cir, void *cir_arg) 114 { 115 chardev_initialize("z8530_kbd", &kbrd, &ops); 116 stdin = &kbrd; 117 118 z8530.devno = devno; 119 z8530.reg = (uint8_t *) vaddr; 120 121 irq_initialize(&z8530_irq); 122 z8530_irq.devno = devno; 123 z8530_irq.inr = inr; 124 z8530_irq.claim = z8530_claim; 125 z8530_irq.handler = z8530_irq_handler; 126 z8530_irq.cir = cir; 127 z8530_irq.cir_arg = cir_arg; 128 irq_register(&z8530_irq); 129 125 /* 126 * This is the necessary evil until the userspace drivers are entirely 127 * self-sufficient. 128 */ 130 129 sysinfo_set_item_val("kbd", NULL, true); 131 130 sysinfo_set_item_val("kbd.type", NULL, KBD_Z8530); 132 131 sysinfo_set_item_val("kbd.devno", NULL, devno); 133 132 sysinfo_set_item_val("kbd.inr", NULL, inr); 134 sysinfo_set_item_val("kbd.address.virtual", NULL, vaddr);133 sysinfo_set_item_val("kbd.address.virtual", NULL, (uintptr_t) dev); 135 134 136 z8530_grab(); 137 } 138 139 /** Process z8530 interrupt. 140 * 141 * @param n Interrupt vector. 142 * @param istate Interrupted state. 143 */ 144 void z8530_interrupt(void) 145 { 146 z8530_poll(); 135 return true; 147 136 } 148 137 … … 157 146 } 158 147 159 char z8530_key_read(chardev_t *d)148 irq_ownership_t z8530_claim(irq_t *irq) 160 149 { 161 char ch; 150 z8530_instance_t *instance = irq->instance; 151 z8530_t *dev = instance->z8530; 162 152 163 while(!(ch = active_read_buff_read())) { 164 uint8_t x; 165 while (!(z8530_read_a(&z8530, RR0) & RR0_RCA)) 166 ; 167 x = z8530_read_a(&z8530, RR8); 168 if (x != IGNORE_CODE) { 169 if (x & KEY_RELEASE) 170 key_released(x ^ KEY_RELEASE); 171 else 172 active_read_key_pressed(x); 173 } 174 } 175 return ch; 153 return (z8530_read(&dev->ctl_a, RR0) & RR0_RCA); 176 154 } 177 155 178 /** Poll for key press and release events. 179 * 180 * This function can be used to implement keyboard polling. 181 */ 182 void z8530_poll(void) 156 void z8530_irq_handler(irq_t *irq) 183 157 { 158 z8530_instance_t *instance = irq->instance; 159 z8530_t *dev = instance->z8530; 184 160 uint8_t x; 185 161 186 while (z8530_read_a(&z8530, RR0) & RR0_RCA) {187 x = z8530_read _a(&z8530, RR8);162 if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) { 163 x = z8530_read(&dev->ctl_a, RR8); 188 164 if (x != IGNORE_CODE) { 189 165 if (x & KEY_RELEASE) … … 195 171 } 196 172 197 irq_ownership_t z8530_claim(irq_t *irq)198 {199 return (z8530_read_a(&z8530, RR0) & RR0_RCA);200 }201 202 void z8530_irq_handler(irq_t *irq)203 {204 if (irq->notif_cfg.notify && irq->notif_cfg.answerbox)205 ipc_irq_send_notif(irq);206 else207 z8530_interrupt();208 }209 210 173 /** @} 211 174 */ -
uspace/srv/kbd/port/z8530.c
re7abb0e r0f74869 42 42 #include <sys/types.h> 43 43 44 /** Top-half pseudocode for z8530. */ 45 irq_cmd_t z8530_cmds[] = { 44 #define CHAN_A_STATUS 4 45 #define CHAN_A_DATA 6 46 47 #define RR0_RCA 1 48 49 static irq_cmd_t z8530_cmds[] = { 46 50 { 47 CMD_MEM_READ_1, 48 0, /**< Address. Will be patched in run-time. */ 49 0, /**< Value. Not used. */ 50 1 /**< Arg 1 will contain the result. */ 51 .cmd = CMD_PIO_READ_8, 52 .addr = (void *) 0, /* will be patched in run-time */ 53 .dstarg = 1 54 }, 55 { 56 .cmd = CMD_BTEST, 57 .value = RR0_RCA, 58 .srcarg = 1, 59 .dstarg = 3 60 }, 61 { 62 .cmd = CMD_PREDICATE, 63 .value = 2, 64 .srcarg = 3 65 }, 66 { 67 .cmd = CMD_PIO_READ_8, 68 .addr = (void *) 0, /* will be patched in run-time */ 69 .dstarg = 2 70 }, 71 { 72 .cmd = CMD_ACCEPT 51 73 } 52 74 }; 53 54 75 55 76 irq_code_t z8530_kbd = { 56 1,77 sizeof(z8530_cmds) / sizeof(irq_cmd_t), 57 78 z8530_cmds 58 79 }; … … 63 84 { 64 85 async_set_interrupt_received(z8530_irq_handler); 65 z8530_cmds[0].addr = (void *) sysinfo_value("kbd.address.virtual") + 6; 86 z8530_cmds[0].addr = (void *) sysinfo_value("kbd.address.virtual") + 87 CHAN_A_STATUS; 88 z8530_cmds[3].addr = (void *) sysinfo_value("kbd.address.virtual") + 89 CHAN_A_DATA; 66 90 ipc_register_irq(sysinfo_value("kbd.inr"), sysinfo_value("kbd.devno"), 67 91 0, &z8530_kbd); … … 71 95 static void z8530_irq_handler(ipc_callid_t iid, ipc_call_t *call) 72 96 { 73 int scan_code = IPC_GET_ARG 1(*call);97 int scan_code = IPC_GET_ARG2(*call); 74 98 kbd_push_scancode(scan_code); 75 99 }
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